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Arbitration system and method for memory responses in a hub-based memory system Number:7,120,743 from the United States Patent and Trademark Office (PTO) owispatent

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Title: Arbitration system and method for memory responses in a hub-based memory system

Abstract: A memory hub includes a local queue that stores local memory responses, a bypass path that passes downstream memory responses, and a buffered queue coupled to the bypass path that stores downstream memory responses from the bypass path. A multiplexer is coupled to the local queue, buffered queue, and the bypass path and outputs responses from a selected one of the queues or the bypass path responsive to a control signal. Arbitration control logic is coupled to the multiplexer and the queues and develops the control signal to control the response output by the multiplexer.

Patent Number: 7,120,743 Issued on 10/10/2006 to Meyer,   et al.


Inventors: Meyer; James W. (Shoreview, MN), Kanski; Cory (Blaine, MN)
Assignee: Micron Technology, Inc. (Boise, ID)
Appl. No.: 10/690,810
Filed: October 20, 2003


Current U.S. Class: 711/118 ; 710/52; 711/158
Current International Class: G06F 12/00 (20060101)


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