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Digital information recording/reproducing method and apparatus Number:7,027,240 from the United States Patent and Trademark Office (PTO) owispatent

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Title: Digital information recording/reproducing method and apparatus

Abstract: An apparatus and method for transmitting and receiving digital information includes a transmitting part for transmitting digital video information and digital audio information and receiving part for receiving digital video information and digital audio information. The transmitting part includes a first compressor for digital video information, a second compressor for digital audio information, a parity signal adder, a modulator, and a transmitter. The receiving part includes a receiver which receives digital information which is digital video information bit-compressed by a first compression system plus digital audio information bit-compressed by a second compression system, and to which has been added a parity signal for error detecting, phase-modulated and transmitted to a transmission path; a demodulator; an error detector, a first expander which bit-expands video information, and a second expander which bit-expands audio information.

Patent Number: 7,027,240 Issued on 04/11/2006 to Arai,   et al.


Inventors: Arai; Hideo (Chigasaki, JP); Owashi; Hitoaki (Yokohama, JP); Hosokawa; Kyoichi (Yokohama, JP); Nishimura; Keizo (Yokosuka, JP); Watatani; Yoshizumi (Fujisawa, JP); Shibata; Akira (Katsuta, JP)
Assignee: Hitachi, Ltd. (Tokyo, JP)
Appl. No.: 603612
Filed: June 26, 2003


Related U.S. Patent Documents

Application NumberFiling DatePatent NumberIssue Date
10404452Apr., 2003
10277830Oct., 20026590726
09809047Mar., 20016498691
09654962Sep., 20006324025
09567005May., 20006278564
09326595Jun., 19996069757
09188303Nov., 19986002536
08917176Aug., 19975862004
08620880Mar., 19965673154
08620879Mar., 19965699203
08457597Jun., 19955530598
08457486Jun., 19955517368
08238528May., 19945671095
07727059Jul., 19915337199

Foreign Application Priority Data

Jul 06, 1990 [JP] 2-177406
Jul 06, 1990 [JP] 2-177406
Jul 20, 1990 [JP] 2-190655
Jul 20, 1990 [JP] 2-190655
Sep 21, 1990 [JP] 2-250199
Sep 21, 1990 [JP] 2-250199

Current U.S. Class: 360/8 ; 386/109
Current International Class: G11B 5/00 (20060101)
Field of Search: 360/8,27,32,39 386/6,7,27,33,68,84,109,112


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4544958 October 1985 Odaka
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Other References

Digital Information recording And Reproducing Device, Reception Recording And Reproducing Device And Their methods, Arai et al, JP-2000-059,733, Feb., 25.sup.th , 2000 (Abstract only). cited by examiner .
Kubota, S. et al., "A Compact Spectrum and Interference-resistant Digital Video Transmission System", IEEE Global Telecommunications Conference & Exhibition, vol. 3, pp. 1729-1734, 1989. cited by other.

Primary Examiner: Dinh; Tan
Attorney, Agent or Firm: Antonelli, Terry, Stout and Kraus, LLP.

Parent Case Text



CROSS REFERENCE TO RELATED APPLICATIONS

This is a continuation application of U.S. application Ser. No. 10/404,452, filed Apr. 2, 2003, which is a continuation of U.S. application Ser. No. 10/277,830, filed Oct. 23, 2002, now U.S. Pat. No. 6,590,726, which is a continuation of U.S. Ser. No. 09/809,047, filed Mar. 16, 2001, now U.S. Pat. No. 6,498,691, which is a continuation application of U.S. application Ser. No. 09/654,962, filed Sep. 5, 2000, now U.S. Pat. No. 6,324,025, which is a continuation of U.S. Ser. No. 09/567,005, filed May 9, 2000, now U.S. Pat. No. 6,278,564, which is a continuation application of U.S. Ser. No. 09/326,595, filed Jun. 7, 1999, now U.S. Pat. No. 6,069,757, which is a continuation of U.S. application Ser. No. 09/188,303, filed Nov. 10, 1998, now U.S. Pat. No. 6,002,536, which is a continuation of U.S. application Ser. No. 08/917,176, filed Aug. 25, 1997, now U.S. Pat. No. 5,862,004, which is a continuation of U.S. application Ser. No. 08/620,879, filed Mar. 22, 1996, now U.S. Pat. No. 5,699,203, and with U.S. application Ser. No. 08/620,880, filed Mar. 22, 1996, now U.S. Pat. No. 5,673,154, which are continuations of U.S. application Ser. No. 08/457,597, filed Jun. 1, 1995, now U.S. Pat. No. 5,530,598, which is a continuation of U.S. application Ser. No. 08/457,486, filed Jun. 1, 1995, now U.S. Pat. No. 5,517,368, which is a continuation of U.S. application Ser. No. 08/238,528, filed May 5, 1994, now U.S. Pat. No. 5,671,095, which is a divisional of U.S. application Ser. No. 07/727,059, filed Jul. 8, 1991, now U.S. Pat. No. 5,337,199, the subject matter of which are incorporated by reference herein.
Claims



What is claimed is:

1. An apparatus for transmitting and receiving digital information including a transmitting part for transmitting digital video information and digital audio information and receiving part for receiving digital video information and digital audio information: wherein the transmitting part comprises: a first compressor which bit-compresses digital video information by a first compression system; a second compressor which bit-compresses digital audio information by a second compression system; a parity signal adder which adds common parity signal for detecting an error to the digital video information and the digital audio information bit-compressed by the first compressor and the second compressor; a modulator which phase-modulates the digital video information and the digital audio information, to which the parity signal has been added by the parity signal adder; and a transmitter which transmits the digital video information and the digital audio information modulated by the modulator to a transmission path; wherein the receiving part comprises: a receiver which receives digital information which is digital video information bit-compressed by a first compression system plus digital audio information bit-compressed by a second compression system, and to which has been added a parity signal for error detecting, phase-modulated and transmitted to a transmission path; a demodulator which demodulates the digital information received by the receiver corresponding to the phase-modulation; an error detector which detects an error of the digital information demodulated by the demodulator by use of the parity signal; a first expander which bit-expands video information corresponding to the first compression system, the video information being among the digital information error detected by the error detector; and a second expander which bit-expands audio information corresponding to the second compression system, the audio information being among the digital information error detected by the error detector.

2. An apparatus for transmitting and receiving digital information in accordance with claim 1, further comprising: a first output terminal which outputs the digital video information expanded by the first expander; and a second output terminal which outputs the digital audio information expanded by the second expander.

3. An apparatus for transmitting and receiving digital information in accordance with claim 1, comprising: a first D/A converter which coverts the digital video information expanded by the first expander to analog video information; and a second D/A converter which converts the digital audio information expanded by the second expander to analog audio information.

4. An apparatus for transmitting and receiving digital information in accordance with claim 1, wherein the first compression system and the second compression system are different systems from one another.

5. An apparatus for transmitting and receiving digital information in accordance with claim 1, wherein the demodulator is a QPSK demodulator.

6. A method for transmitting and receiving digital information to transmit digital video information and a digital audio information and to receive digital video information and digital audio information, comprising the steps of: a first compressing step which bit-compresses digital video information by a first compression system; a second compressing step which bit-compresses digital audio information by a second compression system; a parity signal adding step which adds a common parity signal for detecting an error to the digital video information and the digital audio information bit-compressed in the first and second compressing steps; a modulating step which phase-modulates the digital video information and the digital audio information to which the parity signal has been added by the parity signal adding step; a transmitting step which transmits the digital video information and the audio information modulated in the modulating step to a transmission path; a receiving step which receives digital information which is digital video information bit-compressed by a first compression system plus a digital audio information bit-compressed by a second compression system, and to which has been added a parity signal for error detecting, phase-modulated and transmitted to a transmission path; a demodulating step which demodulates the digital information received in the receiving step corresponding to the phase-modulation; an error detecting step which detects an error of the digital information demodulated in the demodulating step by use of the parity signal; a first expanding step which bit-expands video information corresponding to the first compression system, the video information being among the digital information error detected in the error detecting step; and a second expanding step which bit-expands audio information corresponding to the second compression system, the audio information being among the digital information error detected in the error detecting step.

7. A method for transmitting and receiving digital information in accordance with claim 6, further comprising: a first outputting step which outputs the digital video information expanded in the first expanding step; and a second outputting step which outputs the digital audio information expanded in the second expanding step.

8. A method for transmitting and receiving digital information in accordance with claim 6, further comprising: a first D/A converting step which converts the digital video information expanded in the first expanding step to analog video information; and a second D/A converting step which converts the digital audio information expanded in the second expanding step to analog audio information.

9. A method for transmitting and receiving digital information in accordance with claim 6, wherein the first compression system and the second compression system are different systems from one another.

10. A method for transmitting and receiving digital information in accordance with claim 6, wherein the demodulation is a QPSK demodulation.

11. An apparatus according to claim 1, further comprising: an output terminal which outputs the digital information error-detected by the error detector to a recording/reproducing apparatus; an input terminal which inputs a reproduced signal from the recording/reproducing apparatus; and a selector which selects one of the digital information error-detected by the error detector and the digital information inputted from the input terminal; wherein the digital information selected by the selector is bit-expanded by the first expander and the second expander.

12. An apparatus for transmitting and receiving digital information including digital video information and digital audio information, comprising: a transmitting part for transmitting digital information; and a receiving part for receiving digital information; wherein the transmitting part comprises: a compressor which compresses digital information, the compressor including a time-compressor which time-compresses digital information and a bit-compressor which bit compresses digital video information by a first compression system and digital audio information by a second compression system; a parity signal adder which adds a parity signal for detecting an error to the digital information compressed by the compressor; a modulator which phase-modulates the digital information to which the parity signal has been added by the parity signal adder; and a transmitter which transmits the digital information modulated by the modulator; wherein the receiving part comprises: a receiver which receives compressed digital information including compressed digital video information and compressed digital audio information; a demodulator which demodulates the compressed digital information received by the receiver corresponding to the phase-modulation; an error detector which detects an error of the digital information demodulated by use of the parity signal; and an expander which expands the compressed digital information error detected by the error detector, the expander including a time-expander which time-expands the compressed digital information and a bit-expander which time-expands the compressed digital video information corresponding to the first compression system and the compressed digital audio information corresponding to the second compression system.

13. An apparatus for transmitting and receiving digital information in accordance with claim 12, wherein a transmission rate of the digital information transmitted by the transmitter is lower than that of the digital information inputted into the compressor.

14. An apparatus for transmitting and receiving digital information including digital video information and digital audio information, comprising: a transmitting part for transmitting digital information; and a receiving part for receiving digital information; wherein the transmitting part comprises: a compressor which compresses digital information, the compressor including a time-compressor which time-compresses digital information; and a bit-compressor which bit-compresses digital video information by a first compression system and digital audio information by a second compression system; and a transmitter which transmits the digital information compressed by the compressor; wherein the receiving part comprises: a receiver which receives compressed digital information including compressed digital video information and compressed digital audio information; and an expander which expands the compressed digital information received by the receiver, the expander including a time-expander which time-expands the compressed digital information and a bit-expander which time-expands the compressed digital video information corresponding to the first compression system and the compressed digital audio information corresponding to the second compression system.

15. An apparatus for transmitting and receiving digital information in accordance with claim 14, wherein a transmission rate of the digital information transmitted by the transmitter is lower than that of the digital information inputted into the compressor.
Description



BACKGROUND OF THE INVENTION

The present invention relates to a system for transmitting a digital video signal and recording the received video signal. More particularly, the present invention relates to great extension of the range of use of a digital signal recording/reproducing system by greatly shortening a recording time through transmission of a video signal in a compressed form, and further relates to great extension of the range of use of a digital signal recording/reproducing system by making the number of signals to be recorded and a recording/reproducing time variable.

As a digital magnetic recording/reproducing system (hereinafter referred to as VTR) is conventionally known, for example, a D2 format VTR. In such a conventional digital VTR, the elongation or shortening of a reproducing time is possible by using variable-speed reproduction. However, the prior art reference does not at all disclose high-speed recording in which a recording time is shortened to 1/m, multiple recording in which a plurality of signals are recorded, and the compression/expansion of a recording/reproducing time.

The above-mentioned conventional digital VTR has a feature that a high quality is attained and there is no deterioration caused by dubbing. However, the shortening of a dubbing time is not taken into consideration. Therefore, for example, in the case where a two-hour program is to be recorded, two hours are required. Thus, there is a drawback that inconveniences are encountered in use. Also, the multiplexing of recording signals is not taken into consideration. Therefore, for example, when two kinds of programs are to be simultaneously recorded or reproduced, two VTR's are required. This also causes inconveniences in use.

SUMMARY OF THE INVENTION

An object of the present invention is to provide a digital VTR in which high-speed recording onto a tape can be made with the same format as that used in standard-speed recording, to provide a transmission signal processing system for transmitting at a high speed a video signal to be recorded by such a digital VTR, and to extend the range of use of the digital VTR by shortening a recording time. For example, the digital VTR can be used in such a manner that a two-hour program is recorded in about ten minutes and is reproduced at a standard speed.

The above object is achieved as follows. A video signal and an audio signal are subjected to time-base compression to 1/m, bit compression to 1/n, addition of a parity signal and modulation, and are thereafter transmitted or outputted. The transmitted signal is received, is subjected to demodulation, error correction, addition of a parity signal and modulation, and is thereafter recorded, onto a magnetic tape which travels at a travel speed m times as high as that upon normal reproduction, by use of a magnetic head on a cylinder which rotates at a frequency m times as high as that upon normal reproduction. The signal on the magnetic tape traveling at a travel speed upon normal reproduction is reproduced by a magnetic head on the cylinder which rotates at a frequency upon normal reproduction. The reproduced signal is subjected to demodulation, error correction, bit expansion of video and audio signals and D/A conversion, and is thereafter outputted. Address signals corresponding to a plurality of VTR's may be transmitted prior to a signal to be recorded. Further, control signals indicative of the start of recording and the stop of recording may be transmitted. The transmitted signals are received and error-corrected, and controls of the standby for recording, the start of recording and the stop of recording are made on the basis of the control signals.

With the above construction, since the video signal and the audio signal are time-base compressed to 1/m and bit-compressed to 1/n, a transmission time is shortened to 1/m and a signal band turns to m/n. The time-base compressed and bit-compressed signal is transmitted after addition of a parity signal for error correction and modulation to a code adapted for a transmission path. The transmitted signal is received and demodulated. The detection of an error produced in a transmitting system and the correction for the error can be made using the added parity signal. The error-corrected signal is added with a parity signal for correction for an error produced in a magnetic recording/reproducing system and is modulated to a code adapted for the magnetic recording/reproducing system. Upon recording, since the rotation frequency of the cylinder and the travel speed of the magnetic tape are increased by m times, the recording onto the magnetic tape can be made at an m-tuple speed. Upon reproduction, by setting the rotation frequency of the cylinder and the travel speed of the magnetic tape to normal ones, the reproduction at a normal speed can be made. The reproduced signal is code-demodulated. The detection of an error produced in the magnetic recording/reproducing system and the correction for the error can be made on the basis of the parity signal. By bit-expanding the video signal and the audio signal compressed by the transmission signal processing system, the original video and audio signal can be restored. The bit-expanded signal is converted into an analog signal by a D/A converter. Simultaneous and selective control of the start/stop of recording for a multiplicity of VTR's can be made in such a manner that the address signals corresponding to the VTR's are transmitted prior to a signal to be recorded, the correction for an error of the received signal is made, required VTR's are brought into recording standby conditions by the corrected address signals, and the controls of the start of recording and the stop of recording are made by the transmitted control signals.

Another object of the present invention is to provide a digital signal recording/reproducing system in which multiple recording onto a tape can be made with the same format as that used in standard recording and simultaneous multiple reproduction is possible, and to extend the range of use of a digital VTR by compressing/expanding a recording/reproducing time in accordance with the transmission rate of a multiplexed input/output signal and the number of signals in the multiplexed input/output signal.

This object is achieved as follows. There are provided means for selecting one or plural desired signals from a time-base compressed and time-division multiplexed digital input signal, and helical scan recording means for making time-division multiplex recording of the selected signals with a time-base compressed speed after selection being retained. There is further provided means for reproducing the recorded signals with the rotation speed of a cylinder, a tape speed and so on being set to values proportional to the transmission rate of a reproduction signal and the number of signals to be simultaneously reproduced and with the signal being time-base expanded or being retained as time-base compressed.

With the above construction, N kinds of desired signals selected from the multiplexed input digital signal and time-base compressed to 1/K are subjected to time-division multiplex recording with a time-base compressed speed after selection being retained. Upon reproduction, for example, if both the cylinder rotation speed and the tape speed are set to N/K times, a recording track and a reproducing track coincide with each other and the use of a reproducing time K/N times as long as a recording time enables the reproduction of each of the N kinds of signals at a standard speed. Also, if both the cylinder rotation speed and the tape speed are set to (M.times.N)/K times, a recording track and a reproducing track coincide with each other and the use of a reproducing time as K/(M.times.N) times as long as the recording time enables the reproduction of each of the N kinds of signals at an M-tuple speed. In the case where L kinds of signals are selected from among the N kinds of reproduced signals and a processing speed at a reproduction signal processing circuit is set to L.times.M times as long as a standard reproduction processing speed, each of the L kinds of signals among the N kinds of multiple-recorded signals is outputted at a speed M times as high as a standard speed.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a block diagram of a digital transmission signal processing system and a recording/reproducing system according to an embodiment of the present invention;

FIG. 2 is a block diagram of a recording/reproducing system according to another embodiment of the present invention;

FIG. 3 is a diagram for explaining the conventional parity adding method;

FIG. 4 is a block diagram of a recording/reproducing system according to still another embodiment of the present invention;

FIG. 5 is a block diagram of a digital transmission signal processing system and a recording/reproducing system according to a further embodiment of the present invention;

FIG. 6 shows the format of control signals used in one of applications of the present invention;

FIG. 7 is a block diagram of a still further embodiment of the present invention;

FIG. 8 shows one example of the specification of signals to be recorded;

FIG. 9 is a block diagram of a furthermore embodiment of the present invention;

FIGS. 10, 11 and 12 are block diagrams of different examples of applications of the present invention;

FIG. 13 is a block diagram for explaining one example of the operation of the embodiment shown in FIG. 7;

FIG. 14 is a timing chart showing the waveforms of signals involved in the example shown in FIG. 13;

FIG. 15 is a block diagram for explaining another example of the operation of the embodiment shown in FIG. 7;

FIG. 16 is a timing chart showing the waveforms of signals involved in the example shown in FIG. 15;

FIGS. 1 7 is a table showing some applications of the examples shown in FIGS. 13 and 15;

FIG. 18 is a block diagram of a still furthermore embodiment of the present invention; and

FIGS. 19 and 20 are signal diagrams for explaining different operations of the embodiment shown in FIG. 18.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

An embodiment of the present invention will now be explained by use of FIG. 1. In the figure, reference numerals 1 and 40 denote magnetic tapes, numerals 2, 3, 41 and 42 magnetic heads, numerals 4 and 43 cylinders, numerals 5 and 44 capstans, numerals 10 and 50 servo control circuits, numerals 20, 31 and 60 demodulation circuits, numerals 21, 32 and 61 error correction circuits, numerals 22 and 23 compression circuits, numerals 24 and 33 parity addition circuits, numerals 25 and 34 modulation circuits, numerals 26 a transmission circuit, numeral 27 a transmission path, numeral 30 a reception circuit, numerals 62 and 63 expansion circuits, numerals 64 and 65 D/A conversion circuits, numeral 70 a video signal output terminal, and numeral 71 an audio signal output terminal.

Firstly, the operation of a transmission signal processing system will be explained. Digital video and audio signals recorded on the magnetic tape 1 are reproduced by the magnetic heads 2 and 3 mounted on the cylinder 4 and are inputted to the demodulation circuit 20. The magnetic tape 1 travels by virtue of the capstan 5. The travel speed of the magnetic tape 1 and the rotation frequency of the cylinder 4 are, for example, ten times as high as the tape travel speed and the cylinder rotation speed upon normal reproduction. Accordingly, the signal inputted to the demodulation circuit 20 is a signal time-compressed to one tenth. For example, a 120-minute signal recorded on the magnetic tape 1 can be reproduced in 12 minutes.

Generally, in the case where a digital signal is to be recorded on a magnetic recording medium, the signal is recorded after having been modulated into scrambled NRZ code, M.sup.2 code or the like. The demodulation circuit 20 performs a demodulation processing, that is, a signal processing for restoring the thus modulated signal into original digital data. The signal demodulated by the demodulation circuit 20 is inputted to the error correction circuit 21 in which erroneous data produced in a magnetic recording/reproducing process is detected and the correction for the erroneous data is made. Further, the signal is separated into a video signal and an audio signal which are in turn inputted to the compression circuits 22 and 23, respectively. The video signal is bit-compressed through, for example, discrete cosine conversion. The audio signal is bit-compressed through, for example, non-linear quantization or differential PCM. As a result, the transmission rate of the video signal and the audio signal in total is reduced to, for example, one twentieth.

Output signals of the compression circuits 22 and 23 are inputted to the parity addition circuit 24 for performing a signal processing which includes adding a parity signal for error correction and outputting the video signal and the audio signal serially in accordance with a transmission format. A serial output signal of the parity addition circuit 24 is inputted to the modulation circuit 25. In the modulation circuit 25, the serial signal is modulated in accordance with the characteristic and the frequency band of the transmission path 27. For example, in the case where the signal is transmitted in an electric wave form, quadruple phase shift keying (QPSK) is made. The modulated signal is inputted to the transmission circuit 26 from which it is outputted to the transmission path 27.

As apparent from the foregoing explanation of the operation of the transmission signal processing system, it is possible to transmit a signal at a speed which is ten times as high as a normal speed.

The above embodiment has been shown in conjunction with the case where a signal from the VTR is reproduced. However, a signal source is not limited to the VTR and may include a magnetic disk device, an optical disk device or the like.

Next, explanation will be made of the operation of the VTR for receiving and recording the transmitted signal. The signal transmitted from the transmission signal processing system is received by the reception circuit 30. The received signal is inputted to the demodulation circuit 31. The demodulation circuit 31 is provided corresponding to the modulation and demodulates the signal to the original signal. The demodulated signal is inputted to the error correction circuit 32 in which the detection of and the correction for an error produced in the transmission path 27 are made on the basis of the parity signal added by the parity addition circuit 24. At this time, in the case where the S/N ratio of the transmission system is not sufficient so that complete correction for the error is impossible, correction is made through, for example, signal replacement, by use of the signal correlation.

An output signal of the error correction circuit 32 is inputted to the parity addition circuit 33. In the parity addition circuit 33, a parity signal for detecting an error produced in a recording/reproducing process and making correction for the error is added. The parity-added signal is inputted to the modulation circuit 34. In the modulation circuit 34, the signal is modulated to scrambled NRZ code, M.sup.2 code or the like as mentioned above. The modulated signal is recorded on the magnetic tape 40 by the magnetic heads 41 and 42 mounted on the cylinder 43.

Since the signal supplied to the magnetic heads 41 and 42 is a signal which is time-base compressed to one tenth as compared with a signal upon normal operation, the servo control circuit 50 controls the cylinder 43 and the capstan 44 so that the rotation frequency of the cylinder 43 and the travel speed of the magnetic tape 40 become ten times as high as those upon normal recording. Also, in order to record a predetermined signal at a predetermined position on the magnetic tape 40, synchronization information is detected from the received signal to control the phase of rotation of the cylinder 41 on the basis of the detected synchronization information.

Next, the operation of the VTR for reproducing the thus recorded signal will be explained. Upon reproduction, the travel speed of the magnetic tape 40 and the rotation frequency of the cylinder 43 are set to those upon normal reproduction. The reproduced signal is inputted to the demodulation circuit 60. The demodulation circuit 60 is provided corresponding to the modulation circuit 34 and demodulates the modulated signal. The demodulated signal is inputted to the error correction circuit 61 in which the detection of an error produced in the magnetic recording/reproducing system and the correction for the error are made on the basis of the parity signal added by the parity addition circuit 33. In the case where there is an error which cannot be corrected, the error is properly corrected by use of the signal correlation. Also, the signal is outputted after having been separated into a video signal and an audio signal.

The video signal is inputted to the expansion circuit 62. The expansion circuit 62 is provided corresponding to the compression circuit 22 and restores the compressed video signal into the original video signal. An output signal of the expansion circuit 62 is inputted to the D/A conversion circuit 64 and is converted thereby into an analog video signal which is in turn outputted from the terminal 70.

The audio signal is inputted to the expansion circuit 63. The expansion circuit 63 is provided corresponding to the compression circuit 23 and restores the compressed audio signal into the original audio signal. An output signal of the expansion circuit 63 is inputted to the D/A conversion circuit 65 and is converted thereby into an analog audio signal which is in turn outputted from the terminal 71.

In the foregoing, the embodiment of the present invention has been shown and the operation thereof has been explained. According to the present invention, a video signal and an audio signal over a long time can be transmitted and recorded in a short time, thereby making it possible to extend the range of use of the digital VTR.

Another embodiment of the present invention is shown in FIG. 2. FIG. 2 is partially similar to FIG. 1. The same parts in FIG. 2 as those in FIG. 1 are denoted by the same reference numerals as those used in FIG. 1 and detailed explanation thereof will be omitted. The embodiment shown in FIG. 2 concerns a VTR in which a signal transmitted/received at a high speed can be recorded while being monitored.

In FIG. 2, reference numeral 80 denotes a change-over switch, numeral 81 an error correction circuit, and numeral 82 a memory circuit. An error-corrected video signal outputted from the error correction circuit 81 is inputted through the memory circuit 82 to a terminal R side of the change-over switch 80 which is selected upon recording. The memory circuit 82 has a memory capacity for at least one field. The video signal received at a high speed is stored into a memory of the memory circuit 82 with the number of frames being reduced. The stored signal is read from the memory at a normal speed and is inputted to an expansion circuit 62.

Upon reproduction, a video signal output of an error correction circuit 61 is inputted to a terminal P side of the change-over switch 80 which is selected upon reproduction. Accordingly, the operation of the embodiment of FIG. 2 upon reproduction is similar to that of the embodiment shown in FIG. 1.

In the embodiment shown in FIG. 2, upon recording, the video signal outputted from the error correction circuit 81 is inputted to the expansion circuit 62 through the memory circuit 82. Alternatively, an output signal of a modulation circuit 34 may be inputted to a demodulation circuit 60 through a memory circuit. Also, in the case where the operating speed of the demodulation circuit 60 or the error correction circuit 61 leaves a margin, a memory circuit may be properly placed at a post stage. Or, in the case where the storage capacity of the error correction circuit 61 or the expansion circuit 62 leaves a margin, the circuit may be used as a memory circuit or any additional memory circuit may be omitted.

As has been explained in the above, the embodiment shown in FIG. 2 makes it possible to record a received video signal while monitoring it in the form of a picture having a reduced number of frames.

In the embodiment shown in FIG. 1, the parity signal is added in order to make the detection of and the correction for an error which may be produced in the transmission system or the magnetic recording/reproducing system. One example of a parity adding method is shown in FIG. 3 in conjunction with the case of a D2 format VTR. In the D2 format VTR, a signal for one field is divided into a plurality of segments for signal processing. FIG. 3 shows one segment. In FIG. 3, reference numeral 90 represents a group of video data, numeral 91 a group of outer code parities, and numeral 92 a group of inner code parities. Firstly, outer code parities are added for data of the matrix-like arranged video data group 90 which lie in a vertical direction in FIG. 3. Thereafter, inner code parities are added for data of the video data group 90 and the outer code parity group 91 lying in a horizontal direction in FIG. 3, thereby producing a signal to be recorded. Though detailed explanation of the generation of parities will be omitted herein, the parities are generated in accordance with a generating function G(x).

In the embodiment shown in FIG. 1, if the same parity generation manner is employed by the parity addition circuits 24 and 33, the error correction circuits 32 and 61 may hold the most part thereof in common. Namely, since the error correction circuits 32 and 61 are circuits which are respectively used upon recording and upon reproduction, it is possible to reduce the circuit scale or size by using the most part of the circuits 32 and 61 in common.

Further, in the case where the same parity generation manner is employed by the parity addition circuits 24 and 33 in the embodiment shown in FIG. 1, it is possible to further reduce the circuit scale or size of the recording/reproducing system. The construction in that case is shown in FIG. 4 as still another embodiment of the present invention. FIG. 4 is partially common to FIG. 1 or 2. The parts in FIG. 4 common to those in FIG. 1 or 2 are denoted by the same reference numerals as those used in FIG. 1 or 2 and detailed explanation thereof will be omitted.

The embodiment shown in FIG. 4 is based on a concept that an error produced in a transmission system and an error produced in a magnetic recording/reproducing system are simultaneously detected and corrected by an error correction circuit 61. Accordingly, a signal received by a reception circuit 30 is demodulated by a demodulation circuit 31 and is inputted to a modulation circuit 34 without being subjected to error correction and parity addition. The subsequent processing is the same as that in the embodiment shown in FIG. 1 or 2. Namely, a reproduced signal is inputted to the error correction circuit 61 after demodulation by a demodulation circuit 60. As mentioned above, an error produced in the transmission system and an error produced in the magnetic recording/reproducing system are simultaneously detected and corrected by the error correction circuit 61 in the reproducing system.

In the embodiment shown in FIG. 4, the error correction circuit 32 and the parity addition circuit 33 can be removed as compared with the embodiment sown in FIG. 1 or 2, thereby making it possible to reduce the circuit scale.

Though having not been mentioned in the foregoing embodiments, in a helical scan VTR as shown, since a signal becomes discontinuous when a track jump is made upon reproduction, the recording is made with an amble signal being added to the heading portion of a signal. Since the addition of an amble signal is employed in the D2 format VTR, detailed explanation thereof will be omitted. Also, in order to define a starting position of a signal, a synchronizing signal is properly added. Since the addition of a synchronizing signal is known in, for example, the D2 format VTR, detailed explanation thereof will be omitted.

In the embodiment shown in FIG. 1, the addition of an amble signal may be made by the parity addition circuit 24. Alternatively, it may be made on the recording/reproducing system side in order to enhance the efficiency of use of the transmission path 27. In this case, the addition of an amble signal can be made by the parity addition circuit 33. As for the embodiment shown in FIG. 4, in the case where the addition of an amble signal is to be made on the recording/reproducing system side, the amble signal can be added by the modulation circuit 34. In the case where the addition of an amble signal is made on the recording/reproducing system side, it is possible to enhance the efficiency of use of the transmission path 27. On the other hand, in the case where the addition of an amble signal is made on the transmission signal processing system side, the lowering of the cost of a VTR can be attained as a great effect when a signal is sent to a multiplicity of VTR's simultaneously.

FIG. 5 shows a further embodiment of the present invention in which the further reduction of the circuit scale of a VTR on the receiving side and hence the further lowering of the cost can be attained in the case where a signal is sent to a multiplicity of VTR's simultaneously.

FIG. 5 is partially common to FIG. 1, 2 or 4. The parts in FIG. 5 common to those in FIG. 1, 2 or 4 are denoted by the same reference numerals as those used in FIG. 1, 2 or 4 and detailed explanation thereof will be omitted. In FIG. 5, reference numeral 100 denotes a modulation circuit. The embodiment shown in FIG. 5 is based on a concept that a signal processing required upon a recording mode of a VTR is performed on the transmitting side. Namely, modulation adapted for magnetic recording/reproduction, for example, a signal processing corresponding to the modulation circuit 34 shown in FIG. 4 is performed on the transmission signal processing system side. After parities have been added by a parity addition circuit 24 of the transmission signal processing system, the modulation adapted for the magnetic recording/reproduction is performed by the modulation circuit 100. Therefore, modulation adapted for transmission is performed by a modulation circuit 25. As a modulation system employed by the modulation circuit 100 is suitable a system which does not cause the extension of a frequency band by modulation, for example, scrambled NRZ. A signal modulated by the modulation circuit 25 is transmitted to a transmission path 27 through a transmission circuit 26 in a manner to that in the embodiment shown in FIG. 1.

The signal received by a reception circuit 30 through the transmission path 27 is inputted to a demodulation circuit 31 in which the signal is subjected to demodulation corresponding to the modulation circuit 25. Since the signal demodulated by the demodulation circuit 31 is one which has already been subjected by the modulation circuit 10 to the modulation adapted for the magnetic recording/reproduction, the signal is recorded on a magnetic tape 40 by magnetic heads 41 and 42 as it is. As a result, the same recording as that in the embodiment shown in FIG. 4 is made. An operation upon reproduction is similar to that in the embodiment shown in FIG. 4.

As apparent from the above, the present embodiment makes it possible to remarkably reduce the circuit scale of the VTR.

According to one of applications of the present invention, it is possible to transmit a signal from a transmission signal processing system to a multiplicity of VTR's through a transmission path simultaneously and at a high speed, as has already been mentioned. In this case, it is difficult to control a multiplicity of IVTR's simultaneously. Further, it is required to make a control which causes specified ones of the VTR's to perform recording operations and specified others of the VTR's not to perform recording operations. A technique for realizing such a control will be shown just below.

For the above purpose, control signals are transmitted prior to transmission of a signal to be recorded. One example of the control signals is shown in FIG. 6. In the figure, reference numeral 110 denotes a synchronizing signal, numeral 111 an ID signal indicative of a control to be made, numeral 112 an address signal indicative of a VTR to be controlled, numeral 113 a control signal for bringing a VTR designated by the address signal 112 into a recording mode, numeral 114 a control signal for stopping the recording, numerals 115 and 116 blank signals, and numeral 120 a recording signal to be actually recorded.

The ID signal 111 indicating the transmission of the address signals 112 indicative of VTR's in which a signal is to be recorded, is transmitted at a predetermined position relative to the synchronizing signal 110 to bring each VTR into a standby condition. After all the address signals have been transmitted, the ID signal 113 is transmitted to start the recording of the signal 120 in the designated VTR's. After the signal 120 has been transmitted, the ID signal 114 to control the stop of recording is transmitted. Each of the blank signals 115 and 116 is a signal for conforming a signal transmission format to the other transmission signal and is therefore an insignificant signal portion.

In the embodiments shown in FIGS. 1 and 5, those control signals are produced by a control signal generation circuit 130 and are transmitted with parities which are added by the parity addition circuit 24 for making correction for an error produced during transmission.

In the VTR shown in FIG. 1, the control signals are detected by a control circuit 131 after the reception by the reception circuit 30, the demodulation by the demodulation circuit 31 and the correction by the error correction circuit 32 for an error produced during transmission to make a control for the recording and the stop of recording in the recording/reproducing system.

In the case of the VTR's shown in FIGS. 4 and 5, an output signal of the demodulation circuit 31 is inputted to the error correction circuit 61 for a need of making correction for an error produced during transmission and error-corrected control signals are inputted to a control circuit 131. In a change-over circuit 132, the terminal R side for selecting an output signal of the demodulation circuit 31 is selected upon recording and the terminal P side for selecting an output signal of the demodulation circuit 60 is selected upon reproduction.

As apparent from the foregoing, the present embodiment makes it possible to control a multiplicity of VTR's selectively and simultaneously.

Also, the use of the change-over circuit 132 and a memory circuit makes it possible to record a signal while monitoring it in the form of a picture having a reduced number of frames, as explained in conjunction with the embodiment shown in FIG. 2.

Next, a still further embodiment of the present invention will be explained by use of FIG. 7. In the figure, reference numeral 301 denotes an input terminal for standard anal


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