Display device and manufacturing method of display device Number:7,520,790 from the United States Patent and Trademark Office (PTO) owispatent It is an object of the present invention to provide a reliable display device and a method for manufacturing the display device reducing the number of manufacturing steps, and with higher yield. A display device according to the invention includes a plurality of display elements each having a first electrode, a layer containing an organic compound, and a second electrode. The display device further includes a heat-resistant planarizing film over a substrate having an insulating surface, a first electrode over the heat-resistant planarizing film, a wiring covering an end portion of the first electrode, a partition wall covering the end portion of first electrode and the wiring, a layer containing an organic compound, and a second electrode over the layer containing an organic compound.<H manufacturing, display, Display, device, , 7520790.html, Patent, pto, 7520790

Title: Display device and manufacturing method of display device

Abstract: It is an object of the present invention to provide a reliable display device and a method for manufacturing the display device reducing the number of manufacturing steps, and with higher yield. A display device according to the invention includes a plurality of display elements each having a first electrode, a layer containing an organic compound, and a second electrode. The display device further includes a heat-resistant planarizing film over a substrate having an insulating surface, a first electrode over the heat-resistant planarizing film, a wiring covering an end portion of the first electrode, a partition wall covering the end portion of first electrode and the wiring, a layer containing an organic compound, and a second electrode over the layer containing an organic compound.

Patent Number: 7,520,790 Issued on 04/21/2009 to Yamazaki, et al.

Inventors: Yamazaki; Shunpei (Tokyo, JP), Sakakura; Masayuki (Kanagawa, JP), Nagai; Masaharu (Kanagawa, JP), Matsuda; Yutaka (Tochigi, JP), Akimoto; Kengo (Kanagawa, JP), Fujii; Gen (Kanagawa, JP), Yamaguchi; Tetsuji (Kanagawa, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd. (Kanagawa-ken, JP)

Appl. No.: 10/939,959

Filed: September 14, 2004

Foreign Application Priority Data


Sep 19, 2003 [JP]			2003-328928

Current U.S. Class: 445/24 ; 313/504; 313/506

Current International Class: H01J 9/20 (20060101); H01L 51/40 (20060101)

Field of Search: 313/504,506 445/24,25 427/66

References Cited [Referenced By]

U.S. Patent Documents


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6828725	December 2004	Kimura
6872607	March 2005	Tanaka
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6946330	September 2005	Yamazaki et al.
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2002/0134981	September 2002	Nakamura et al.
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2003/0071303	April 2003	Yamazaki et al.
2003/0094615	May 2003	Yamazaki et al.
2003/0127651	July 2003	Murakami et al.
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2004/0082195	April 2004	Yudasaka et al.
2004/0263072	December 2004	Park et al.
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2005/0052127	March 2005	Sakata et al.
2005/0062057	March 2005	Yamazaki et al.
2005/0067953	March 2005	Yamazaki et al.
2008/0088245	April 2008	Yamazaki et al.

Foreign Patent Documents


09-236826	Sep., 1997	JP

Primary Examiner: Guharay; Karabi
Attorney, Agent or Firm: Robinson; Eric J. Robinson Intellectual Property Law Office, P.C.

Claims

What is claimed is:

1. A manufacturing method of a display device comprising the steps of: forming a thin film transistor having a gate insulating film, a gate electrode and a semiconductor layer having a source region, a drain region and a channel forming region between the source and drain regions over a first substrate with an insulating surface; forming an insulating film over the thin film transistor; selectively forming a first electrode over the insulating film; forming an opening disposed above the source region or the drain region by selectively removing the insulating film; forming a contact hole reaching the source region or the drain region by selectively removing the gate insulating film; forming a conductive film on the first electrode and the insulating film; forming a source electrode or a drain electrode reaching the source region or the drain region, and a depression in the insulating film by selectively removing the conductive film and the insulating film; forming a partition wall covering the source electrode or the drain electrode, an end portion of the first electrode, and the depression in the insulating film; forming a layer containing an organic compound on the first electrode; forming a second electrode on the layer containing an organic compound; and encapsulating a display element including the first electrode, the layer containing an organic compound and the second electrode over the first substrate by pasting a second substrate to the first substrate with a sealant surrounding a peripheral portion of the display element.

2. A manufacturing method of a display device according to claim 1, wherein the insulating film is a silicon oxide film containing an alkyl group which is formed by a coating method.

3. A manufacturing method of a display device according to claim 1, wherein the partition wall is a silicon oxide film containing an alkyl group formed by a coating method.

4. A manufacturing method of a display device according to claim 1, wherein the first electrode is formed by sputtering using a target of indium tin oxide containing silicon oxide.

5. A manufacturing method of a display device comprising the steps of: forming a thin film transistor having a gate insulating film, a gate electrode and a semiconductor layer having a source region, a drain region and a channel forming region between the source and drain regions over a first substrate with an insulating surface; forming a heat-resistant planarizing film over the thin transistor; selectively forming a first electrode over the heat-resistant planarizing film; forming an opening disposed above the source region or the drain region by selectively removing the heat-resistant planarizing film; forming a contact hole reaching the source region or the drain region by selectively removing the gate insulating film; forming a conductive film on the first electrode and the heat-resistant planarizing film; forming a source electrode or a drain electrode reaching the source region or the drain region, and a depression in the heat-resistant planarizing film by selectively removing the conductive film and the heat-resistant planarizing film; forming a partition wall covering the source electrode or the drain electrode, an end portion of the first electrode, and the depression in the heat-resistant planarizing film; forming a layer containing an organic compound on the first electrode; forming a second electrode on the layer containing an organic compound; and encapsulating a display element including the first electrode, the layer containing an organic compound and the second electrode over the first substrate by pasting a second substrate to the first substrate with a sealant surrounding a peripheral portion of the display element.

6. A manufacturing method of a display device according to claim 5, wherein the heat-resistant planarizing film is a silicon oxide film containing an alkyl group which is formed by a coating method.

7. A manufacturing method of a display device according to claim 5, wherein the partition wall is a silicon oxide film containing an alkyl group formed by a coating method.

8. A manufacturing method of a display device according to claim 5, wherein the first electrode is formed by sputtering using a target of indium tin oxide containing silicon oxide.

9. A manufacturing method of a display device comprising the steps of: forming a thin film transistor having a gate insulating film, a gate electrode and a semiconductor layer having a source region, a drain region and a channel forming region between the source and drain regions over a substrate with an insulating surface; forming an insulating film over the thin film transistor; selectively forming a first electrode over the insulating film; forming an opening disposed above the source region or the drain region by selectively removing the insulating film; forming a contact hole reaching the source region or the drain region by selectively removing the gate insulating film; forming a conductive film on the first electrode and the insulating film; and forming a source electrode or a drain electrode reaching the source region or the drain region, and a depression in the insulating film by selectively removing the conductive film and the insulating film.

10. A manufacturing method of a display device according to claim 9, wherein the insulating film is a silicon oxide film containing an alkyl group which is formed by a coating method.

11. A manufacturing method of a display device according to claim 9, wherein the first electrode is formed by sputtering using a target of indium tin oxide containing silicon oxide.

12. A manufacturing method of a display device comprising the steps of: forming a thin film transistor having a gate insulating film, a gate electrode and a semiconductor layer having a source region, a drain region and a channel forming region between the source and drain regions over a substrate with an insulating surface; forming a heat-resistant planarizing film over the thin film transistor; selectively forming a first electrode over the heat-resistant planarizing film; forming an opening disposed above the source region or the drain region by selectively removing the heat-resistant planarizing film; forming a contact hole reaching the source region or the drain region by selectively removing the gate insulating film; forming a conductive film on the first electrode and the heat-resistant planarizing film; and forming a source electrode or a drain electrode reaching the source region or the drain region, and a depression in the heat-resistant planarizing film by selectively removing the conductive film and the heat-resistant planarizing film.

13. A manufacturing method of a display device according to claim 12, wherein the heat-resistant planarizing film is a silicon oxide film containing an alkyl group which is formed by a coating method.

14. A manufacturing method of a display device according to claim 12, wherein the first electrode is formed by sputtering using a target of indium tin oxide containing silicon oxide.

15. A manufacturing method of a display device comprising the steps of: forming a thin film transistor having a gate insulating film, a gate electrode and a semiconductor layer having a source region, a drain region and a channel forming region between the source and drain regions over a first substrate with an insulating surface; forming an insulating film over the thin film transistor; selectively forming a first electrode over the insulating film; forming an opening disposed above the source region or the drain region by selectively removing the insulating film; forming a contact hole reaching the source region or the drain region by selectively removing the gate insulating film; forming a conductive film on the first electrode and the insulating film; forming a source electrode or a drain electrode reaching the source region or the drain region, and a depression in the insulating film by selectively removing the conductive film and the insulating film; forming a partition wall covering the source electrode or the drain electrode, an end portion of the first electrode, and the depression in the insulating film; forming a layer containing an organic compound on the first electrode; forming a second electrode on the layer containing an organic compound; and encapsulating a display element including the first electrode, the layer containing an organic compound and the second electrode over the first substrate by pasting a second substrate to the first substrate with a sealant surrounding a peripheral portion of the display element, wherein a material of the partition wall is the same as a material of the insulating film, and wherein the material of the insulating film is a silicon oxide film containing an alkyl group.

16. A manufacturing method of a display device according to claim 15, wherein the insulating is formed by a coating method.

17. A manufacturing method of a display device according to claim 15, wherein the partition wall is a silicon oxide film containing an alkyl group formed by a coating method.

18. A manufacturing method of a display device according to claim 15, wherein the first electrode is formed by sputtering using a target of indium tin oxide containing silicon oxide.

19. A manufacturing method of a display device comprising the steps of: forming a thin film transistor having a gate insulating film, a gate electrode and a semiconductor layer having a source region, a drain region and a channel forming region between the source and drain regions over a first substrate with an insulating surface; forming a heat-resistant planarizing film over the thin film transistor; selectively forming a first electrode over the heat-resistant planarizing film; forming an opening disposed above the source region or the drain region by selectively removing the heat-resistant planarizing film; forming a contact hole reaching the source region or the drain region by selectively removing the gate insulating film; forming a conductive film on the first electrode and the heat-resistant planarizing film; forming a source electrode or a drain electrode reaching the source region or the drain region, and a depression in the heat-resistant planarizing film by selectively removing the conductive film and the heat-resistant planarizing film; forming a partition wall covering the source electrode or the drain electrode, an end portion of the first electrode, and the depression in the heat-resistant planarizing film; forming a layer containing an organic compound on the first electrode; forming a second electrode on the layer containing an organic compound; and encapsulating a display element including the first electrode, the layer containing an organic compound and the second electrode over the first substrate by pasting a second substrate to the first substrate with a sealant surrounding a peripheral portion of the display element, wherein a material of the partition wall is the same as a material of the heat-resistant planarizing film, and wherein the material of the heat-resistant planarizing film is a silicon oxide film containing an alkyl group.

20. A manufacturing method of a display device according to claim 19, wherein the heat-resistant planarizing film is formed by a coating method.

21. A manufacturing method of a display device according to claim 19, wherein the partition wall is a silicon oxide film containing an alkyl group formed by a coating method.

22. A manufacturing method of a display device according to claim 19, wherein the first electrode is formed by sputtering using a target of indium tin oxide containing silicon oxide.

23. A manufacturing method of a display device comprising the steps of: forming a thin film transistor having a gate insulating film, a gate electrode and a semiconductor layer having a source region, a drain region and a channel forming region between the source and drain regions over a substrate with an insulating surface; forming an insulating film over the thin film transistor; selectively forming a first electrode over the insulating film; forming an opening disposed above the source region or the drain region by selectively removing the insulating film; forming a contact hole reaching the source region or the drain region by selectively removing the gate insulating film; forming a conductive film on the first electrode and the insulating film; forming a source electrode or a drain electrode reaching the source region or the drain region, and a depression in the insulating film by selectively removing the conductive film and the insulating film, and forming a partition wall covering the source electrode or the drain electrode, an end portion of the first electrode, and the depression in the insulating film, wherein a material of the partition wall is the same as a material of the insulating film, and wherein the material of the insulating film is a silicon oxide film containing an alkyl group.

24. A manufacturing method of a display device according to claim 23, wherein the insulating film is formed by a coating method.

25. A manufacturing method of a display device according to claim 23, wherein the first electrode is formed by sputtering using a target of indium tin oxide containing silicon oxide.

26. A manufacturing method of a display device comprising the steps of: forming a thin film transistor having a gate insulating film, a gate electrode and a semiconductor layer having a source region, a drain region and a channel forming region between the source and drain regions over a substrate with an insulating surface; forming a heat-resistant planarizing film over the thin film transistor; selectively forming a first electrode over the heat-resistant planarizing film; forming an opening disposed above the source region or the drain region by selectively removing the heat-resistant planarizing film; forming a contact hole reaching the source region or the drain region by selectively removing the gate insulating film; forming a conductive film on the first electrode and the heat-resistant planarizing film; forming a source electrode or a drain electrode reaching the source region or the drain region, and a depression in the heat-resistant planarizing film by selectively removing the conductive film and the heat-resistant planarizing film, and forming a partition wall covering the source electrode or the drain electrode, an end portion of the first electrode and the depression in the heat-resistant planarizing film, wherein a material of the partition wall is the same as a material of the heat-resistant planarizing film, and wherein the material of the heat-resistant planarizing film is a silicon oxide film containing an alkyl group.

27. A manufacturing method of a display device according to claim 26, wherein the heat-resistant planarizing film is formed by a coating method.

28. A manufacturing method of a display device according to claim 26, wherein the first electrode is formed by sputtering using a target of indium tin oxide containing silicon oxide.

Description

BACKGROUND OF THE INVENTION

1. Field of the Invention

The invention relates to a display device having an element in which a light emitting material is sandwiched between electrodes (hereinafter referred to as a light emitting element).

2. Description of the Related Art

Recently, the development of a liquid crystal display device and an electroluminescent display device in which thin film transistors (TFTs) are integrated over a glass substrate has been in progress. As to each of such display devices, TFTs are manufactured over a glass substrate by thin film formation technologies, and a liquid crystal element or a light emitting element (electroluminescent (hereinafter simply referred to as EL) element) formed over various circuits configured with the thin film transistors, thus functions as a display device.

A circuit formed with TFTs has some surface irregularities, hence in forming the liquid crystal elements or the light emitting elements over the circuit, the circuit is generally planarized with an organic resin film or the like (Reference 1: Japanese Patent Laid-Open No. 9-236826). Each pixel provided for a display area of a display device includes a pixel electrode inside, and the pixel electrode is connected to a TFT through a contact hole formed in the organic resin film used for planarization.

(Patent Document 1)

Japanese Patent Laid-Open No. 9-236826

SUMMARY OF THE INVENTION

In the display device (panel) using the above light emitting element, the moisture which enters inside leads a serious decrease in reliability, and a dark spot, shrink, and reduction in luminance from a peripheral part of a display device. The dark spot is a phenomenon in which luminance reduces (or vanishes) partially, and which occurs, for example, when a top electrode has a hole. The shrink is a phenomenon in which luminance reduces from an end portion (edge) of a pixel.

In manufacturing steps of a display device, it is advantageous to perform heat treatment and the like for removing moisture and improving the reliability. Accordingly, an interlayer insulating film used for planarization is required to be highly heat resistant and electrically insulative, and having high planarization coefficient.

It is an object of the present invention to provide a reliable display device and a method for manufacturing the display device, reducing the number of manufacturing steps, and with higher yield.

According to the invention, an interlayer insulating film for planarization is required to be highly heat resistant and electrically insulative, and having high planarization coefficient. Such an interlayer insulating film is preferably formed by a coating method such as spin coating rather than by deposition method such as CVD.

Specifically, it is preferable to use a heat-resistant planarizing film obtained by the coating method for an interlayer insulating film and a partition wall. As a material for the interlayer insulating film and the partition wall, a coating film in which a skeletal structure is constructed by allowing silicon (Si) and oxygen (O) to bond with each other, and a substituent contains at least one of hydrogen, fluorine, an alkyl group, and aromatic hydrocarbon is used. The coating film is then baked, thereby obtaining a SiOx film containing an alkyl group. The SiOx film containing an alkyl group has higher light transmitting properties than those of acrylic resin, and can withstand a heat treatment at a temperature of 300.degree. C. or more.

In the invention, the method for forming an interlayer insulating film by a coating method is shown in the following. Initially, thinner pre-wet treatment is performed to improve wettability after performing washing with purified water. A liquid material called varnish, in which a low-molecular weight component (precursor) including a silicon (Si)-oxygen (O) bond is dissolved in a solvent, is applied over the substrate by spin coating or the like. Thereafter, the varnish coating the substrate is heated to volatilize (or evaporate) the solvent and to develop cross-linking reaction of the low-molecular weight compound, thereby obtaining a thin film. The coating film formed at the periphery of the substrate is partially removed. In the case of forming the partition wall, the resultant coating film may be patterned to a predetermined shape. The film thickness of the thin coating film is controlled by varying the spin number; rotation time; and density and viscosity of the varnish.

By forming the interlayer insulating film and the partition wall of the same material, manufacturing costs can be reduced. In addition, costs can be reduced by sharing a device such as a device for forming a coating film and an etching device.

An EL element using a layer containing an organic compound as a light emitting layer generally use ITO (indium tin oxide) as a first electrode (an anode or cathode). However, the refractive index of ITO is as high as about 2. Correspondingly, in the present invention, the first electrode is formed of indium tin oxide containing silicon oxide (hereinafter referred to as "ITSO"). When ITSO is baked, ITSO remains in amorphous state while ITO is crystallized by bake. As compared with ITO, ITSO has superior leveling properties, and short circuit to a cathode hardly occurs even if the layer including an organic compound is thin in thickness. Accordingly, the ITSO is more suitable for the anode of the display element than ITO. Furthermore, ITSO is added with silicon oxide having a refractive index of around 1.46 such that the refractive index of the ITSO, which serves as the anode, is varied properly.

Further, as to a display device using ITSO for an electrode and using a heat-resistant planarizing film obtained by a coating method for an interlayer insulating film, heat generation of the display device is suppressed; thus, the reliability of the display device is improved.

As to a display element according to the invention, a stack which light emitted from a light emitting layer is transmitted therethrough to the outside of a substrate is formed from a highly light transmitting material; thus, the luminous efficiency is improved.

Further, light from the display element is reflected and diffused in different directions, and absorbed by different parts (material layers). According to the invention, parts which light is not transmitted therethrough to the outside of a substrate, for example, a partition wall, are formed of a highly light transmitting material, and the luminous efficiency can be improved by reducing absorption of the light in the parts.

Further, in the invention, the source electrode and the drain electrode that are to be wirings are formed on a first electrode to be an anode or a cathode. As to the formation of the wirings, since the first electrode is used as a stopper in etching, a layer serving as an etching stopper is not necessary; thus, the process is simplified. Consequently, display devices can be manufactured with higher yield and at lower cost.

A display device according to the invention includes: a substrate having an insulating surface; a heat-resistant planarizing film over the substrate having the insulating surface; a first electrode on the heat-resistant planarizing film; a wiring covering an end portion of the first electrode; a partition wall covering the end portion of the first electrode and the wiring; a layer containing an organic compound on the first electrode; and a second electrode on the layer containing an organic compound. Further, the display device includes a plurality of display elements each including the first electrode, the layer containing an organic compound, and the second electrode.

According to the above structure, the heat-resistant planarizing film and the partition wall are formed of the same material and a SiOx film having an alkyl group can be used for the material. Further, the first electrode can use indium tin oxide containing silicon oxide (SiOx).

A display device according to the invention includes a plurality of display elements each having a first electrode, a layer containing an organic compound, and a second electrode. In a light-emitting area, light from the display element is transmitted through the first electrode, the heat-resistant planarizing film containing silicon oxide (SiOx), and a substrate having an insulating surface.

Further according to each structure above, the light emitting element can emit red, green, blue, or white light.

According to one aspect of the invention, a method for manufacturing a display device having a thin film transistor and a display element over a first substrate with an insulating surface, includes the steps of: forming a thin film transistor having a gate insulating film, a gate electrode and a semiconductor layer having a source region, a drain region and a channel forming region between the source and drain regions over the first substrate with an insulating surface; forming a heat-resistant planarizing film on irregularities due to the thin film transistor; selectively forming a first electrode on the heat-resistant planarizing film; selectively removing the heat-resistant planarizing film so as to form an opening disposed above the source region or the drain region; selectively removing the gate insulating film so as to form a contact hole, which reaches to the source region or the drain region; forming a conductive film on the first electrode and the heat-resistant planarizing film; selectively removing the conductive film and the heat-resistant planarizing film; forming a source electrode and a drain electrode which respectively reach the source region and the drain region, and a depression in the heat-resistant planarizing film; forming a partition wall which covers the source electrode and the drain electrode, an end portion of the first electrode, and the depression in the heat-resistant planarizing film; forming a layer containing an organic compound on the first electrode; forming a second electrode on the layer containing an organic compound; and encapsulating a second substrate to the first substrate with a sealant.

In the above-mentioned structure, the heat-resistant planarizing film or the partition wall may use a silicon oxide (SiOx) film having an alkyl group formed by a coating method. Further, the anode may be formed by sputtering using a target composed of indium tin oxide containing silicon oxide (SiOx).

Further, in the above-described structure, the display device is applicable to either an active matrix light emitting display device or a passive matrix light emitting display device.

A light emitting element (EL element) which is a display element has a layer containing an organic compound which generates electroluminescence by being applied with an electric field (hereinafter referred to as an EL layer), an anode, and a cathode. Luminescence generated in the organic compound includes luminescence that is generated when an singlet excited state returns to a ground state (fluorescence) and luminescence that is generated when an triplet exited state returns to a ground state (phosphorescence). The display device manufactured according to the invention is applicable to each case of using fluorescence and phosphorescence.

The light emitting element (EL element) including an EL layer has a structure in which the EL layer is sandwiched between a pair of electrodes. The EL layer generally has a layered structure. Typically, a layered structure of: a hole transport layer/a light emitting layer/an electron transporting layer in this order is known. This structure of the EL layer exhibits extremely high light-emitting efficiency. Therefore, this layered structure is used in almost all of display devices which have been researched and developed now.

Another structure in which an anode, a hole injection layer, a hole transport layer, a light emitting layer, and an electron transport layer are stacked in this order; or a structure in which an anode, a hole injection layer, a hole transport layer, a light emitting layer, an electron transport layer, and an electron injection layer are stacked in this order may be used. The light emitting layer may be doped with fluorescent pigment or the like. Further, each of the layers may be composed of either a low-molecular weight material or a high-molecular weight material. A layer containing an inorganic compound may also be used. In this specification, a stack of all layers formed between an electrode serving as a cathode and an electrode serving as an anode are generically referred to as the EL layer. Accordingly, the EL layer includes all of the hole injection layer, hole transport layer, light emitting layer, electron transport layer, and electron injection layer.

In the light emitting display device of the invention, the method for driving screen display is not particularly limited. For example, a dot sequential driving method, a line sequential driving method, a surface sequential driving method, or the like may be used. A line sequential driving method is typically used, and a time gray scale driving method or an area gray scale driving method may also be appropriately employed. Further, image signals input to a source line of the light emitting display device may be either analog signals or digital signals. Driver circuits and the like may be appropriately designed according to the image signals.

Light emitting display devices using digital video signals includes ones in which video signals are input to a pixel at a constant voltage (CV), and ones in which video signals are input to a pixel at a constant current (CC). The light emitting devices in which video signals are input to a pixel at a constant voltage (CV) are further classified into ones in which a constant voltage is applied to a light emitting element (CVCV), and others in which a constant current is applied to a light emitting element (CVCC). Also, the light emitting device in which video signals are input to a pixel at a constant current (CC) is classified into ones in which a constant voltage is applied to a light emitting element (CCCV), and others in which a constant current is supplied to a light emitting element (CCCC).

In this specification, the light transmittance indicates a ratio of light released out through the transparent substrate to initial light from the light emitting element.

The invention can be applied to any TFT structure, for example, a top-gate TFT, a bottom-gate (inverted-staggered type) TFT, or a staggered TFT.

As for an active layer of a TFT, an amorphous semiconductor film, a semiconductor film having a crystalline structure, a compound semiconductor film having an amorphous structure, and the like can be arbitrarily used. Alternativly, the active layer of the TFT may be formed of a semiamorphous semiconductor film (also referred to as a microcrystalline semiconductor film) having an intermediate structure between an amorphous structure and a crystalline structure (including a single crystalline structure, and a polycrystalline structure). The semiamorphous semiconductor film has a third condition that is stable with respect to free energy, and includes a crystalline region having short-distance order and lattice distortion. Further, at least a part of the semiamorphous semiconductor film includes a crystal grain of from 0.5 nm to 20.0 nm in size, and Raman spectrum is shifted to a lower wavenumber than 520 cm.sup.-1. The diffraction peak of (111) and (220), which is believed to be originated in a crystalline silicon lattice, is observed in the semiamorphous semiconductor film by X-ray diffraction. Further, the semiamorphous semiconductor film is added with hydrogen or halogen of at least 1 atom % as a terminator for dangling bonds. The semiamorphous semiconductor film is formed by glow discharge decomposition with silicide gas (by plasma CVD). As for the silicide gas, Si.sub.2H.sub.6, SiH.sub.2Cl.sub.2, SiHCl.sub.3, SiCl.sub.4, SiF.sub.4, and the like can be used, besides SiH.sub.4. The silicide gas may also be diluted with H.sub.2 or a mixture of H.sub.2 and at least one rare gas selected from the group consisting of He, Ar, Kr, and Ne. The dilution ratio may be in the range of from 1:2 to 1:1,000. The pressure may be approximately in the range of from 0.1 Pa to 133 Pa. The power frequency is in the range of from 1 MHz to 120 MHz, preferably 13 MHz to 60 MHz. The substrate heating temperature may be set at 300.degree. C. or less, preferably from 100.degree. C. to 250.degree. C. As for impurity elements contained in the film, each concentration of impurities in atmospheric constituents such as oxygen, nitrogen, and carbon is preferably set at 1.times.10.sup.20 cm.sup.-1 or less. In particular, the oxygen concentration is set at 5.times.10.sup.19 atoms/cm.sup.3 or less; more preferably, 1.times.10.sup.19 atoms/cm.sup.3 or less. The electric field effect mobility .mu. of the TFT using the semiamorphous semiconductor film as the active layer is in the range of from 1 cm .sup.2/Vsec to 10 cm.sup.2/Vsec.

According to a heat resistant planarizing film of the invention, wiring defects of a display element can be prevented by eliminating irregularities due to a gate electrode or a semiconductor layer in a display device forming a TFT. The heat resistant planarizing film of the invention can have high light transmittance and preferable display properties.

In addition, in a light emitting display device using a layer containing an organic compound as a light emitting layer; the reliability can be improved by providing an interlayer insulating film which has the small amount of dehydration and degasification.

By using a structure of the display device according to the invention, the number of steps is simplified and display devices can be manufactured with higher yield and at lower cost.

BRIEF DESCRIPTION OF THE DRAWING

FIGS. 1A to 1D are figures showing a structure according to the present invention.

FIGS. 2A and 2B are figures showing a structure according to the invention.

FIGS. 3A to 3C are figures showing a spin-coating device and edge removers.

FIG. 4 is a flow chart a film formation of a heat-resistant planarizing film.

FIG. 5 is a cross-sectional view of a light emitting display device of the invention.

FIG. 6 is a cross-sectional view of a light emitting display device of the invention.

FIG. 7 is a cross-sectional view of a light emitting display device of the invention.

FIG. 8 is a cross-sectional view of a light emitting display device of the invention.

FIG. 9 is a cross-sectional view of a light emitting display device of the invention.

FIGS. 10A to 10E are figures which show display devices according to the invention.

FIG. 11 is a figure which shows a display device according to the invention.

FIG. 12 is a graph showing a light transmittance.

FIG. 13 is a graph showing refractive index.

FIG. 14 is a top view of a display device according to the invention.

FIGS. 15A and 15B respectively show a top view and a cross-sectional view of a display device according to the invention.

FIGS. 16A and 16B is a top view and cross-sectional view of the invention.

FIGS. 17A and 17B is a coupling model in lamination of film.

DETAILED DESCRIPTION OF THE INVENTION

EMBODIMENT MODE

Embodiment modes of the present invention will be described below.

As a base film 101, a silicon nitride oxide film 101b with a thickness of 10 nm to 200 nm (preferably, from 50 nm to 100 nm) is formed on a substrate 100 having an insulating surface, and a silicon oxynitride film with a thickness of 50 nm to 200 nm (preferably, from 100 nm to 150 nm) is stacked thereover by plasma CVD. As for the substrate 100, a glass substrate, a quartz substrate, a silicon substrate, a metal substrate, or a stainless substrate each of which has an insulating film on its surface may be used. In addition, a plastic substrate or a flexible substrate, which can withstand processing temperatures in this embodiment mode, may be used. Further, a two-layer structure may be used for the base film, and a single-layer film or a layered structure having more than two layers of the base (insulating) film may also be used.

Subsequently, a semiconductor film is formed on the base film. The semiconductor film may be formed with a thickness of 25 nm to 200 nm (preferably, from 30 nm to 150 nm) by a known technique (sputtering, LPCVD, plasma CVD, or the like). A material for the semiconductor film is not particularly limited, however, the semiconductor film is preferably formed of silicon or silicon germanium (SiGe) alloy.

A semiconductor film uses an amorphous semiconductor (typically hydrogenated amorphous silicon) or a crystalline semiconductor (typically polysilicon) as a material. Polysilicon includes what is called high-temperature polysilicon which uses polycrystalline silicon processed at 800.degree. C. or more as a main component, what is called low temperature polysilicon which uses polycrystalline silicon processed at 600.degree. C. or less, and crystalline silicon which is crystallized by being added with an element promoting crystallization, or the like.

As another material, a semiamorphous semiconductor film or a semiconductor film, a part of which has crystal phase may be used. A semiamorphous semiconductor has an intermediate structure between amorphous structure and crystalline structure (including single crystal and polycrystal). The semiamorphous semiconductor has a third condition that is stable with respect to free energy, and includes a crystalline region having short-distance order and lattice distortion. Typically, the semiamorphous semiconductor contains silicon as a main component, and Raman spectrum is shifted to a lower wavenumber than 520 cm.sup.-1 with the distortion. Hydrogen or halogen of at least 1 atom % as a terminator for dangling bonds is added. Here, such a semiconductor is referred to as a semiamorphous semiconductor (abbreviated as an SAS). The SAS is also called a microcrystalline semiconductor (typically, microcrystalline silicon).

The SAS can be obtained by glow discharge decomposition of silicide gas. Typically, SiH.sub.4 is used as a silicide gas, though Si.sub.2H.sub.6, SiH.sub.2Cl.sub.2, SiHCl.sub.3, SiCl.sub.4, SiF.sub.4 or the like may be used as well. The formation of the SAS can be facilitated by using the silicide gas, which is diluted with hydrogen or a mixture of hydrogen and at least one rare gas selected from the group consisting of helium, argon, krypton, and neon. A dilution ratio of hydrogen against the silicide gas is, for example, preferably in the range of from 5 times to 1000 times in terms of flow volume ratio. Naturally, it is preferable that the formation of SAS by glow discharge decomposition is performed under reduced pressure, the formation can also be performed by using discharge at atmospheric pressure. As a representative example, the formation may be performed in the pressure range of from 0.1 Pa to 133 Pa. The power supply frequency for generating the glow discharge is in the range of 1 MHz to 120 MHz, and more preferably, in the range of 13 MHz to 60 MHz. A high-frequency power supply may be set appropriately. A temperature for heating the substrate is preferably 300.degree. C. or less, and the temperature in the range of from 100.degree. C. to 200.degree. C. is also permissible. Among impurity elements which are mainly added in forming a film, atmospheric elements such as oxygen, nitrogen and carbon desirably have a concentration of 1.times.10.sup.20 cm.sup.-3 or less. In particular, the concentration of oxygen is 5.times.10.sup.19 cm.sup.-3 or less, and more preferably 1.times.10.sup.19 cm.sup.-3 or less. Better SAS can be obtained by adding a rare gas element such as helium, argon, krypton, neon, or the like, thereby promoting lattice distortion; thus, the stability is improved.

In this embodiment mode, the amorphous silicon film may be crystallized by thermal crystallization and laser crystallization with the use of a metal element for promoting crystallization. Alternatively, without introducing the metal element into the amorphous silicon film, hydrogen included in the amorphous silicon film may be released to lower hydrogen concentration to 1.times.10.sup.20 atoms/cm.sup.3 or less by heating under a nitrogen atmosphere at a temperature of 500.degree. C. for one hour. Thereafter, the laser crystallization may be performed. The dehydrogenation is performed because the amorphous silicon film is damaged by laser irradiation when the film contains much hydrogen.

Nickel is used as the metal element, and is doped into the amorphous silicon film by solution coating method. The method of doping the metal element into the amorphous silicon film is not particularly limited on condition that the metal element can be on the surface thereof or inside the amorphous silicon film. For example, a method such as sputtering, CVD, plasma processing (including plasma CVD), adsorption, and a method for applying a metal salt solution can be employed. Among them, the method using the metal salt solution is simply and easily performed, and is useful for easily adjusting concentration of the metal element. At this time, an oxide film is preferably formed by ultraviolet (UV) ray irradiation under an oxygen atmosphere, thermal oxidation, treatment with ozone water or hydrogen peroxide including hydroxyl radical, and the like in order to improve wettability of the surface of the amorphous silicon film and to spread aqueous solution over the entire surface of the amorphous silicon film.

Subsequently, heat treatment is performed at a temperature of 500.degree. C. to 550.degree. C. for 4 hours to 20 hours to crystallize the amorphous silicon film; thus a first crystalline silicon film is formed.

Next, the first crystalline silicon film is irradiated with a laser beam to promote crystallization, and thus, a second crystalline silicon film is obtained. Laser crystallization is performed by irradiating the semiconductor film with a laser beam. A pulsed or continuous oscillation solid-state laser, a gas laser, or a metal laser is preferably used for the laser crystallization. The solid-state laser includes YAG laser, YVO.sub.4 laser, YLF laser, YAlO.sub.3 laser, glass laser, ruby laser, alexandrite laser, Ti:sapphire laser, and the like. The gas laser includes excimer laser, Ar laser, Kr laser, CO.sub.2 laser, and the like. The metal laser includes helium cadmium laser, copper vapor laser, and gold vapor laser. The laser beam may be converted to higher harmonics by a nonlinear optical element. A crystal used for the nonlinear optical element such as LBO, BBO, KDP, KTP, KB5, and CLBO is superior in conversion efficiency. The conversion efficiency can be drastically increased by incorporating such a nonlinear optical element into a laser resonator. A laser of the higher harmonics is typically doped with Nd, Yb, Cr, and the like, and these are excited to oscillate laser beam. The type of a dopant may be appropriately selected by those who operate the present invention. The semiconductor film includes an amorphous semiconductor film, a microcrystalline semiconductor film, and a crystalline semiconductor film; further, a compound semiconductor film having an amorphous structure such as an amorphous silicon germanium film or an amorphous silicon carbide film may also be used.

A minute amount of impurity elements (boron or phosphorous) is doped into thus obtained crystalline semiconductor film to control the threshold value of a TFT.

A first photomask is formed and patterned by photolithography so as to form a semiconductor layer 102.

Subsequently, a gate insulating film 105 covering the semiconductor layer 102 is formed. The gate insulating film 105 is formed with an insulating film containing silicon with a thickness of 40 nm to 150 nm by plasma CVD or sputtering. The material for the gate insulating film is not limited to a silicon oxynitride film, and other insulating films with a single layer structure or a layered structure may be used.

A first conductive film with a film thickness of 20 nm to 100 nm and a second conductive film with a film thickness of 100 nm to 400 nm, each of which serves as a gate electrode are formed and stacked over the gate insulating film 105. The first and the second conductive films may be made of an element selected from Ta, W, Ti, Mo, Al, and Cu, or an alloy material or a compound material having the foregoing element as a main component. A semiconductor film represented by a polycrystalline silicon film that is doped with an impurity element such as phosphorus or AgPdCu alloy may be used as the first and the second conductive films. The conductive films are not limited to the two-layer structure, and, for example, a three-layer structure in which a 50 nm thick tungsten film, a 500 nm thick alloy film of aluminum and silicon (Al--Si), and a 30 nm thick titanium nitride film are sequentially stacked may be applied. In the case of the three-layer structure, tungsten nitride may be used as substitute for tungsten of the first conductive film; an alloy film of aluminum and titanium (Al--Ti) may be used as substitute for an alloy film of aluminum and silicon (Al--Si) of the second conductive film; or a titanium film may be used as substitute for a titanium nitride film of a third conductive film. Further, a single layer structure may also be used.

Next, a second photomask made of resist is formed by photolithography, and a first etching treatment is performed to form an electrode and a wiring. The first conductive film and the second conductive film can be etched to a desired tapered shape by appropriately adjusting etching conditions (such as electric energy applied to a coil-shaped electrode, electric energy applied to an electrode on a substrate side, and temperature of the electrode on the substrate side) with the use of ICP (Inductively Coupled Plasma) etching. For an etching gas, a chlorine-based gas typified by Cl.sub.2, BCl.sub.3, SiCl.sub.4, CCl.sub.4 and the like; a fluorine-based gas typified by CF.sub.4, SF.sub.6, NF.sub.3 and the like; or O.sub.2 can be appropriately used.

A first-shape conductive layer including a first conductive layer and a second conductive layer is formed by the first etching treatment.

Subsequently, a second etching treatment is performed without removing the mask made of resist. Here, a W film is etched selectively. Then, the second conductive layer is formed by the second etching treatment. Meanwhile, the first conductive layer is hardly etched, and a second-shape conductive layer is formed. Thus, conductive films 106 and 107 are formed. In this embodiment, the conductive layers are formed by dry etching; however, wet etching may be applied alternatively.

Next, a resist mask is newly formed by using a third photomask after removing the resist mask. A first doping step is performed to dope an impurity element which imparts n-type conductivity (typically, phosphorus (P) or As) to a semiconductor at low concentrations to form an n-channel TFT not shown herein. The resist mask covers a region which is to serve as a p-channel TFT and a region adjacent to the conductive layer. A low concentration impurity region is formed by this first doping step through the insulating film. Although a plurality of TFTs are used to drive one light emitting element, the above-mentioned doping step is not necessary when the light emitting element is driven by only p-channel TFTs.

Then, a resist mask is newly formed by using a fourth photomask after removing the resist mask. A second doping step is performed to dope an impurity element which imparts p-type conductivity (typically, boron (B)) to a semiconductor at high concentrations. P-type high concentration impurity regions 103 and 104 are formed by performing doping through the gate insulating film 105 by the second doping step.

Then, a resist mask is newly formed by using a fifth photomask. A third doping step is performed to dope an impurity element which imparts n-type conductivity (typically, phosphorus or As) to a semiconductor at high concentrations to form an n-channel TFT not shown herein. The third doping step is performed under the condition that the amount of doze is set at from 1.times.10.sup.13 atoms/cm.sup.2 to 5.times.10.sup.15 atoms/cm.sup.2; and the acceleration voltage, from 60 keV to 100 keV. The resist mask covers a region which serves as a p-channel TFT and a region adjacent to the conductive layer. An n-type high concentration impurity region is formed by performing doping through the gate insulating film 105 by the third doping step.

Through the above steps, an impurity regions are formed in each semiconductor layer.

Next, the mask made of resist is removed, and an insulating film 108 containing hydrogen is formed as a passivation film. The insulating film 108 is formed with an insulating film containing silicon to a thickness from 100 nm to 200 nm by plasma CVD or sputtering. The insulating film 108 is not limited to a silicon nitride film, and a silicon nitride oxide (SiNO) film by plasma CVD, or a single layer or a stack of other insulating films containing silicon may be used.

Moreover, the step for hydrogenating the semiconductor layers is performed by heat treatment at a temperature of 300.degree. C. to 550.degree. C. for 1 hour to 12 hours under a nitrogen atmosphere. The step is preferably performed at a temperature of 400.degree. C. to 500.degree. C. The step is a step for terminating dangling bonds of the semiconductor layers due to hydrogen contained in the insulating film 108.

The insulating film 108 is formed of a material selected from silicon nitride, silicon oxide, silicon oxynitride (SiON), silicon nitride oxide (SiNO), aluminum nitride (AlN), aluminum oxynitride (AlON), aluminum nitride oxide having more nitrogen content than oxygen content (AlNO), aluminum oxide, diamond like carbon (DLC), and a nitrogen-containing carbon film (CN) film. Alternatively, a material in which a skeletal structure is constructed by allowing silicon (Si) and oxygen (O) to bond with each other, and a substituent contains at least hydrogen, or at least one of fluorine, an alkyl group, and aromatic hydrocarbon (typical