Driving method for driving a display device including display pixels, each of which includes a switching element and a pixel electrode, display device, and medium Number:7,522,127 from the United States Patent and Trademark Office (PTO) owispatent Out of two display pixels connected to the same gate line G2, a display pixel (A) is connected to a source line S2, and a display pixel (B) is connected to a source line S3, which is adjacent to the source line S2 and forms a parasitic capacitance with a pixel electrode of the display pixel (A). A write signal for a display pixel (A) is obtained by correcting an input signal for the display pixel (A) in accordance with an input signal for a display pixel (B) or a write signal for the display pixel (B). With this arrangement, it is possible to reduce crosstalk between the two display pixels in a display device, such as a liquid crystal display device, that drives display pixels through a plurality of source lines and a plurality of gate lines.<H electrode, switching, Driving, method, , 7522127.html, Patent, pto, 7522127

Title: Driving method for driving a display device including display pixels, each of which includes a switching element and a pixel electrode, display device, and medium

Abstract: Out of two display pixels connected to the same gate line G2, a display pixel (A) is connected to a source line S2, and a display pixel (B) is connected to a source line S3, which is adjacent to the source line S2 and forms a parasitic capacitance with a pixel electrode of the display pixel (A). A write signal for a display pixel (A) is obtained by correcting an input signal for the display pixel (A) in accordance with an input signal for a display pixel (B) or a write signal for the display pixel (B). With this arrangement, it is possible to reduce crosstalk between the two display pixels in a display device, such as a liquid crystal display device, that drives display pixels through a plurality of source lines and a plurality of gate lines.

Patent Number: 7,522,127 Issued on 04/21/2009 to Nakamoto, et al.

Inventors: Nakamoto; Tatsuya (Mie, JP), Shiomi; Makoto (Tenri, JP), Shigeta; Mitsuhiro (Mie, JP)
Assignee: Sharp Kabushiki Kaisha (Osaka, JP)

Appl. No.: 11/012,119

Filed: December 16, 2004

Foreign Application Priority Data


Dec 17, 2003 [JP]			2003-419535
Dec 13, 2004 [JP]			2004-360440

Current U.S. Class: 345/58

Current International Class: G09G 3/20 (20060101)

Field of Search: 345/58,90-101,694

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Primary Examiner: Lefkowitz; Sumati
Assistant Examiner: Carter, III; Robert E
Attorney, Agent or Firm: Harness, Dickey & Pierce, PLC

Claims

What is claimed is:

1. A method of driving a display device including display pixels each of which includes a switching element and a pixel electrode, each of the display pixels being provided at an intersection of one of a plurality of gate lines and one of a plurality of source lines, wherein: a first display pixel and a second display pixel are connected to the same gate line, and the second display pixel is connected to a source line that is adjacent to a source line connected to the first display pixel and that forms a parasitic capacitance with the pixel electrode of the first display pixel; and a write signal for the first display pixel is obtained by correcting an input signal for the first display pixel in accordance with an input signal for the second display pixel or a write signal for the second display pixel, wherein: a write signal gradation for the first display pixel is a sum of an input signal gradation for the first display pixel and a correction gradation F(g) represented by F(g)=Csd(Ugad-Ubad)/Cp(U(g+1)-U(g)) where Cp is a capacitance value of the first display pixel, Csd is a capacitance value of the parasitic capacitance formed between the source line connected to the second display pixel and the pixel electrode of the first display pixel, U(g) is an input signal voltage for the first display pixel when a level of an input signal gradation for the first display pixel is g, Ugad is an input signal voltage or a write signal voltage for the second display pixel, and Ubad is a voltage to be applied to a common electrode, which is opposed to each display pixel.

2. A method of driving a display device including display pixels each of which includes a switching element and a pixel electrode, each of the display pixels being provided at an intersection of one of a plurality of gate lines and one of a plurality of source lines, wherein: a first display pixel and a second display pixel are connected to the same gate line, and the second display pixel is connected to a source line that is adjacent to a source line connected to the first display pixel and that forms a parasitic capacitance with the pixel electrode of the first display pixel; and a write signal for the first display pixel is obtained by correcting an input signal for the first display pixel in accordance with an input signal for the second display pixel or a write signal for the second display pixel, wherein: if an effective voltage Va is required in order to display a desired gradation by the first display pixel, a write signal voltage for the first display pixel is a voltage V(A) represented by V(A)=(Cp.times.Va-Cgd.times.Vg-Csdb.times.V(B)+Ccs.times.Vc)/(Cp+Csda) where V(B) is an input signal voltage or a write signal voltage for the second display pixel, Csda is a capacitance value of a parasitic capacitance formed between the source line connected to the first display pixel and the pixel electrode of the first display pixel, Csdb is a capacitance value of the parasitic capacitance formed between the source line connected to the second display pixel and the pixel electrode of the first display pixel, Cgd is a capacitance value of a parasitic capacitance formed between the gate line connected to the first display pixel and the pixel electrode of the first display pixel, Ccs is a capacitance value of a parasitic capacitance formed between a storage capacitor electrode, which is provided so as to correspond to the first display pixel, and a drain electrode of the switching element of the first display pixel, Vg is a voltage to be applied to the first gate line, Vc is a voltage to be applied to the storage capacitor electrode, and Cp is a capacitance value of the first display pixel.

3. A method of driving a display device including display pixels each of which includes a switching element and a pixel electrode, each of the display pixels being provided at an intersection of one of a plurality of gate lines and one of a plurality of source lines, wherein: a first display pixel and a second display pixel are connected to the same gate line, and the second display pixel is connected to a source line that is adjacent to a source line connected to the first display pixel and that forms a parasitic capacitance with the pixel electrode of the first display pixel; and a write signal voltage for the first display pixel is obtained by correcting an input signal voltage for the first display pixel in accordance with an input signal voltage for the second display pixel or a write signal voltage for the second display pixel so that a level Lout of a write signal voltage gradation for the first display pixel satisfies Lout=LA+F(LA, LB) where LA is a level of an input signal gradation for the first display pixel, LB is a level of an input signal gradation for the second display pixel, and F(LA, LB) is a function using LA and LB as input values, wherein: if LA is lower than a predetermined threshold value, F(LA, LB) is defined as F(LA, LB)=k(LA-LB), where k>0; and if LA is higher than the threshold value, F(LA, LB) is defined as a function that outputs a constant value.

4. A method of driving a display device including display pixels each of which includes a switching element and a pixel electrode, each of the display pixels being provided at an intersection of one of a plurality of gate lines and one of a plurality of source lines, wherein: a first display pixel and a second display pixel are connected to the same gate line, and the second display pixel is connected to a source line that is adjacent to a source line connected to the first display pixel and that forms a parasitic capacitance with the pixel electrode of the first display pixel; and a write signal voltage for the first display pixel is obtained by correcting an input signal voltage for the first display pixel in accordance with an input signal voltage for the second display pixel or a write signal voltage for the second display pixel so that a level Lout of a write signal voltage gradation for the first display pixel satisfies Lout=LA+F(LA, LB) where LA is a level of an input signal gradation for the first display pixel, LB is a level of an input signal gradation for the second display pixel, and F(LA, LB) is a function using LA and LB as input values, wherein: a plurality of integers are extracted from within a range of zero to a maximum gradation level, and values of F(LA, 0), where LA is the plurality of integers, are associated with values of LA and stored in a look-up table; and a value of F(LA, LB), where LA is a value not stored in the look-up table, is interpolated in accordance with a value of LA stored in the look-up table, a value of F(LA, 0) associated with the value of LA, and values of LA and LB that satisfy F(LA, LB)=0.

5. The method as set forth in claim 4, wherein: if LA>LB, the value of F(LA, LB) is interpolated by linear interpolation.

6. A method of driving a display device including display pixels each of which includes a switching element and a pixel electrode, each of the display pixels being provided at an intersection of one of a plurality of gate lines and one of a plurality of source lines, wherein: a first display pixel and a second display pixel are connected to the same gate line, and the second display pixel is connected to a source line that is adjacent to a source line connected to the first display pixel and that forms a parasitic capacitance with the pixel electrode of the first display pixel; and a write signal voltage for the first display pixel is obtained by correcting an input signal voltage for the first display pixel in accordance with an input signal voltage for the second display pixel or a write signal voltage for the second display pixel so that a level Lout of a write signal voltage gradation for the first display pixel satisfies Lout=LA+F(LA, LB) where LA is a level of an input signal gradation for the first display pixel, LB is a level of an input signal gradation for the second display pixel, and F(LA, LB) is a function using LA and LB as input values, wherein: if LA<LB, F(LA, LB) is defined as F(LA, LB)=0.

7. A method of driving a display device including display pixels each of which includes a switching element and a pixel electrode, each of the display pixels being provided at an intersection of one of a plurality of gate lines and one of a plurality of source lines, wherein: first, second, and third display pixels, which are for respectively displaying first, second, and third display colors, are connected to the same gate line, the second display pixel is connected to a source line that is adjacent to a source line connected to the first display pixel and that forms a parasitic capacitance with the pixel electrode of the first display pixel, and the third display pixel is connected to a source line that is adjacent to the source line connected to the second display pixel and that forms a parasitic capacitance with the pixel electrode of the second display pixel; and a write signal gradation for the first display pixel is a sum of an input signal gradation LA for the first display pixel and a correction gradation G(LA, LB, and LC) represented by G(LA, LB, LC)=k.sub.LB(LA-LB)+k.sub.LC(LA-LC) where LA is the input signal gradation of the first display pixel, LB is an input signal gradation or a write signal gradation for the second display pixel, LC is an input signal gradation or a write signal gradation for the third display pixel, k.sub.LB is a function of k.sub.LB (p) of LB, k.sub.LC is a function of k.sub.LC (p) of LC, where p is a possible value of LB and LC, and there exists such p, which satisfies 0<p<255, that k.sub.LB(0)=certain constant value, k.sub.LC(0)=certain constant value, k.sub.LB(MAX)=0, k.sub.LC(MAX)=0, k.sub.LB(p)=local maximum value, and k.sub.LC(p)=local maximum value, where MAX is a maximum value of LB and LC.

8. The method as set forth in claim 7, wherein: the first display color is R, the second display color is G, and the third display color is B.

9. A display device, comprising: display pixels, each of which includes a switching element and a pixel electrode, each of the display pixels being provided at an intersection of one of a plurality of gate lines and one of a plurality of source lines, wherein a first display pixel and a second display pixel are connected to the same gate line, and the second display pixel is connected to a source line that is adjacent to a source line connected to the first display pixel and that forms a parasitic capacitance with the pixel electrode of the first display pixel, a write signal for the first display pixel is obtained by correcting an input signal for the first display pixel in accordance with an input signal for the second display pixel or a write signal for the second display pixel, and a write signal gradation for the first display pixel is a sum of an input signal gradation for the first display pixel and a correction gradation F(g) represented by F(g)=Csd(Ugad-Ubad)/Cp(U(g+1)-U(g)) where Cp is a capacitance value of the first display pixel, Csd is a capacitance value of the parasitic capacitance formed between the source line connected to the second display pixel and the pixel electrode of the first display pixel, U(g) is an input signal voltage for the first display pixel when a level of an input signal gradation for the first display pixel is g, Ugad is an input signal voltage or a write signal voltage for the second display pixel, and Ubad is a voltage to be applied to a common electrode, which is opposed to each display pixel.

10. The display device as set forth in claim 9, wherein: each of the plurality of source lines is alternately provided with an L-shaped portion and a reverse-L-shaped portion.

11. The display device as set forth in claim 9, wherein: positions of switching elements relative to a corresponding source line are alternated after every crossing of the source line with a gate line.

12. The display device as set forth in claim 9, wherein: the plurality of source lines are provided in parallel with each other; and an image is displayed by a display picture element, which includes display pixels for respectively displaying first, second, and third display colors, the display device comprising first, second, and third display pixel columns, the first display pixel column being a plurality of display pixels connected, respectively through switching elements, to a first source line, which is connected to the first display pixel through a switching element, the first display pixel column being adapted to display one of the first, second, or third display colors, the second display pixel column being a plurality of display pixels connected, respectively through switching elements, to a second source line, which is connected to the second display pixel through a switching element, the second display pixel column being adapted to display one of the first, second, or third display colors that is not displayed by the first display pixel column, the third display pixel column being a plurality of display pixels connected, respectively through switching elements, to a third source line, which is adjacent to the second source line on a side opposite the first source line, the third display pixel column being adapted to display one of the first, second, or third display colors that is not displayed by the first display pixel column or the second display pixel column.

13. The display device as set forth in claim 12, wherein: the display picture element further includes a display pixel for displaying a fourth display color, the display device further comprising a fourth display pixel column, which is a plurality of display pixels connected, respectively through switching elements, to a fourth source line, which is adjacent to the third source line on a side opposite the second source line, the fourth display pixel column being adapted to display the fourth display color.

14. The display device as set forth in claim 13, wherein: the first display color is R, the second display color is G, the third display color is B, and the fourth display color is white.

15. The display device as set forth in claim 13, wherein: the first display color is cyan, the second display color is magenta, the third display color is yellow, and the fourth display color is green.

16. The display device as set forth in claim 12, wherein: the first display color is R, the second display color is G, and the third display color is B.

17. The display device as set forth in claim 12, wherein: the first display color is cyan, the second display color is magenta, and the third display color is yellow.

18. The display device as set forth in claim 9, wherein: the plurality of source lines are provided in parallel with each other; and an image is displayed by a display picture element, which includes display pixels for respectively displaying first, second, and third display colors, the display device comprising a first display pixel group including three display pixels, and a second display pixel group including another three display pixels, the three display pixels of the first display pixel group being the first display pixel, the second display pixel, and a third display pixel, which is driven by the first gate line and connected, through a switching element, to a source line connected to the second display pixel through a parasitic capacitance, each of the first, second, and third display pixels being adapted to display one of the first, second, or third display colors, and display colors of the first, second, and third display pixels being different from each other, the three display pixels of the second display pixel group being fourth, fifth, and sixth display pixels, the fourth display pixel being connected to (i) a source line connected to the first display pixel through a switching element and (ii) a second gate line through a switching element, the second gate line being adjacent to the first gate line, the fifth display pixel being connected to (iii) the source line connected to the second display pixel through a switching element and (iv) the second gate line through a switching element, the sixth display pixel being connected to (v) a source line connected to the third display pixel through a switching element and (vi) the second gate line through a switching element, the fourth display pixel being adapted to display the display color of the third display pixel, the fifth display pixel being adapted to display the display color of the first display pixel, and the sixth display pixel being adapted to display the display color of the second display pixel.

19. The display device as set forth in claim 18, wherein: the first display color is R, the second display color is G, and the third display color is B.

20. The display device as set forth in claim 18, wherein: the first display color is cyan, the second display color is magenta, and the third display color is yellow.

21. The display device as set forth in claim 9, wherein: the plurality of source lines are provided in parallel with each other; and an image is displayed by a display picture element, which includes display pixels for respectively displaying first, second, third, and fourth display colors, the display device comprising a first display pixel group including four display pixels, and a second display pixel group including another four display pixels, the four display pixels of the first display pixel group being the first display pixel, the second display pixel, a third display pixel, and a fourth display pixel, the third display pixel being driven by the first gate line, and connected, through a switching element, to a source line connected to the second display pixel through a parasitic capacitance only, the fourth display pixel being driven by the first gate line, and connected, through a switching element, to a source line connected to the third display pixel through a parasitic capacitance only, each of the first, second, third, and fourth display pixels being adapted to display one of the first, second, third, or fourth display color, and display colors of the first, second, third, and fourth display pixels being different from each other, the four display pixels of the second display pixel group being fifth, sixth, seventh, and eighth display pixels, the fifth display pixel being connected to (i) a source line connected to the first display pixel through a switching element and (ii) a second gate line through a switching element, the second gate line being adjacent to the first gate line, the sixth display pixel being connected to (iii) the source line connected to the second display pixel through a switching element and (iv) the second gate line through a switching element, the seventh display pixel being connected to (v) a source line connected to the third display pixel through a switching element and (vi) the second gate line through a switching element, the eighth display pixel being connected to (vii) a source line connected to the fourth display pixel through a switching element and (viii) the second source line through a switching element, the fifth display pixel being adapted to display the display color of the fourth display pixel, the sixth display pixel being adapted to display the display color of the first display pixel, the seventh display pixel being adapted to display the display color of the second display pixel, and the eighth display pixel being adapted to display the display color of the third display pixel.

22. The display device set forth in claim 21, wherein: the first display color is R, the second display color is G, and the third display color is B.

23. The display device as set forth in claim 21, wherein: the first display color is cyan, the second display color is magenta, and the third display color is yellow.

24. The display device as set forth in claim 21, wherein: the first display color is R, the second display color is G, the third display color is B, and the fourth display color is white.

25. The display device as set forth in claim 21, wherein: the first display color is cyan, the second display color is magenta, the third display color is yellow, and the fourth display color is green.

26. The display device as set forth in claim 9, wherein: the plurality of source lines are provided in parallel with each other; and an image is displayed by a display picture element, which includes display pixels for respectively displaying first, second, and third display colors, the display device comprising a first display pixel group including three display pixels, and a second display pixel group including another three display pixels, the three display pixels of the first display pixel group being the first display pixel, the second display pixel, and a third display pixel, which is driven by the first gate line and connected, through a switching element, to a source line connected to the second display pixel through a parasitic capacitance, each of the first, second, and third display pixels being adapted to display one of the first, second, or third display colors, and display colors of the first, second, and third display pixels being different from each other, the three display pixels of the second display pixel group being fourth, fifth, and sixth display pixels, the fourth display pixel being connected to (i) a source line connected to the first display pixel through a switching element and (ii) a second gate line through a switching element, the second gate line being adjacent to the first gate line, the fifth display pixel being connected to (iii) the source line connected to the second display pixel through a switching element and (iv) the second gate line through a switching element, the sixth display pixel being connected to (v) a source line connected to the third display pixel through a switching element and (vi) the second gate line through a switching element, the fourth display pixel being adapted to display the display color of the second display pixel, the fifth display pixel being adapted to display the display color of the third display pixel, and the sixth display pixel being adapted to display the display color of the first display pixel.

27. The display device as set forth in claim 26, wherein: the first display color is R, the second display color is G, and the third display color is B.

28. The display device as set forth in claim 26, wherein: the first display color is cyan, the second display color is magenta, and the third display color is yellow.

29. The display device as set forth in claim 9, wherein: the plurality of source lines are provided in parallel with each other; and an image is displayed by a display picture element, which includes display pixels for respectively displaying first, second, third, and fourth display colors, the display device comprising a first display pixel group including four display pixels, and a second display pixel group including another four display pixels, the four display pixels of the first display pixel group being the first display pixel, the second display pixel, a third display pixel, and a fourth display pixel, the third display pixel being driven by the first gate line, and connected, through a switching element, to a source line connected to the second display pixel through a parasitic capacitance only, the fourth display pixel being driven by the first gate line, and connected, through a switching element, to a source line connected to the third display pixel through a parasitic capacitance only, each of the first, second, third, and fourth display pixels being adapted to display one of the first, second, third, or fourth display color, and display colors of the first, second, third, and fourth display pixels being different from each other, the four display pixels of the second display pixel group being fifth, sixth, seventh, and eighth display pixels, the fifth display pixel being connected to (i) a source line connected to the first display pixel through a switching element and (ii) a second gate line through a switching element, the second gate line being adjacent to the first gate line, the sixth display pixel being connected to (iii) the source line connected to the second display pixel through a switching element and (iv) the second gate line through a switching element, the seventh display pixel being connected to (v) a source line connected to the third display pixel through a switching element and (vi) the second gate line through a switching element, the eighth display pixel being connected to (vii) a source line connected to the fourth display pixel through a switching element and (viii) the second source line through a switching element, the fifth display pixel being adapted to display the display color of the second display pixel, the sixth display pixel being adapted to display the display color of the third display pixel, the seventh display pixel being adapted to display the display color of the fourth display pixel, and the eighth display pixel being adapted to display the display color of the first display pixel.

30. The display device set forth in claim 29, wherein: the first display color is R, the second display color is G, and the third display color is B.

31. The display device as set forth in claim 29, wherein: the first display color is cyan, the second display color is magenta, and the third display color is yellow.

32. The display device as set forth in claim 29, wherein: the first display color is R, the second display color is G, the third display color is B, and the fourth display color is white.

33. The display device as set forth in claim 29, wherein: the first display color is cyan, the second display color is magenta, the third display color is yellow, and the fourth display color is green.

34. The display device as set forth in claim 9, wherein: the plurality of source lines are provided in parallel with each other; and an image is displayed by a display picture element, which includes display pixels for respectively displaying first, second, and third display colors, the display device comprising first, second, and third display pixel columns, the first display pixel column being a plurality of display pixels connected, respectively through switching elements, to a first source line, which is connected to the first display pixel through a switching element, the first display pixel column being adapted to display one of the first, second, or third display colors, the second display pixel column being a plurality of display pixels connected to a second source line respectively through switching elements, the second source line being connected to the second display pixel through a switching element, the third display pixel column being a plurality of display pixels connected to a third source line respectively through switching elements, the third source line being adjacent to the second source line on a side opposite the first source line, the display pixels of the second display pixel column and the third display pixel column being adapted to form a checkered pattern by displaying two of the first, second, and third display colors that are not the display color of the first display pixel column.

35. The display device as set forth in claim 34, wherein: the display picture element further includes a display pixel for displaying a fourth display color, the display device further comprising a fourth display pixel column, which is a plurality of display pixels connected to a fourth source line, the fourth source line being adjacent to the third source line on a side opposite the second source line, the display pixels of the second, third, and fourth display pixel columns being adapted to form a checkered pattern by displaying three of the first, second, third, and fourth display colors that are not the display color of the first display pixel column.

36. The display device as set forth in claim 35, wherein: the first display color is R, the second display color is G, the third display color is B, and the fourth display color is white.

37. The display device as set forth in claim 35, wherein: the first display color is cyan, the second display color is magenta, the third display color is yellow, and the fourth display color is green.

38. The display device as set forth in claim 34, wherein: the first display color is R, the second display color is G, and the third display color is B.

39. The display device as set forth in claim 34, wherein: the first display color is cyan, the second display color is magenta, and the third display color is yellow.

40. A display device, comprising: display pixels, each of which includes a switching element and a pixel electrode, each of the display pixels being provided at an intersection of one of a plurality of gate lines and one of a plurality of source lines, wherein a first display pixel and a second display pixel are connected to the same gate line, and the second display pixel is connected to a source line that is adjacent to a source line connected to the first display pixel and that forms a parasitic capacitance with the pixel electrode of the first display pixel, and a write signal for the first display pixel is obtained by correcting an input signal for the first display pixel in accordance with an input signal for the second display pixel or a write signal for the second display pixel, and wherein if an effective voltage Va is required in order to display a desired gradation by the first display pixel, a write signal voltage for the first display pixel is a voltage V(A) represented by V(A)=(Cp.times.Va -Cgd.times.Vg-Csdb.times.V(B)+Ccs.times.Vc)/(Cp+Csda) where V(B) is an input signal voltage or a write signal voltage for the second display pixel, Csda is a capacitance value of a parasitic capacitance formed between the source line connected to the first display pixel and the pixel electrode of the first display pixel, Csdb is a capacitance value of the parasitic capacitance formed between the source line connected to the second display pixel and the pixel electrode of the first display pixel, Cgd is a capacitance value of a parasitic capacitance formed between the gate line connected to the first display pixel and the pixel electrode of the first display pixel, Ccs is a capacitance value of a parasitic capacitance formed between a storage capacitor electrode, which is provided so as to correspond to the first display pixel, and a drain electrode of the switching element of the first display pixel, Vg is a voltage to be applied to the first gate line, Vc is a voltage to be applied to the storage capacitor electrode, and Cp is a capacitance value of the first display pixel.

41. A display device, comprising: display pixels, each of which includes a switching element and a pixel electrode, each of the display pixels being provided at an intersection of one of a plurality of gate lines and one of a plurality of source lines, wherein a first display pixel and a second display pixel are connected to the same gate line, and the second display pixel is connected to a source line that is adjacent to a source line connected to the first display pixel and that forms a parasitic capacitance with the pixel electrode of the first display pixel, and a write signal voltage for the first display pixel is obtained by correcting an input signal voltage for the first display pixel in accordance with an input signal voltage for the second display pixel or a write signal voltage for the second display pixel so that a level Lout of a write signal voltage gradation for the first display pixel satisfies Lout=LA+F(LA, LB) where LA is a level of an input signal gradation for the first display pixel, LB is a level of an input signal gradation for the second display pixel, and F(LA, LB) is a function using LA and LB as input values, and wherein if LA is lower than a predetermined threshold value, F(LA, LB) is defined as F(LA, LB)=k(LA-LB), where k>0; and if LA is higher than the threshold value, F(LA, LB) is defined as a function that outputs a constant value.

42. A display device, comprising: display pixels, each of which includes a switching element and a pixel electrode, each of the display pixels being provided at an intersection of one of a plurality of gate lines and one of a plurality of source lines, wherein a first display pixel and a second display pixel are connected to the same gate line, and the second display pixel is connected to a source line that is adjacent to a source line connected to the first display pixel and that forms a parasitic capacitance with the pixel electrode of the first display pixel, and a write signal voltage for the first display pixel is obtained by correcting an input signal voltage for the first display pixel in accordance with an input signal voltage for the second display pixel or a write signal voltage for the second display pixel so that a level Lout of a write signal voltage gradation for the first display pixel satisfies Lout=LA+F(LA, LB) where LA is a level of an input signal gradation for the first display pixel, LB is a level of an input signal gradation for the second display pixel, and F(LA, LB) is a function using LA and LB as input values, and wherein a plurality of integers are extracted from within a range of zero to a maximum gradation level, and values of F(LA, 0), where LA is the plurality of integers, are associated with values of LA and stored in a look-up table; and a value of F(LA, LB), where LA is a value not stored in the look-up table, is interpolated in accordance with a value of LA stored in the look-up table, a value of F(LA, 0) associated with the value of LA, and values of LA and LB that satisfy F(LA, LB)=0.

43. A display device, comprising: display pixels, each of which includes a switching element and a pixel electrode, each of the display pixels being provided at an intersection of one of a plurality of gate lines and one of a plurality of source lines, wherein a first display pixel and a second display pixel are connected to the same gate line, and the second display pixel is connected to a source line that is adjacent to a source line connected to the first display pixel and that forms a parasitic capacitance with the pixel electrode of the first display pixel, and a write signal voltage for the first display pixel is obtained by correcting an input signal voltage for the first display pixel in accordance with an input signal voltage for the second display pixel or a write signal voltage for the second display pixel so that a level Lout of a write signal voltage gradation for the first display pixel satisfies Lout=LA+F(LA, LB) where LA is a level of an input signal gradation for the first display pixel, LB is a level of an input signal gradation for the second display pixel, and F(LA, LB) is a function using LA and LB as input values, and wherein if LA<LB, F(LA, LB) is defined as F(LA, LB)=0.

Description

This nonprovisional application claims priority under 35 U.S.C. .sctn. 119(a) on Patent Application No. 2003/419535 filed in Japan on Dec. 17, 2003, and on Patent Application No. 2004/360440 filed in Japan on Dec. 13, 2004. The entire contents of these applications are hereby incorporated by reference.

FIELD OF THE INVENTION

The present invention relates to a display device driving method, a display device, and a program, which are for reducing color crosstalk and thereby improving color reproducibility.

BACKGROUND OF THE INVENTION

Conventionally, many drawbacks of display devices in terms of color reproducibility have been pointed out. In particular, it has been pointed out that liquid crystal display devices have the following two drawbacks.

Many liquid crystal display devices allow light transmittance by using the birefringent characteristic of liquid crystal. However, liquid crystal of different pixels (pixels for R, G, and B) show different transmittance with respect to the same voltage. Therefore, even if the same color (e.g. white (R=G=B)) is displayed, the hue could be different, depending on gradation.

An effective measure to solve this problem is setting an independent .gamma. curve with respect to each of R, G, and B, either in an analog or digital way. For example, Patent Publication 1 (Japanese Publication for Laid-Open Patent Application, Tokukai 2002-258813 (publication date: Sep. 11, 2002)) discloses such a technique for independently correcting each of R, G, and B.

In shutter-type liquid crystal display devices, light of each color leaks regardless of display gradation. Especially, if the display gradation decreases, color purity (color saturation) decreases due to the light leakage. Moreover, since luminance efficiency is regarded as an important factor for many liquid crystal display devices, spectrum characteristics of backlight and color filters must be broad even if contrast is sufficient. Under such circumstance, the color saturation decreases as the luminance decreases.

An effective technique for improving the color purity is emphasizing the color saturation by increasing color saturation of such color that has relatively high color saturation, and decreasing color saturation of such color that has relatively low color saturation. For example, Patent Publication 2 (Japanese Publication for Laid-Open Patent Application, Tokukai 2003-52050 (publication date: Feb. 21, 2003)) discloses such a technique for correcting the color saturation.

In addition, the problem of crosstalk, which is caused by the coupling of adjacent pixels through parasitic capacitance, has been pointed out as a problem unique to TFT-LCDs. If there is an insulating film between a transparent electrode and a source line, parasitic capacitance is formed there. Likewise, parasitic capacitance is formed between a gate line and the transparent electrode, and between a source line and a common electrode. Due to the influence of the parasitic capacitances and the capacitance of the liquid crystal itself, the potential of the display pixels could be different from desired voltages, when the gate is OFF. As a result, the display gradation could be different from a desired gradation. For example, Patent Publication 3 (Japanese Publication for Laid-Open Patent Application, Tokukaihei 5-203994 (publication date: Aug. 13, 1993)) discloses a technique for reducing the parasitic capacitances as a means of solving the problem of crosstalk. However, this technique is still insufficient to reduce the crosstalk.

Incidentally, although these prior arts are effective in order to adjust the color reproducibility of a panel as a whole or of each display pixel, these prior arts cannot respond to a situation where reproduced colors change in accordance with display patterns generated by a display device.

To a display pixel connected to a TFT, a desired voltage is applied at the moment the gate is high. On the other hand, when the gate is low, the display pixel is connected to many peripheral electric circuits through parasitic capacitances. Since many of these peripheral electric circuits are related to panel design, the driving voltage can be set in advance while considering the parasitic capacitance formed between the display pixel and the peripheral electric circuits. Thus, the crosstalk caused by the parasitic capacitances formed between the display pixel and the peripheral electric circuits can be compensated in advance. However, since the potentials of source lines for driving other display pixels cannot be determined in advance, the crosstalk caused due to the other source lines cannot be compensated in advance.

A liquid crystal display device shown in FIG. 15(a) is provided with source lines Si (i: integer) and gate lines Gj (j: integer) arranged to be orthogonal. At each intersection of a source line and a gate line, a display pixel 100 and a switching element 200 are provided. Among display pixels 100, each display pixel (A) is provided with parasitic capacitances Csda, Csdb, Cgd, and Ccs. A display pixel (B) is a display pixel adjacent to a display pixel (A) in the direction along which the gate lines are provided.

Details of the parasitic capacitances are as follows: Parasitic capacitance Csda: parasitic capacitance formed between a display pixel (A) and the source line S2, which drives the display pixels (A); Parasitic capacitance Csdb: parasitic capacitance formed between a display pixel (A) and the source line S3, which drives the display pixels (B); Parasitic capacitance Cgd: parasitic capacitance formed between a display pixel (A) and the gate line G2, which drives the display pixel (A); and Parasitic capacitance Ccs: parasitic capacitance formed between a common electrode line and a display pixel (A).

The capacitance of a display pixel (A) itself is Cp. The voltages applied to the gate lines change as shown in FIG. 15(b). While a display pixel (A) displays G, a display pixel (B) displays R or B. If the display gradation of the display pixel (A) is LA, and the display gradation of the display pixel (B) is LB, LA.noteq.LB.

In this case, at the time the gate is high, if a drain voltage +V(A) is applied to the liquid crystal part of the display pixel (A), a drain voltage -V(B) is applied to the liquid crystal part of the display pixel (B). When the next gate line turns ON, -V(A) is applied to the source line for driving the display pixel (A), and +V(B) is applied to the source line for driving the display pixel (B).

In reality, however, a drain voltage is not applied directly to the display pixel (A). Instead, a drain voltage changed by the influence of the parasitic capacitances is applied to the display pixel (A). Specifically, an effective value Va of a voltage applied to the display pixel (A) is represented by Va=V(A)+(Csda.times.V(A)+Cgd.times.Vg+Csdb.times.V(B)+Ccs.times.Vc)/Cp where Vg is a voltage applied to the gate line, and Vc is a voltage applied to an opposed electrode.

Thus, the voltage applied to the display pixel (A) is different from the desired drain voltage (A).

The parasitic capacitances Csda, Cgd, and Ccs, which are formed in the vicinity of the display pixel (A), can be estimated at the design stage. Therefore, the drain voltage can be set appropriately by considering values of the parasitic capacitances. This means that the parasitic capacitances do not have much influence on the display gradation of the display pixel (A).

However, the foregoing formula for calculating the effective voltage Va includes the parasitic capacitance Csdb and the drain voltage V(B). This means that the voltage Va is influenced by the source line connected to the display pixel (B). Therefore, depending on the display gradation of the display pixel (B), color crosstalk is caused (that is, the gradation of the display pixel (A) changes).

For example, when V(A)=.+-.2.59V and V(B)=.+-.1.21V, the voltage supplied to the display pixel (A) is .+-.2.45V. Thus, it is found that color balance changes.

Even if the parasitic capacitances are reduced at the design stage as disclosed in Patent Publication 3, the amount of crosstalk is only reduced. The color crosstalk cannot be eliminated completely. Therefore, the potential actually applied to the display pixel changes in accordance with the display pattern of the display device as a whole. As a result, the display pixel cannot reproduce desired luminance.

In theory, it is possible to compensate the crosstalk by providing new members, such as shield electrodes or wires. However, if new members are provided to the display device, production cost of the display device increases.

SUMMARY OF THE INVENTION

The present invention was made in view of the conventional problems described above. An object of the present invention is therefore to provide a display device driving method, a display device, and a program, which are for reducing the crosstalk efficiently.

To solve the foregoing problems, a method of the present invention for driving a display device is a method of driving a display device including display pixels each of which includes a switching element and a pixel electrode, each of the display pixels being provided at each intersection of a plurality of gate lines and a plurality of source lines, wherein: a first display pixel and a second display pixel are connected to the same gate line, and the second display pixel is connected to a source line that is adjacent to a source line connected to the first display pixel and that forms a parasitic capacitance with the pixel electrode of the first display pixel; and a write signal for the first display pixel is obtained by correcting an input signal for the first display pixel in accordance with an input signal for the second display pixel or a write signal for the second display pixel. When a display pixel is connected to a source line, it means that the pixel electrode of the display pixel is connected to the source line through the switching element.

To solve the foregoing problems, a display device of the present invention is a display device comprising display pixels each of which includes a switching element and a pixel electrode, each of the display pixels being provided at each intersection of a plurality of gate lines and a plurality of source lines, wherein: a first display pixel and a second display pixel are connected to the same gate line, and the second display pixel is connected to a source line that is adjacent to a source line connected to the first display pixel and that forms a parasitic capacitance with the pixel electrode of the first display pixel; and a write signal for the first display pixel is obtained by correcting an input signal for the first display pixel in accordance with an input signal for the second display pixel or a write signal for the second display pixel.

In a display device including display pixels each of which includes a switching element and a pixel electrode, each of the display pixels being provided at each intersection of a plurality of gate lines and a plurality of source lines, a part of the pixel electrode of a display pixel (first display pixel) overlaps with a source line that is adjacent to a source line connected to the display pixel (first display pixel), in other words, the part of the pixel electrode of the display pixel (first display pixel) overlaps with a source line that is connected to a second display pixel and that drives the second display pixel, while an insulating film or the like is provided in between. Where the pixel electrode of the first display pixel and the source line connected to the second display pixel overlap, a parasitic capacitance is formed. The parasitic capacitance influences the potential of the pixel electrode of the first display pixel.

Therefore, according to the foregoing arrangement, the input signal for the first display pixel is corrected in accordance with the input signal for the second display pixel or the write signal for the second display pixel, and the corrected signal is used as a write signal for the first display pixel. That is, in determining the write signal for the first display pixel, the influence of the parasitic capacitance between the pixel electrode of the first display pixel and the source line that drives the second display pixel is considered. In this respect, in the present invention, a signal obtained by correcting an input signal for the first display pixel in accordance with an input signal for the second display pixel (or a write signal for the second display pixel) and a capacitance value of the parasitic capacitance. An input signal is raw gradation data or raw voltage data for a pixel. A write signal is a voltage to be actually applied to a source line or a gradation corresponding to the voltage to be applied. The write signal for the second display pixel is a signal (voltage or gradation) obtained by correcting the input signal (voltage data or gradation data) for the second display pixel.

With this arrangement, it is possible to drastically reduce a gap between a display gradation and a desired gradation (amount of crosstalk) caused by the parasitic capacitance, which fluctuates the potential of the pixel electrode (each pixel electrode) of the first display pixel. As a result, it is possible to improve display quality (correct color balance).

A display device of the present invention is a display device including display pixels each of which includes a switching element and a pixel electrode, each of the display pixels being provided at each intersection of a plurality of gate lines and a plurality of source lines, wherein: a first display pixel is connected to a first gate line and a first source line, and a second display pixel is connected to a second source line, which is adjacent to the first display pixel, the display device further including a correcting circuit for correcting an input signal for the first display pixel in accordance with an input signal for the second display pixel or a write signal for the second display pixel and a capacitance value of a parasitic capacitance formed between the second source line and the first display pixel and outputting a write signal for the first display pixel. The parasitic capacitance formed between the second source line and the first display pixel includes, for example, a parasitic capacitance between the second source line and the pixel electrode of the first display pixel and a parasitic capacitance formed between the second source line and each electrode (drain electrode and the like) of the switching element.

A display device of the present invention is a display device including display pixels each of which includes a switching element and a pixel electrode, each of the display pixels being provided at each intersection of a plurality of gate lines and a plurality of source lines, wherein: a first display pixel and a second display pixel are connected to the same gate line, and the second display pixel is connected to a source line that is adjacent to a source line connected to the first display pixel and that forms a parasitic capacitance with the pixel electrode of the first display pixel, the display device further including a correcting circuit for correcting an input signal for the first display pixel in accordance with an input signal for the second display pixel or a write signal for the second display pixel and a capacitance value of the parasitic capacitance and outputting a write signal for the first display pixel. The parasitic capacitance includes, for example, a parasitic capacitance between a source line and the pixel electrode of the first display pixel and a parasitic capacitance formed between a source line and each electrode