Gallium nitride material transistors and methods associated with the same Number:7,135,720 from the United States Patent and Trademark Office (PTO) owispatent Gallium nitride material transistors and methods associated with the same are provided. The transistors may be used in power applications by amplifying an input signal to produce an output signal having increased power. The transistors may be designed to transmit the majority of the output signal within a specific transmission channel (defined in terms of frequency), while minimizing transmission in adjacent channels. This ability gives the transistors excellent linearity which results in high signal quality and limits errors in transmitted data. The transistors may be designed to achieve low ACPR values (a measure of excellent linearity), while still operating at high drain efficiencies and/or high output powers. Such properties enable the transistors to be used in RF power applications including third generation (3G) power applications based on W-CDMA modulation.<H transistors, associated, Gallium, nitride, 7135720.html, Patent, pto, 7135720

Title: Gallium nitride material transistors and methods associated with the same

Abstract: Gallium nitride material transistors and methods associated with the same are provided. The transistors may be used in power applications by amplifying an input signal to produce an output signal having increased power. The transistors may be designed to transmit the majority of the output signal within a specific transmission channel (defined in terms of frequency), while minimizing transmission in adjacent channels. This ability gives the transistors excellent linearity which results in high signal quality and limits errors in transmitted data. The transistors may be designed to achieve low ACPR values (a measure of excellent linearity), while still operating at high drain efficiencies and/or high output powers. Such properties enable the transistors to be used in RF power applications including third generation (3G) power applications based on W-CDMA modulation.

Patent Number: 7,135,720 Issued on 11/14/2006 to Nagy, et al.

Inventors: Nagy; Walter H. (Raleigh, NC), Borges; Ricardo M. (Morrisville, NC), Brown; Jeffrey D. (Charlotte, NC), Chaudhari; Apurva D. (Raleigh, NC), Cook, Jr.; James W. (Raleigh, NC), Hanson; Allen W. (Cary, NC), Johnson; Jerry W. (Raleigh, NC), Linthicum; Kevin J. (Cary, NC), Piner; Edwin L. (Cary, NC), Rajagopal; Pradeep (Raleigh, NC), Roberts; John C. (Hillsborough, NC), Singhal; Sameer (Apex, NC), Therrien; Robert J. (Apex, NC), Vescan; Andrei (Herzogenrath, DE)
Assignee: Nitronex Corporation (Raleigh, NC)

Appl. No.: 10/913,297

Filed: August 5, 2004

Current U.S. Class: 257/192 ; 257/194

Current International Class: H01L 31/072 (20060101)

Field of Search: 257/192,194,615

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Primary Examiner: Prenty; Mark V.
Attorney, Agent or Firm: Wolf, Greenfield & Sacks, P.C.

Parent Case Text

RELATED APPLICATIONS

This application claims priority to U.S. Provisional Patent Application Ser. No. 60/493,039, entitled "Gallium Nitride Transistor Structures and Methods", filed Aug. 5, 2003, which is incorporated herein by reference.

Claims

What is claimed is:

1. A device adapted to receive an input signal and to transmit an output signal, the device comprising: at least one transistor structure to receive the input signal, the at least one transistor including at least one active region formed in a gallium nitride material region, the at least one transistor structure being adapted to amplify the input signal to form the output signal, wherein the output signal, when transmitted, has an adjacent channel power ratio (ACPR) of less than or equal to -20 dBc at a device efficiency of greater than or equal to 20%.

2. The device of claim 1, wherein the output signal has an ACPR of between -25 dBc and -45 dBc.

3. The device of claim 1, wherein the output signal has an ACPR of less than or equal to -32 dBc at a device efficiency of greater than or equal to 20%.

4. The device of claim 1, wherein the output signal has an ACPR of less than or equal to -39 dBc at a device efficiency of greater than or equal to 20%.

5. The device of claim 1, wherein the output signal has an ACPR of less than or equal to -39 dBc at a device efficiency of between 20% and 40%.

6. The device of claim 1, wherein the at least one transistor structure includes a source electrode, a gate electrode and a drain electrode associated with the at least one active region.

7. The device of claim 6, wherein the output signal has an ACPR of less than or equal to -20 dBc at a device efficiency of greater than or equal to 20%, and the device has a power density of between 0.1 W/mm and 10 W/mm.

8. The device of claim 1, wherein the device has a power density of between 0.1 W/mm and 10 W/mm.

9. The device of claim 6, wherein the gate electrode receives the input signal and the amplified signal is provided at the drain electrode.

10. The device of claim 1, further comprising at least one matching component adapted to transform an impedance of the device.

11. The device of claim 10, wherein the at least one matching component includes an input matching circuit adapted to transform an input impedance of the device.

12. The device of claim 10, wherein the at least one matching component includes an output matching circuit adapted to transform an output impedance of the device.

13. The device of claim 1, wherein the ACPR varies by less than 10% over a range of 5 dB of output power.

14. The device of claim 1, wherein the ACPR varies by less than 10% over a range of 5% efficiency.

15. The device of claim 1, wherein the ACPR varies by less than 10% over a range of 10% efficiency.

16. The device of claim 1, wherein the input signal is a W-CDMA modulated signal and the output signal is transmitted in accordance with the W-CDMA standard.

17. The device of claim 16, wherein the W-CDMA modulated input signal is provided directly to the at least one transistor without undergoing signal processing to compensate for distortion caused by amplifying the input signal.

18. The device of claim 1, wherein the at least one transistor structure comprises a plurality of transistor structures.

19. The device of claim 1, wherein the at least one transistor structure comprises a silicon substrate, wherein the gallium nitride material region is formed on the silicon substrate.

20. The device of claim 19, further comprising a transition layer formed between the silicon substrate and the gallium nitride material region.

21. The device of claim 20, wherein the transition layer is compositionally-graded.

22. The device of claim 1, wherein the output signal includes a single carrier signal.

23. The device of claim 1, wherein the output signal includes a plurality of carrier signals.

24. The device of claim 1, wherein the input signal is a radio frequency (RF) signal and the at least one transistor operates as a class AB amplifier.

25. The device of claim 1, wherein the input signal is a radio frequency (RF) signal, and wherein current flows through the at least one transistor for between 51% and 99% of each RF cycle of the input signal.

26. The device of claim 25, wherein current flows through the at least one transistor for between 51% and 75% of each RF cycle of the input signal.

27. The device of claim 25, wherein current flows through the at least one transistor for between 51% and 60% of each RF cycle of the input signal.

28. The device of claim 25, wherein current flows through the at least one transistor for substantially 55% of each RF cycle of the input signal.

29. A method of generating an output signal for wireless transmission, the method comprising: receiving an input signal comprising information to be transmitted; amplifying the input signal via at least one transistor structure having at least one active region formed in a gallium nitride material region to provide the output signal; and transmitting the output signal such that the output signal has an ACPR of less than or equal to -20 dBc at a device efficiency of greater than or equal to 20%.

30. The method of claim 29, wherein the act of transmitting includes an act of transmitting the output signal such that the output signal has an ACPR of between -20 dBc and -45 dBc.

31. The method of claim 29, wherein the act of transmitting includes an act of transmitting the output signal such that the output signal has an ACPR of less than or equal to -32 dBc at a device efficiency of greater than or equal to 20%.

32. The method of claim 29, wherein the act of transmitting includes an act of transmitting the output signal such that the output signal has an ACPR of less than or equal to -39 dBc at a device efficiency of greater than or equal to 20%.

33. The method of claim 29, wherein the act of transmitting includes an act of transmitting the output signal such that the output signal has an ACPR of less than or equal to -39 dBc at a device efficiency of between 20% and 40%.

34. The method of claim 29, wherein the act of transmitting includes an act of transmitting the output signal such that the output signal has an ACPR which varies by less than 10% over a range of 5 dB of output power.

35. The method of claim 29, wherein the act of transmitting includes an act of transmitting the output signal such that the output signal has an ACPR which varies by less than 10% over a range of 5% efficiency.

36. The method of claim 29, wherein the act of transmitting includes an act of transmitting the output signal such that the output signal has an ACPR which varies by less than 10% over a range of 10% efficiency.

37. The method of claim 29, wherein the input signal is a W-CDMA modulated signal and the act of transmitting includes an act of transmitting the output signal in accordance with the W-CDMA standard.

38. The method of claim 29, wherein amplifying the input signal includes operating the at least one transistor as a class AB amplifier.

39. The method of claim 29, wherein the input signal is a radio frequency (RF) signal and wherein amplifying the input signal includes operating the at least one transistor such that current flows in the at least one transistor for between 51% and 99% of each RF cycle of the input signal.

40. The method of claim 39, wherein amplifying the input signal includes operating the at least one transistor such that current flows in the at least one transistor for between 51% and 75% of each RF cycle of the input signal.

41. The method of claim 39, wherein amplifying the input signal includes operating the at least one transistor such that current flows in the at least one transistor for between 51% and 60% of each RF cycle of the input signal.

42. The method of claim 39, wherein amplifying the input signal includes operating the at least one transistor such that current flows in the at least one transistor for substantially 55% of each RF cycle of the input signal.

43. The method of claim 29, further comprising an act of transforming at least one of an input impedance and an output impedance via at least one matching network.

44. A device for generating a radio frequency (RF) output signal from an RF input signal, the device comprising: at least one transistor having at least one active region formed in a gallium nitride material layer, the at least one transistor arranged to receive the RF input signal and, when present, amplify the RF input signal to provide the RF output signal; and at least one matching circuit adapted to transform at least one impedance of the device such that, when the device is loaded with a load, the RE output signal is capable of being transmitted with an ACPR of less than or equal to -20 dBc at a device efficiency of greater than or equal to 20%.

45. The device of claim 44, wherein the at least one matching circuit includes an output matching circuit adapted to transform an output impedance of the device.

46. The device of claim 44, wherein the at least one matching circuit includes an input matching circuit adapted to transform an input impedance of the device.

47. The device of claim 44, wherein the at least one matching circuit includes an output matching circuit to transform an output impedance of the device and an input matching circuit adapted to transform an input impedance of the device.

48. The device of claim 44, wherein the RE output signal is capable of being transmitted with an ACPR of between -25 dBc and -45 dBc.

49. The device of claim 44, wherein the RE output signal is capable of being transmitted with an ACPR of less than or equal to -20 dBc at a device efficiency of greater than or equal to 20%.

50. The device of claim 44, wherein the RE output signal is capable of being transmitted with an ACPR of less than or equal to -32 dBc at a device efficiency of greater than or equal to 20%.

51. The device of claim 44, wherein the RF output signal is capable of being transmitted with an ACPR of less than or equal to -39 dBc at a device efficiency of greater than or equal to 20%.

52. The device of claim 44, wherein the RF output signal is capable of being transmitted with an ACPR of less than or equal to -39 dBc at a device efficiency of between 20% and 40%.

53. The device of claim 44, wherein the at least one transistor structure includes a source electrode, a gate electrode and a drain electrode associated with the at least one active region.

54. The device of claim 53, wherein the output signal has an ACPR of less than or equal to -20 dBc at a device efficiency of greater than or equal to 20%, and the device has a power density of between 0.1 W/mm and 10 W/mm.

55. The device of claim 44, wherein the device has a power density of between 0.1 W/mm and 10 W/mm.

56. The device of claim 53, wherein the gate electrode receives the RF input signal and the RF amplified signal is provided at the drain electrode.

57. The device of claim 44, wherein the ACPR varies by less than 10% over a range of 5 dB of output power.

58. The device of claim 44, wherein the RF output signal is capable of being transmitted such that the RF output signal has an ACPR which varies by less than 10% over a range of 5% efficiency.

59. The device of claim 44, wherein the RF output signal is capable of being transmitted such that the RF output signal has an ACPR which varies by less than 10% over a range of 10% efficiency.

60. The device of claim 44, wherein the RF input signal is W-CDMA modulated and RF output signal is capable of being transmitted in accordance with the W-CDMA standard.

61. The device of claim 60, wherein the W-CDMA modulated input signal is provided directly to the at least one transistor without undergoing signal processing to compensate for distortion caused by amplifying the input signal.

62. The device of claim 44, wherein the at least one transistor structure comprises a plurality of transistor structures.

63. The device of claim 44, wherein the at least one transistor structure comprises a silicon substrate, wherein the gallium nitride material region is formed on the silicon substrate.

64. The device of claim 63, further comprising a transition layer formed between the silicon substrate and the gallium nitride material region.

65. The device of claim 64, wherein the transition layer is compositionally-graded.

66. The device of claim 44, wherein the output signal includes a single carrier signal.

67. The device of claim 44, wherein the output signal includes a plurality of carrier signals.

68. The device of claim 44, wherein the at least one transistor operates as a class AB amplifier.

69. The device of claim 44, wherein current flows through the at least one transistor for between 51% and 99% of each RF cycle of the input signal.

70. The device of claim 69, wherein current flows through the at least one transistor for between 51% and 75% of each RF cycle of the input signal.

71. The device of claim 69, wherein current flows through the at least one transistor for between 51% and 60% of each RF cycle of the input signal.

72. The device of claim 69, wherein current flows through the at least one transistor for substantially 55% of each RF cycle of the input signal.

73. The device of claim 1, wherein the output signal has an ACPR of less than or equal to -20 dBc at a device efficiency of greater than or equal to 30%.

74. The device of claim 1, wherein the output signal has an ACPR of less than or equal to -20 dBc at a device efficiency of between 20% and 45%.

75. The method of claim 29, wherein the act of transmitting includes an act of transmitting the output signal such that the output signal has an ACPR of less than or equal to -20 dBc at a device efficiency of greater than or equal to 30%.

76. The method of claim 29, wherein the act of transmitting includes an act of transmitting the output signal such that the output signal has an ACPR of less than or equal to -20 dBc at a device efficiency of between 20% and 45%.

77. The device of claim 44, wherein the RF output signal is capable of being transmitted with an ACPR of less than or equal to -20 dBc at a device efficiency of greater than or equal to 30%.

78. The device of claim 44, wherein the RF output signal is capable of being transmitted with an ACPR of less than or equal to -20 dBc at a device efficiency of between 20% and 45%.

79. A device adapted to receive an input signal and to transmit an output signal, the device comprising: at least one transistor structure to receive the input signal, the at least one transistor including at least one active region formed in a gallium nitride material region, the at least one transistor structure being adapted to amplify the input signal to form the output signal, wherein the output signal, when transmitted, has an adjacent channel power ratio (ACPR) of less than or equal to -20 dBc, and wherein the ACPR varies by less than 10% over a range of 5 dB of output power.

80. A device adapted to receive an input signal and to transmit an output signal, the device comprising: at least one transistor structure to receive the input signal, the at least one transistor including at least one active region formed in a gallium nitride material region, the at least one transistor structure being adapted to amplify the input signal to form the output signal, wherein the output signal, when transmitted, has an adjacent channel power ratio (ACPR) of less than or equal to -20 dBc, and wherein the ACPR varies by less than 10% over a range of 5% efficiency.

81. A device adapted to receive an input signal and to transmit an output signal, the device comprising: at least one transistor structure to receive the input signal, the at least one transistor including at least one active region formed in a gallium nitride material region, the at least one transistor structure being adapted to amplify the input signal to form the output signal, wherein the output signal, when transmitted, has an adjacent channel power ratio (ACPR) of less than or equal to -20 dBc, and wherein the input signal is a W-CDMA modulated signal and the output signal is transmitted in accordance with the W-CDMA standard and the W-CDMA modulated input signal is provided directly to the at least one transistor without undergoing signal processing to compensate for distortion caused by amplifying the input signal.

Description

FIELD OF INVENTION

The invention relates generally to gallium nitride material devices and, more particularly, to gallium nitride material transistors and methods associated with the same.

BACKGROUND OF INVENTION

Gallium nitride materials include gallium nitride (GaN) and its alloys such as aluminum gallium nitride (AlGaN), indium gallium nitride (InGaN), and aluminum indium gallium nitride (AlInGaN). These materials are semiconductor compounds that have a relatively wide, direct bandgap which permits highly energetic electronic transitions to occur. Gallium nitride materials have a number of attractive properties including high electron mobility, the ability to efficiently emit blue light, and the ability to transmit signals at high frequency, amongst others. Accordingly, gallium nitride materials are being investigated in many microelectronic applications such as transistors and optoelectronic devices.

Despite the attractive properties noted above, a number of challenges exist in connection with developing gallium nitride material-based devices. For example, it may be difficult to grow high quality gallium nitride materials on certain substrates, particularly silicon, due to property differences (e.g., lattice constant and thermal expansion coefficient) between the gallium nitride material and the substrate material. Also, it is has been challenging to form gallium nitride material devices meeting the property requirements for certain applications.

Applications for RF power transistors may have particularly demanding property requirements. For example, RF power transistors used in wireless communications (e.g., in wireless basestation applications) may need to meet property requirements related to output power, linearity, gain and efficiency. Emerging third generation (3G) wireless communications standards, such as W-CDMA, use variable amplitude envelope modulation which places even stricter constraints on linearity compared to the second generation standards. To achieve the required linearity to meet 3G standards, certain transistors (e.g., silicon or gallium arsenide-based transistors) used in second generation applications may need to operate at lower efficiencies and/or power levels which may be insufficient for 3G applications.

SUMMARY OF INVENTION

Gallium nitride material transistors and methods associated with the same are provided.

In one aspect, a device adapted to receive an input signal and to transmit an output signal is provided. The device comprises at least one transistor structure to receive the input signal. The at least one transistor includes at least one active region formed in a gallium nitride material region. The at least one transistor structure being adapted to amplify the input signal to form the output signal. The output signal, when transmitted, has an adjacent channel power ratio (ACPR) of less than or equal to -20 dBc.

In another aspect, a method of generating an output signal for wireless transmission is provided. The method comprising receiving an input signal comprising information to be transmitted; and, amplifying the input signal via at least one transistor structure having at least one active region formed in a gallium nitride material region to provide the output signal. The method further comprises transmitting the output signal such that the output signal has an ACPR of less than or equal to -20 dBc.

In another aspect, a device for generating a radio frequency (RF) output signal from an RF input signal is provided. The device comprises at least one transistor having at least one active region formed in a gallium nitride material layer. The at least one transistor arranged to receive the RF input signal and, when present, amplify the RF input signal to provide the RF output signal. The device comprises at least one matching circuit adapted to transform at least one impedance of the device such that, when the device is loaded with a load, the RF output signal is capable of being transmitted with an ACPR of less than or equal to -20 dBc.

Other aspects, embodiments and features of the invention will become apparent from the following detailed description of the invention when considered in conjunction with the accompanying drawings. The accompanying figures are schematic and are not intended to be drawn to scale. In the figures, each identical, or substantially similar component that is illustrated in various figures is represented by a single numeral or notation. For purposes of clarity, not every component is labeled in every figure. Nor is every component of each embodiment of the invention shown where illustration is not necessary to allow those of ordinary skill in the art to understand the invention. All patent applications and patents incorporated herein by reference are incorporated by reference in their entirety. In case of conflict, the present specification, including definitions, will control.

BRIEF DESCRIPTION OF DRAWINGS

FIGS. 1A and 1B respectively illustrate a cross-section of and top view of a transistor building block structure according to one embodiment of the invention.

FIG. 2 is a plan view of a transistor unit cell according to one embodiment of the invention.

FIG. 3 is a plan view of a power transistor according to one embodiment of the invention.

FIG. 4A is a copy of a photo of a power transistor and associated matching network mounted on a package according to one embodiment of the invention.

FIG. 4B shows the power transistor and matching network of FIG. 4A and the associated circuit elements.

FIG. 5 shows a waveform including parameters used to calculate ACPR.

FIG. 6A shows ACPR as a function of drain efficiency for a transistor operated under the different bias conditions as described in Example 1.

FIG. 6B shows ACPR as a function of power density for a transistor operated under the different bias conditions as described in Example 1.

FIG. 6C shows ACPR as a function of output power for a transistor operated under the different bias conditions as described in Example 1.

FIG. 7A shows ACPR as a function of drain efficiency for a transistor of the invention operated using different matching networks as described in Example 2.

FIG. 7B shows ACPR as a function of power density for a transistor of the invention operated using different matching networks as described in Example 2.

FIG. 7C shows ACPR as a function of output power for a transistor of the invention operated using different matching networks as described in Example 2.

FIG. 8A shows a single-tone power-sweep for a transistor of the invention as described in Example 3.

FIG. 8B shows efficiency and ACPR as a function of output power for a transistor of the invention as described in Example 3.

DETAILED DESCRIPTION

The invention provides gallium nitride material transistors and methods associated with the same. The transistors may be used in power applications by amplifying an input signal to produce an output signal having increased power. The transistors may be designed to transmit the majority of the output signal within a specific transmission channel (defined in terms of frequency), while minimizing transmission in adjacent channels. This ability gives the transistors excellent linearity which results in high signal quality and limits errors in transmitted data. As described further below, the transistors may be designed to achieve low ACPR values (a measure of excellent linearity), while still operating at high drain efficiencies and/or high output powers. Such properties enable the transistors to be used in RF power applications including third generation (3G) power applications based on W-CDMA modulation.

FIGS. 1A and 1B respectively illustrate a cross-section of and top view of a transistor building block structure 10 according to one embodiment of the invention. Structure 10 includes a gallium nitride material region 12. In the illustrative embodiment, the transistor structure includes a source electrode 14, a drain electrode 16 and a gate electrode 18 formed on the gallium nitride material region. The gallium nitride material region is formed on a substrate 20 and, as shown, a transition layer 22 may be formed between the substrate and the gallium nitride material region. The transistor includes a passivating layer 24 that protects and passivates the surface of the gallium nitride material region. In the illustrative embodiment, a via 26 is formed within the passivating layer in which the gate electrode is, in part, formed. As described further below, a plurality of the building block structures 10 may be combined to construct a power transistor device.

When a layer is referred to as being "on" or "over" another layer or substrate, it can be directly on the layer or substrate, or an intervening layer also may be present. A layer that is "directly on" another layer or substrate means that no intervening layer is present. It should also be understood that when a layer is referred to as being "on" or "over" another layer or substrate, it may cover the entire layer or substrate, or a portion of the layer or substrate.

It should be understood that the transistor structure shown in FIGS. 1A and 1B is illustrative of an embodiment of the invention but should not be considered limiting. Other transistor structures are also within the scope of the present invention including transistor structures with different layer(s), different layer arrangements and different features.

FIG. 2 is a plan view of a transistor unit cell 30 according to one embodiment of the invention. In this embodiment, the transistor unit cell includes ten transistor building block structures. As shown, the source electrodes in the unit cell are connected to a common source pad 32; the gate electrodes are connected to a common gate pad 34; and, the drain electrodes are connected to a common drain pad 36. In the illustrative unit cell, ten gate electrodes are connected to the gate pad, six source electrodes are connected to source pad, and five drain electrodes are connected to the gate pad.

It should be understood that, in other embodiments of the invention, the transistor unit cell may include a different number of building block structures and/or have different types of electrode and pad connections.

FIG. 3 is a plan view of a power transistor 40 according to one embodiment of the invention. The power transistor includes multiple transistor unit cells 30 arranged in parallel. In the illustrative embodiment, the transistor includes eighteen unit cells, though other numbers of unit cells are possible. Respective drain pads 36 from the unit cells are aligned to form a drain bus 42. Respective source pads 32 are connected to a source bus 43; and, respective gate pads 34 are connected to a gate bus 44.

In some embodiments, power transistor 40 is attached to a package 50 to form a final packaged device 52 as shown in FIG. 4A. As described further below, other components (e.g., matching network components) may also be attached to the package. Bond wires 54 may be used to make electrically connections between the components, the power transistor and the package (as needed). As shown, a single power transistors may be attached to a single package. However, it should also be understood that multiple power transistors may be attached to a single package.

The package may comprise suitable package material known in the art. In some embodiments, the package material is formed of a metal and/or a metal alloy. For example, the package may be formed of a copper/tungsten alloy coated with gold. In some cases, the package may comprise, at least in part, a ceramic material.

In some embodiments, transistors 40 may not be attached to a package. Instead, the transistors may be attached directly to a board, or to a heat sink. When attached to a board, other components may also be attached to the same board.

Transistors of the invention may operate in common source configuration. In this configuration, the source pads (and source electrodes) are connected to ground, the input signal from a source is received by the gate pads (and gate electrodes), and the output signal is transmitted from the drain pads (and drain electrodes) to a load driven by the transistor. However, it is possible, for the transistors to operate in other configurations.

The transistors typically are connected to an impedance matching network which transforms impedance, amongst other functions. The impedance matching network may include an input matching network (e.g., formed between the input signal source and the gate pads) and an output matching network (e.g., formed between the drain pads and the load). The input matching network is designed to transform the input impedance of the transistor to a desired impedance (e.g., to a larger impedance to ease any subsequent external matching). The output matching network is designed to transform the output impedance o