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Memory hub and access method having internal prefetch buffers Number:7,412,566 from the United States Patent and Trademark Office (PTO) owispatent

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Title: Memory hub and access method having internal prefetch buffers

Abstract: A memory module includes a memory hub coupled to several memory devices. The memory hub includes history logic that predicts on the basis of read memory requests which addresses in the memory devices from which date are likely to be subsequently read. The history logic applies prefetch suggestions corresponding to the predicted addresses to a memory sequencer, which uses the prefetch suggestions to generate prefetch requests that are coupled to the memory devices. Data read from the memory devices responsive to the prefetch suggestions are stored in a prefetch buffer. Tag logic stores prefetch addresses corresponding to addresses from which data have been prefetched. The tag logic compares the memory request addresses to the prefetch addresses to determine if the requested read data are stored in the prefetch buffer. If so, the requested data are read from the prefetch buffer. Otherwise, the requested data are read from the memory devices.

Patent Number: 7,412,566 Issued on 08/12/2008 to Lee,   et al.


Inventors: Lee; Terry R. (Boise, ID), Jeddeloh; Joseph M. (Shoreview, MN)
Assignee: Micron Technology, Inc. (Boise, ID)
Appl. No.: 11/510,150
Filed: August 24, 2006


Related U.S. Patent Documents

Application NumberFiling DatePatent NumberIssue Date
10601252Jun., 20037260685

Current U.S. Class: 711/137 ; 709/250
Current International Class: G06F 12/08 (20060101)
Field of Search: 711/137,118,154,213,145,113,112,114 710/22,3,100 709/229,250,233,104


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