Method for producing semiconductor device Number:6,765,229 from the United States Patent and Trademark Office (PTO) owispatent A silicon film provided on a blocking film 102 on a substrate 101 is made amorphous by doping Si+, and in a heat-annealing process, crystallization is started in parallel to a substrate from an area 100 where nickel serving as a crystallization-promoting catalyst is introduced.<H semiconductor, producing, Method, for, prod, 6765229.html, Patent, pto, 6765229

Title: Method for producing semiconductor device

Abstract: A silicon film provided on a blocking film 102 on a substrate 101 is made amorphous by doping Si+, and in a heat-annealing process, crystallization is started in parallel to a substrate from an area 100 where nickel serving as a crystallization-promoting catalyst is introduced.

Patent Number: 6,765,229 Issued on 07/20/2004 to Zhang, et al.

Inventors: Zhang; Hongyong (Kanagawa, JP), Takemura; Yasuhiko (Shiga, JP), Takayama; Toru (Kanagawa, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd. (Kanagawa-ken, JP)

Appl. No.: 09/985,394

Filed: November 2, 2001

Related U.S. Patent Documents


Application Number	Filing Date	Patent Number	Issue Date
532899	Mar., 2000	6337231
935338	Oct., 1997	6090646
477943	Jun., 1995
248219	May., 1994

Foreign Application Priority Data


May 26, 1993 [JP]			5-147002

Current U.S. Class: 257/57 ; 257/345; 257/350; 257/49; 257/50; 257/51; 257/66; 257/70; 257/72; 257/74; 257/E21.133; 257/E21.134; 257/E21.413; 257/E21.703; 257/E27.111

Current International Class: H01L 21/336 (20060101); H01L 21/70 (20060101); H01L 27/12 (20060101); H01L 21/02 (20060101); H01L 21/20 (20060101); H01L 21/84 (20060101)

Field of Search: 257/70,49-51,57,66,385,72,74,754,345,350

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Primary Examiner: Flynn; Nathan J.
Assistant Examiner: Sefer; Ahmed N.
Attorney, Agent or Firm: Robinson; Eric J. Robinson Intellectual Property Law Office, P.C.

Parent Case Text

This is a Divisional of prior application Ser. No. 09/532,899 filed Mar. 22, 2000 now U.S. Pat. No. 6,337,231; which itself is a division of Ser. No. 08/935,338 filed Oct. 2, 1997 now U.S. Pat. No. 6,090,646; which is a Continuation of Ser. No. 08/477,943 filed Jun. 7, 1995, now abandoned; which is a Continuation-in-Part of Ser. No. 08/248,219 filed May 24, 1994, now abandoned.

Claims

What is claimed is:

1. A semiconductor device comprising: a semiconductor layer formed on an insulating surface, the semiconductor layer comprising crystallized silicon and having source, drain and channel regions therein wherein the channel region has a uniform crystal growth direction in parallel with the insulating surface; and a gate electrode adjacent to the channel region with a gate insulating film interposed therebetween, wherein the crystal growth direction in the channel region and a carrier flow direction in the channel region form an acute angle.

2. The semiconductor device according to claim 1 wherein the semiconductor layer contains a metal element selected from the group consisting of Ni, Fe, Co, Pd and Pt.

3. The semiconductor device according to claim 1 wherein the gate electrode is located over the channel region.

4. The semiconductor device according to claim 1 wherein the semiconductor layer has a thickness of 500 to 1500 .ANG..

5. A semiconductor device comprising: a semiconductor layer formed on an insulating surface, the semiconductor layer comprising crystallized silicon and having source, drain and channel regions therein wherein the channel region comprises a plurality of crystals extending in a direction in parallel with the insulating surface; and a gate electrode adjacent to the channel region with a gate insulating film interposed therebetween, wherein the extending direction of the crystals and a carrier flow direction in the channel region form an acute angle.

6. The semiconductor device according to claim 5 wherein the semiconductor layer contains a metal element selected from the group consisting of Ni, Fe, Co, Pd and Pt.

7. The semiconductor device according to claim 5 wherein the gate electrode is located over the channel region.

8. The semiconductor device according to claim 5 wherein the semiconductor layer has a thickness of 500 to 1500 .ANG..

9. A semiconductor device comprising: at least one N-channel type thin film transistor and one p-channel type thin film transistor formed over a same substrate, each of the thin film transistors comprising: a semiconductor layer formed on an insulating surface, the semiconductor layer comprising crystallized silicon and having source, drain and channel regions therein wherein the channel region has a uniform crystal growth direction in parallel with the insulating surface; and a gate electrode adjacent to the channel region with a gate insulating film interposed therebetween, wherein the crystal growth direction in the channel region and a carrier flow direction in the channel region form an acute angle.

10. The semiconductor device according to claim 9 wherein the semiconductor layer contains a metal element selected from the group consisting of Ni, Fe, Co, Pd and Pt.

11. The semiconductor device according to claim 9 wherein the gate electrode is located over the channel region.

12. The semiconductor device according to claim 9 wherein the semiconductor layer has a thickness of 500 to 1500 .ANG..

13. A semiconductor device comprising: at least one N-channel type thin film transistor and one p-channel type thin film transistor formed over a same substrate, each of the thin film transistors comprising: a semiconductor layer formed on an insulating surface, the semiconductor layer comprising crystallized silicon and having source, drain and channel regions therein wherein the channel region comprises a plurality of crystals extending in a direction in parallel with the insulating surface; and a gate electrode adjacent to the channel region with a gate insulating film interposed therebetween, wherein the extending direction of the crystals and a carrier flow direction in the channel region form an acute angle.

14. The semiconductor device according to claim 13 wherein the semiconductor layer contains a metal element selected from the group consisting of Ni, Fe, Co, Pd and Pt.

15. The semiconductor device according to claim 13 wherein the gate electrode is located over the channel region.

16. The semiconductor device according to claim 13 wherein the semiconductor layer has a thickness of 500 to 1500 .ANG..

17. A semiconductor device comprising: at least first and second thin film transistors formed over a same substrate, each of the first and second thin film transistors comprising: a semiconductor layer formed on an insulating surface, the semiconductor layer comprising crystallized silicon and having source, drain and channel regions therein wherein the channel region has a uniform crystal growth direction in parallel with the insulating surface; and a gate electrode adjacent to the channel region with a gate insulating film interposed therebetween, wherein the crystal growth direction in the channel region and a carrier flow direction in the channel region form an acute angle, and wherein the crystal growth direction in the channel region of the first thin film transistor coincides with that of the second thin film transistor.

18. The semiconductor device according to claim 17 wherein the semiconductor layer contains a metal element selected from the group consisting of Ni, Fe, Co, Pd and Pt.

19. The semiconductor device according to claim 17 wherein the gate electrode is located over the channel region.

20. The semiconductor device according to claim 17 wherein the first thin film transistor is an N-channel type thin film transistor and the second thin film transistor is a P-channel type thin film transistor.

21. The semiconductor device according to claim 17 wherein the semiconductor layer has a thickness of 500 to 1500 .ANG..

22. A semiconductor device comprising: at least first and second thin film transistors formed over a same substrate, each of the thin film transistors comprising: a semiconductor layer formed on an insulating surface, the semiconductor layer comprising crystallized silicon and having source, drain and channel regions therein wherein the channel region comprises a plurality of crystals extending in a direction in parallel with the insulating surface; and a gate electrode adjacent to the channel region with a gate insulating film interposed therebetween, wherein the extending direction of the crystals and a carrier flow direction in the channel region form an acute angle, and wherein the crystal growth direction in the channel region of the first thin film transistor coincides with that of the second thin film transistor.

23. The semiconductor device according to claim 22 wherein the semiconductor layer contains a metal element selected from the group consisting of Ni, Fe, Co, Pd and Pt.

24. The semiconductor device according to claim 22 wherein the gate electrode is located over the channel region.

25. The semiconductor device according to claim 22 wherein the first thin film transistor is an N-channel type thin film transistor and the second thin film transistor is a P-channel type thin film transistor.

26. The semiconductor device according to claim 22 wherein the semiconductor layer has a thickness of 500 to 1500 .ANG..

Description

BACKGROUND OF THE INVENTION

1. Field of the Invention

This invention relates to a semiconductor device having TFTs (thin film transistors) provided on an insulating substrate of glass or the like, and a method for producing the semiconductor device.

2. Description of Related Art

TFTs have been conventionally formed on a glass substrate to form a semiconductor device such as an active matrix liquid crystal device or an image sensor. The TFTs are used, for example, to drive the pixels of the liquid crystal device.

The TFTs used in the above devices are generally formed of a silicon semiconductor layer in the form of a thin film. The silicon semiconductor of a thin-film type is classified into two types, an amorphous silicon semiconductor (a-Si) type and a crystalline silicon semiconductor type. The amorphous silicon semiconductor can be relatively easily produced at a low film-forming temperature by a vapor-phase deposition method. Therefore, this type is suitable for mass production, and it has been most generally used. However, this type of silicon semiconductor has inferior physical properties such as electrical conductivity, etc. to the crystalline silicon semiconductor. Therefore, in order to more improve a high-speed response characteristic of TFTs, a producing method for TFTs comprising crystalline silicon semiconductor has been strongly required to be established. As the silicon semiconductor having crystallinity have been known polycrystalline silicon, microcrystalline silicon, amorphous silicon containing crystal components, semi-amorphous silicon having an intermediate state between crystallinity and amorphousness, etc.

The following methods may be used to obtain thin film silicon semiconductors having the foregoing crystallinity: (1) Crystallinity is established during the formation of the semiconductor film. (2) An amorphous semiconductor film is formed in advance, and then a laser beam is irradiated to the film to crystalize the film. (3) An amorphous semiconductor film is formed in advance, and then heated to crystalize the film.

However, in the method (1), it is technically difficult to form a film having excellent semiconductor physical properties on the whole surface of a substrate uniformly. In addition, the film formation must be performed at a temperature above 600.degree. C. and thus an inexpensive glass substrate is unusable, so that a manufacturing cost is increased.

In the method (2), an excimer laser is most generally used at present as a laser beam source for irradiating a laser beam to an amorphous semiconductor film. In this case, the irradiation area of the laser beam is small, and thus this method has a disadvantage that a throughput is low. In addition, the stability of the laser beam is insufficient, so that the whole surface of a large-area substrate cannot be treated uniformly. That is, this method is not practically usable at present.

As compared to the methods (1) and (2), the method (3) has an advantage that it is more suitable to manufacture a large-area semiconductor film. However, this method requires a heating temperature above 600.degree. C., and thus an inexpensive glass substrate is not usable. Therefore, this method must be developed to reduce the heating temperature. Particularly in case of present liquid crystal display devices, a large-area screen design is being promoted, and thus use of a large-size glass substrate is required. When a large-size glass substrate is used, contraction and distortion of a substrate occur in a heating process which is indispensable to produce semiconductors, and they cause a critical problem that the precision of a masking process is reduced. Particularly in a case of 7059 glass which is most generally used at present, it has a distortion point of 593.degree. C., and it is greatly deformed in a conventional heat crystallization method. In addition to the heat problem as described above, a heating time required for crystallization is over several tens hours in a present process, and thus the heating time must be shortened.

SUMMARY OF THE INVENTION

An object of the present invention is to provide a method capable of solving the above problems, and specifically to provide a process for producing a silicon semiconductor thin film having crystallinity utilizing a method of heating an amorphous silicon thin film to crystallize the thin film, in which both of lowering of the temperature for crystallization and shortage of the heating time for crystallization can be performed. A silicon semiconductor having crystallinity which is manufactured using the process according to this invention has the same physical properties as or physical properties superior to that manufactured by a conventional technique, and it is usable in an active layer area of TFTs.

The inventors of this application have made the following experiments and consideration for a method of forming an amorphous silicon semiconductor film as described above by a CVD method or a sputtering method, and then heating the film to crystalize the film.

An amorphous silicon film is initially formed on a glass substrate, and then the film is crystallized by heating. The inventors investigated the mechanism of this crystallization. Through the experiments, it was observed that crystal growth of silicon starts at an interface between the glass substrate and the amorphous silicon and proceeds vertically to the substrate surface into a pillar shape in the case that the thickness of the film is larger than a certain thickness.

The above phenomenon is considered as progressing on the basis of a mechanism that crystalline nuclei serving as geneses for crystal growth (species serving as geneses for crystal growth) exist between the glass substrate and the amorphous silicon film, and crystal grow from the crystalline nuclei. These crystalline nuclei are considered as being impurity metal elements or crystal components (as is called as a crystallized glass, it is considered that crystal components of silicon oxide exist on the surface of the glass substrate) existing on the surface of the substrate in a very small amount.

Accordingly, it is expected that a crystallization temperature can be lowered by introducing crystal nuclei more positively. In order to confirm an effect of introducing crystal nuclei, the following experiment was tried. That is, a thin film of different metal in a very small amount was beforehand formed on a substrate, then an amorphous silicon thin film was formed on the different metal film, and then heat-crystallization was conducted on the amorphous silicon thin film. As a result, it was proved that the crystallization temperature was lowered when thin films of some different kinds of metal were beforehand formed on the substrate, and it was expected that crystal growth using foreigners as crystal nuclei had conducted. Accordingly, a more detailed mechanism for plural kinds of impurity metal which could lower the crystallization temperature was studied.

The crystallization mechanism can be considered to be classified into two stages which are an initial nucleus generation stage and a subsequent crystal growth stage from the nuclei. The speed of the initial nucleus generation can be detected by measuring a time elapsing until spotted fine crystals occur at a constant temperature. This time could be shortened in all cases where the thin films of the above kinds of impurity metal were formed on the substrate, and the effect of the introduction of the crystal nuclei on the lowering of the crystallization temperature can be proved. As an unexpected result, through an experiment for examining variation of growth of crystal grains with variation of the heating time after generation of crystal nuclei, it was observed that the speed of the crystal growth after the generation of the nuclei was also rapidly increased when a thin film of a certain kind of metal was formed on a substrate, an amorphous silicon thin film was formed on the metal thin film and then the amorphous silicon thin film was crystallized. A mechanism for this effect has not yet been elucidated at present, however, it is guessed that any catalytic effect acts.

At any rate, it was proved that when a thin film was formed of a certain kind metal in a very small amount, an amorphous silicon thin film was formed on the metal thin film and then the amorphous silicon thin film was crystallized by heating, sufficient crystallinity which had not been expected in the prior art could be obtained at a temperature below 580.degree. C. and for about 4 hours due to the two effects as described above. Nickel (Ni) is the best material which is experimentally proved as providing the most remarkable effect in all impurity metals having such an effect. In addition to nickel, Fe, Co, Pd and Pt may be listed as a metal element having such a catalytic action on crystallization.

The following is an example showing an effect of formation of a nickel thin film. In a case where an amorphous silicon thin film was formed by a plasma CVD method on a substrate (coring 7059 glass) which had been subjected to no treatment, that is, on which no nickel thin film had been formed, and then heated under a nitrogen atmosphere to crystallize the amorphous silicon thin film, a heating time over ten hours was required for a heating temperature of 600.degree. C. On the other hand, in a case where an amorphous silicon thin film was formed on a substrate on which a nickel thin film in a very small amount (hereinafter referred to as a trace nickel thin film) had been formed, the same crystal state as the former case could be obtained by heating the amorphous silicon thin film for about 4 hours. The crystallization of the amorphous silicon thin film was judged using a Raman spectrum in this experiment. From this experiment, it is apparent that nickel has a large effect.

As is apparent from the foregoing, formation of an amorphous silicon thin film after a trace nickel thin film is formed enables the lowering of the crystallization temperature and the shortening of the crystallization time. This process will be described in more detail on the assumption that this process is applied to a TFT producing process. As described later, the same effect can be obtained by forming a nickel thin film on not only a substrate, but also on an amorphous silicon thin film, or by implanting the nickel into the amorphous silicon by an ion implantation method. Accordingly, these treatments are commonly referred to as "trace nickel addition" in the specification of this application.

First, a method for the trace nickel addition will be described.

It has been known that the trace nickel addition can provide the same effect on the lowering of the crystallization temperature in both cases where a trace nickel thin film is formed on a substrate and then an amorphous silicon thin film is formed on the trace nickel thin film, and where an amorphous silicon film is formed and then a trace nickel thin film is formed on the amorphous silicon film, and any film-forming method such as a sputtering method, a deposition method, spin coating, coating or the like may be used as a film-forming method. However, in the method of forming the trace nickel thin film on the substrate, the effect becomes more remarkable by forming a silicon oxide film on a 7059 glass substrate and then forming the trace nickel thin film on the silicon oxide film than by directly forming the trace nickel thin film on the substrate. As one of reasons for this fact, it would be considered that direct contact between silicon and nickel is important for the low-temperature crystallization, and components other than silicon serves to obstruct direct contact or reaction between silicon and nickel in the case of using a 7059 glass substrate.

It was proved that the substantially same effect could be obtained by adding nickel with the ion implantation method as well as the method of forming the trace nickel thin film in contact with the lower surface or upper surface of the amorphous silicon thin film as described above. The lowering of the crystallization temperature was observed for addition of nickel of 1.times.10.sup.15 atoms/cm.sup.3 or more. However, it was observed that for addition of nickel of 1.times.10.sup.21 atoms/cm.sup.3 or more, the shape of the peak of a Raman spectrogram was clearly different from that