Method of making a bumped terminal in a laminated structure for a semiconductor chip assembly Number:6,800,506 from the United States Patent and Trademark Office (PTO) owispatent

Title: Method of making a bumped terminal in a laminated structure for a semiconductor chip assembly

Abstract: A method of making a semiconductor chip assembly includes providing a semiconductor chip and a laminated structure, wherein the chip includes a conductive pad, the laminated structure includes a conductive trace, an insulative base and a metal base, the conductive trace includes a routing line and a bumped terminal, the metal base and the routing line are disposed on opposite sides of the insulative base, and the bumped terminal includes a cavity that extends through the insulative base and into the metal base, removing a portion of the metal base that contacts the bumped terminal, and forming a connection joint that contacts and electrically connects the conductive trace and the pad.

Patent Number: 6,800,506 Issued on 10/05/2004 to Lin,   et al.

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Inventors:	Lin; Charles W. C. (Singapore, SG), Chiang; Cheng-Lien (Taipei, TW)
Assignee:	Bridge Semiconductor Corporation (Taipei, TW)
Appl. No.:	10/156,469
Filed:	May 28, 2002

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Related U.S. Patent Documents

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	Application Number	Filing Date	Patent Number	Issue Date
	972796	Oct., 2001	6667229
	962754	Sep., 2001	6673710
	878626	Jun., 2001	6653217
	687619	Oct., 2000	6440835
	972796
	917339	Jul., 2001	6537851

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Current U.S. Class:

438/107 ; 257/E21.508; 438/105; 438/106; 438/108

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Primary Examiner: Nelms; David
Assistant Examiner: Berry; Renee R.
Attorney, Agent or Firm: Sigmond; David M.

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Parent Case Text

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CROSS-REFERENCE TO RELATED APPLICATIONS

This application is a continuation of U.S. application Ser. No. 09/972,796 filed Oct. 6, 2001, now U.S. Pat. No. 6,667,229.

The '796 application is a continuation-in-part of U.S. application Ser. No. 09/962,754 filed Sep. 24, 2001, now U.S. Pat. No. 6,673,710, which is a continuation-in-part of U.S. application Ser. No. 09/878,626 filed Jun. 11, 2001 now U.S. Pat. No. 6,653,217, which is a continuation-in-part of U.S. application Ser. No. 09/687,619 filed Oct. 13, 2000 now U.S. Pat. No. 6,440,235, each of which is incorporated by reference.

The '796 application is also a continuation-in-part of U.S. application Ser. No. 09/917,339 filed Jul. 27, 2001 now U.S. Pat. No. 6,537,851, which is a continuation-in-part of U.S. application Ser. No. 09/878,626 filed Jun. 11, 2001 now U.S. Pat. No. 6,653,217, which is a continuation-in-part of U.S. application Ser. No. 09/687,619 filed Oct. 13, 2000 now U.S. Pat. No. 6,440,835, each of which is incorporated by reference.

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Claims

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What is claimed is:

1. A method of making a semiconductor chip assembly, comprising: providing a semiconductor chip and a laminated structure, wherein the chip includes a conductive pad, the laminated structure includes a conductive trace, an insulative base and a metal base, the conductive trace includes a routing line and a bumped terminal, the metal base and the routing line are disposed on opposite sides of the insulative base, and the bumped terminal includes a cavity that extends through the insulative base and into the metal base; removing a portion of the metal base that contacts the bumped terminal; and forming a connection joint that contacts and electrically connects the conductive trace and the pad.

2. The method of claim 1, including mechanically attaching the chip to the conductive trace using an insulative adhesive before removing the portion of the metal base.

3. The method of claim 2, including forming a through-hole that extends through the insulative base and the adhesive and exposes the conductive trace and the pad after removing the portion of the metal base and before forming the connection joint.

4. The method of claim 3, wherein the adhesive contacts and is sandwiched between the conductive trace and the pad, and the conductive trace and the pad arc electrically isolated from one another after forming the through-hole and before forming the connection joint.

5. The method of claim 1, including filling an insulator into the cavity before removing the portion of the metal base.

6. The method of claim 1, wherein the bumped terminal extends into and contacts sidewalls of an opening in the routing line.

7. The method of claim 1, wherein the bumped terminal is a plated metal.

8. The method of claim 1, wherein the metal base and the routing line are a first metal and the bumped terminal includes a second metal.

9. The method of claim 8, wherein the first metal is copper and the second metal is nickel.

10. The method of claim 1, wherein the assembly is devoid of wire bonds and TAB leads.

11. A method of making a semiconductor chip assembly, comprising: providing a semiconductor chip that includes a conductive pad; providing a laminated structure that includes a conductive trace, an insulative base and a metal base, wherein the conductive trace includes a routing line and a bumped terminal, the metal base and the routing line are disposed on opposite sides of the insulative base, and the bumped terminal includes a cavity that extends through the insulative base and into the metal base; then disposing an insulative adhesive between the chip and the laminated structure, thereby mechanically attaching the chip to the laminated structure such that the metal base is disposed on a side of the insulative base that faces away from the chip and the routing line is disposed on a side of the insulative base that faces towards the chip; then removing a portion of the metal base that contacts the bumped terminal; and forming a connection joint that contacts and electrically connects the conductive trace and the pad.

12. The method of claim 11, including forming a through-hole that extends through the insulative base and the adhesive and exposes the conductive trace and the pad after removing the portion of the metal base and before forming the connection joint.

13. The method of claim 11, wherein the routing the overlaps the pad and extends within and outside a periphery of the chip, the bumped terminal is disposed outside the periphery of the chip, and the bumped terminal extends across the opposite sides of the insulative base.

14. The method of claim 11, wherein forming the bumped terminal includes: forming a via that extends through the insulative base and into the metal base; and then depositing, the bumped terminal into the via, wherein the bumped terminal in the via contacts the insulative base and the metal base.

15. The method of claim 14, wherein depositing the bumped terminal includes metal on the metal base in the via and then plating a second metal on the first metal and the insulative base in the via.

16. The method of claim 15, wherein plating the first metal includes electroplating and plating the second metal includes electroless plating.

17. The method of claim 11, wherein the adhesive fills the cavity.

18. The method of claim 11, including forming an encapsulant on the chip after attaching the chip to the laminated structure and before removing the portion of the metal base, wherein the encapsulant fills the cavity.

19. The method of claim 11, wherein the bumped terminal is the only electrical conductor that is electrically connected to the pad and extends through the insulative base to the side of the insulative base that faces away from the chip.

20. The method of claim 11, wherein the assembly is devoid of wire bonds and TAB leads.

21. A method of making a semiconductor chip assembly, comprising. providing a laminated structure that includes a conductive trace, an insulative base and a metal base, wherein the conductive trace includes a routing line and a bumped terminal, the metal base and the routing line are disposed on opposite sides of the insulative base, and the bumped terminal includes a cavity that extends through the insulative base and into the metal base; then disposing an insulative adhesive between a chip and the laminated structure, thereby mechanically attaching the chip to the laminated structure, wherein the chip includes a pad, the metal base is disposed on a side of the insulative base that faces away from the chip, the routing line is disposed on a side of the insulative base that faces towards the chip and extends within and outside a periphery of the chip, and the bumped terminal is disposed outside the periphery of the chip and extends through the insulative base; removing a portion of the metal base that contacts the bumped terminal; and forming a connection joint that contacts and electrically connects the routing line and the pad.

22. The method of claim 21, wherein forming the touting line includes: providing a metal layer in contact with the insulative base; forming a photoresist layer; etching the metal layer using the photoresist layer as an etch mask; and removing the photoresist layer.

23. The method of claim 22, wherein forming the bumped terminal includes: forming a via that extends through the metal layer and the insulative base and into but not through the metal base; and then depositing the bumped terminal into the via, wherein the bumped terminal in the via contacts the metal layer, the insulative base and the metal base.

24. The method of claim 23, wherein depositing the humped terminal into the via includes: depositing a first portion of the humped terminal into the via and on the metal base without depositing the first portion of the bumped terminal on the insulative base and without depositing the first portion of the bumped terminal on the metal layer; and then depositing a second portion of the bumped terminal into the via and on the first portion of the bumped terminal, the insulative base and the metal layer without depositing the second portion of the bumped terminal on the metal base.

25. The method of claim 24, wherein depositing the first portion of the bumped terminal includes electroplating the first portion of the bumped terminal on the metal base.

26. The method of claim 25, wherein depositing the second portion of the bumped terminal includes electrolessly plating the second portion of the bumped terminal on the first portion of the bumped terminal, the insulative base and the metal layer.

27. The method of claim 21, wherein forming the bumped terminal includes: forming a via that extends through the insulative base and into the metal base; and then depositing the bumped terminal into the via, wherein the bumped terminal in die via contacts the insulative base and the metal base.

28. The method of claim 27, wherein the via extends through the routine line.

29. The method of claim 27, wherein depositing the bumped terminal includes plating a first metal on the metal base in the via and then plating a second metal on the first metal and the insulative base in the via.

30. The method of claim 29, wherein plating the first metal includes electroplating and plating the second metal includes electroless plating.

31. The method of claim 21, including forming a through-hole that extends through the insulative base and the adhesive and exposes the routing line and the pad after removing the portion of the metal base and before forming the connection joint.

32. The method of claim 31, wherein forming the through-hole includes applying a laser etch that ablates the insulative base and the adhesive.

33. The method of claim 21, including forming an encapsulant on the chip after attaching the chip to the laminated structure and before removing the portion of the metal base, wherein the encapsulant fills the cavity.

34. The method of claim 33, wherein forming the encapsulant includes transfer molding.

35. The method of claim 21, wherein the adhesive fills the cavity.

36. The method of claim 21, wherein the metal base and the routing line are copper.

37. The method of claim 21, wherein the bumped terminal includes a first plated metal spaced from the cavity and a second plated metal adjacent to the cavity.

38. The method of claim 21, wherein the bumped terminal is the only electrical conductor that is electrically connected to the pad and extends through the insulative base to the side of the insulative base that faces away from the chip after forming the connection joint.

39. The method of claim 21, wherein removing the portion of the metal base includes applying a wet chemical etch that is selective of the metal base with respect to the humped terminal.

40. The method of claim 21, wherein the assembly is devoid of wire bonds and TAB leads.

41. A method of making a semiconductor chip assembly, comprising: providing a laminated structure that includes a metal base, an insulative base and a metal layer, wherein the metal base and the metal layer are disposed on opposite sides of the insulative base; forming a via in the laminated structure that extends through the metal layer and the insulative base and into the metal base; depositing a humped terminal into the via, wherein the humped terminal contacts the metal base, the insulative base and the metal layer in the via, and the bumped terminal includes a cavity that extends through the metal layer and the insulative base and into the metal base; providing an etch mask over the metal layer, wherein the etch mask includes an opening over a portion of the metal layer; applying an etch to the portion of the metal layer through the opening in the etch mask, thereby forming a routing line that includes an unetched portion of the metal layer; then mechanically attaching a chip to the laminated structure using an insulative adhesive, wherein the chip includes a pad, a conductive trace includes the routing line and the bumped terminal, the metal base is disposed on a side of the insulative base that faces away from the chip, and the routing line is disposed on a side of the insulative base that faces towards the chip; removing a portion of the metal base that contacts the bumped terminal, wherein the bumped terminal extends beyond the insulative base in a direction away from the chip; and forming a connection joint that contacts and electrically connects the routing line and the pad.

42. The method of claim 41, wherein forming the via includes mechanical drilling.

43. The method of claim 41, wherein depositing the bumped terminal includes plating a metal on the insulative base and the metal layer in the via.

44. The method of claim 41, wherein depositing the bumped terminal includes plating a first metal on the metal base in the via and then plating a second metal on the first metal, the insulative base and the metal layer in the via.

45. The method of claim 41, wherein providing the etch mask includes depositing a photoresist layer on the metal layer and selectively patterning the photoresist layer after depositing the bumped terminal.

46. The method of claim 41, wherein removing the portion of the metal base includes applying a wet chemical etch that is highly selective of the metal base with respect to the insulative bass and the bumped terminal and removes all of the metal base.

47. The method of claim 41, wherein the bumped terminal is disposed within a periphery of the chip, and the adhesive fills the cavity.

48. The method of claim 41, wherein the routing line extends within and outside a periphery of the chip, the bumped terminal is disposed outside the periphery of the chip, and an encapsulant contacts a side of the chip opposite the pad, the insulative base and the routing line and fills the cavity.

49. The method of claim 41, wherein the metal base and the metal layer are copper, the bumped terminal includes nickel, the insulative base includes polyimide or epoxy, and the adhesive includes polyimide or epoxy.

50. The method of claim 41, wherein the assembly is devoid of wire bonds and TAB leads.

51. A method of making a semiconductor chip assembly, comprising: providing a laminated structure that includes a metal base, an insulative base and a metal layer, wherein the metal base and the metal layer are disposed on opposite sides of the insulative base; forming a via in the laminated structure that extends through the insulative base and into the metal base and the metal layer, depositing a bumped terminal into the via, wherein the bumped terminal contacts the metal base, the insulative base and the metal layer in the via, and the bumped terminal includes a cavity that extends through the metal layer and the insulative base and into the metal base; providing an etch mask over the metal layer, wherein the etch mask includes an opening over a portion of the metal layer; applying an etch to the portion of the metal layer through the opening in the etch mask, thereby forming a routing line that includes an unetched portion of the metal layer; then mechanically attaching a chip to the laminated structure using an insulative adhesive, wherein the chip includes a pad, a conductive trace includes the routing line and the bumped terminal, the metal base is disposed on a side of the insulative base that faces away from the chip, and the routing line is disposed on a side of the insulative base that faces towards the chip; then removing a first portion of the metal base that overlaps the pad and a second portion of the metal base that contacts the bumped terminal, wherein the bumped terminal extends beyond the insulative base in a direction away from the chip; forming a through-hole that extends through the insulative base and the adhesive and exposes the routing line and the pad; and forming a connection joint that contacts and electrically connects the routing line and the pad.

52. The method of claim 51, wherein forming the via includes mechanical drilling.

53. The method of claim 51, wherein depositing the bumped terminal includes plating a metal on the metal base, the insulative base and the metal layer in the via.

54. The method of claim 51, wherein depositing the bumped terminal includes plating a first metal on the metal base in the via and then plating a second metal on the first metal, the insulative base and the metal layer in the via.

55. The method of claim 51, wherein providing the etch mask includes depositing a photoresist layer on the metal layer and selectively patterning the photoresist layer after depositing the bumped terminal.

56. The method of claim 51, wherein removing the portions of the metal base includes applying a wet chemical etch that is highly selective of the metal base with respect to the insulative base and the bumped terminal and removes all of the metal base.

57. The method of claim 51, wherein the bumped terminal is disposed within a periphery of the chip, and the adhesive fills the cavity.

58. The method of claim 51, wherein the routing line extends within and outside a periphery of the chip, the bumped terminal is disposed outside the periphery of the chip, and an encapsulant contacts a side of the chip opposite the pad, the insulative base and the routing line and fills the cavity.

59. The method of claim 51, wherein the metal base and the metal layer are copper, the bumped terminal includes nickel, the insulative base includes polyimide or epoxy, and the adhesive includes polyimide or epoxy.

60. The method of claim 51, wherein the assembly is devoid of wire bonds and TAB leads.

61. A method of making a semiconductor chip assembly, comprising: providing a laminated structure that includes a metal base, an insulative base and a metal layer, wherein the metal base and the metal layer are disposed on opposite sides of the insulative base; forming a via in the laminated structure that extends through the metal layer and the insulative base and into but not through the metal base, thereby forming a recess in the metal base; forming a bumped terminal in the via, wherein the bumped terminal contacts the metal base, the insulative base and the metal layer in the via, and the bumped terminal includes a cavity that extends through the metal layer and he insulative base and into the recess and faces away from the metal base; forming a routing line from a first portion of the metal layer by selectively removing a second portion of the metal layer; then mechanically attaching a chip to the laminated structure using an insulative adhesive, wherein the chip includes a pad, a conductive trace includes the routing line and the bumped terminal, the metal base is disposed on a side of the insulative base that faces away from the chip, the routing line is disposed on a side of the insulative base that faces towards the chip, and the bumped terminal contacts the routing line; then removing a portion of the metal base that contacts the bumped terminal; and forming a connection joint that contacts and electrically connects the routing line and the pad.

62. The method of claim 61, wherein forming the via includes mechanically drilling through the metal layer and the insulative base and into b