Senior Fitness - Exercise and Nutrition for Aging Men and Women
FREE Article Feed for your website.
Home Ownership Magazine
Party Planning Information
Article Marketing Resources
Bio-Medical Research Article Database
Informative Articles on Life, Love and Happiness
Tutorials on Business to Writing
Famous Quotes from Famous People
Song Lyric Information
New US Patent Information
Comprehensive List of Content by Category
Online Auctions and Shopping Related Articles
Article Search
Most Recent Articles
Title: Positioning system for portable electronic devices
Patent Number: 7,522,101 Issued on 04/21/2009 to Homiller,   et al.

Title: Subfemtotesla radio-frequency atomic magnetometer for nuclear quadrupole resonance detection
Patent Number: 7,521,928 Issued on 04/21/2009 to Romalis,   et al.

Title: Vertical transistor and a semiconductor integrated circuit apparatus having the same
Patent Number: 7,521,747 Issued on 04/21/2009 to Sakuragi,   et al.

Title: Packages for semiconductor light emitting devices utilizing dispensed reflectors and methods of forming the same
Patent Number: 7,521,728 Issued on 04/21/2009 to Andrews

Title: Light emitting device having improved light extraction efficiency and method of making same
Patent Number: 7,521,727 Issued on 04/21/2009 to Khanarian,   et al.

Title: Collimated LED array with reflector
Patent Number: 7,521,726 Issued on 04/21/2009 to Dahl,   et al.

Title: Optical waveguide and the method of fabricating the same
Patent Number: 7,521,725 Issued on 04/21/2009 to Nakagawa,   et al.

Title: Light emitting diode package and process of making the same
Patent Number: 7,521,724 Issued on 04/21/2009 to Chen,   et al.

Title: Surface emitting semiconductor laser chip and method for producing the chip
Patent Number: 7,521,723 Issued on 04/21/2009 to Plass,   et al.

Title: Multiple beam micro-machining system and method
Patent Number: 7,521,651 Issued on 04/21/2009 to Gross,   et al.

Title: Laser machining apparatus
Patent Number: 7,521,650 Issued on 04/21/2009 to Mori,   et al.

Title: Laser processing apparatus and laser processing method
Patent Number: 7,521,649 Issued on 04/21/2009 to Umetsu,   et al.

Title: Apparatus and method of maintaining a generally constant focusing spot size at different average laser power densities
Patent Number: 7,521,648 Issued on 04/21/2009 to Horsting

Title: Joining device
Patent Number: 7,521,647 Issued on 04/21/2009 to Schug,   et al.

Title: Collet and nut assembly for stud welder
Patent Number: 7,521,646 Issued on 04/21/2009 to Schlafhauser,   et al.

Title: Arc plate, and arc chute assembly and electrical switching apparatus employing the same
Patent Number: 7,521,645 Issued on 04/21/2009 to Shea,   et al.

Title: Operating module for a motor vehicle
Patent Number: 7,521,644 Issued on 04/21/2009 to Heiko

Title: Operating button device
Patent Number: 7,521,643 Issued on 04/21/2009 to Liu

Title: Switch assembly for an automotive power window
Patent Number: 7,521,642 Issued on 04/21/2009 to Belanger

Title: Lamp socket with multiple switches
Patent Number: 7,521,641 Issued on 04/21/2009 to Huang

Title: Dial-type manipulator having mark for confirming correct engaging position of gears
Patent Number: 7,521,640 Issued on 04/21/2009 to Kodama,   et al.

Title: Safety switch
Patent Number: 7,521,639 Issued on 04/21/2009 to Ward

Title: Portable scale
Patent Number: 7,521,638 Issued on 04/21/2009 to Godshaw,   et al.

Title: Multilayer printed circuit board having via arrangements for reducing crosstalk among vias
Patent Number: 7,521,637 Issued on 04/21/2009 to Gilliland

Title: Connecting apparatus adapted in a board module
Patent Number: 7,521,636 Issued on 04/21/2009 to Chuang

Title: Insulating wrap
Patent Number: 7,521,635 Issued on 04/21/2009 to Stout,   et al.

Title: Device for guiding at least one line
Patent Number: 7,521,633 Issued on 04/21/2009 to Jostmeier,   et al.

Title: Door hinge assembly and enclosure employing the same
Patent Number: 7,521,632 Issued on 04/21/2009 to Johnson

Title: Far-side support for brackets
Patent Number: 7,521,631 Issued on 04/21/2009 to Dinh

Title: Parallel and virtual parallel interconnection of solar cells in solar panels
Patent Number: 7,521,630 Issued on 04/21/2009 to Ball

Title: Thermoelectric transportation material containing nitrogen
Patent Number: 7,521,629 Issued on 04/21/2009 to Yamaguchi,   et al.

Title: Electrical musical instrument with user interface and status display
Patent Number: 7,521,628 Issued on 04/21/2009 to Armstrong-Muntner

Title: Automatic player musical instrument, automatic player incorporated therein and method used therein
Patent Number: 7,521,627 Issued on 04/21/2009 to Sasaki

Title: Automatic player musical instrument, testing system incorporated therein and method for specifying half pedal point
Patent Number: 7,521,626 Issued on 04/21/2009 to Muramatsu

Title: Graphical user interface and methods of use thereof in a multimedia player
Patent Number: 7,521,625 Issued on 04/21/2009 to Robbin,   et al.

Title: Content reproduction list generation device, content reproduction list generation method, and program-recorded recording medium
Patent Number: 7,521,624 Issued on 04/21/2009 to Asukai,   et al.

Title: Music synchronization arrangement
Patent Number: 7,521,623 Issued on 04/21/2009 to Bowen

Title: Noise-resistant detection of harmonic segments of audio signals
Patent Number: 7,521,622 Issued on 04/21/2009 to Zhang

Title: Compressed data structure and apparatus and method related thereto
Patent Number: 7,521,621 Issued on 04/21/2009 to Okazaki,   et al.

Title: Method of and system for browsing of music
Patent Number: 7,521,620 Issued on 04/21/2009 to Samadani,   et al.

Title: System and method of instructing musical notation for a stringed instrument
Patent Number: 7,521,619 Issued on 04/21/2009 to Salter

Title: Tuning device for musical instruments and computer program used therein
Patent Number: 7,521,618 Issued on 04/21/2009 to Okuyama

Title: Guitar display arrangement
Patent Number: 7,521,617 Issued on 04/21/2009 to McMurray

Title: Locking cam tremolo device
Patent Number: 7,521,616 Issued on 04/21/2009 to Kahler

Title: String tension adjustment structure
Patent Number: 7,521,615 Issued on 04/21/2009 to Ho,   et al.

Title: Plants and seeds of hybrid corn variety CH756602
Patent Number: 7,521,614 Issued on 04/21/2009 to Short,   et al.

Title: Plants and seeds of corn variety I226276
Patent Number: 7,521,613 Issued on 04/21/2009 to Popi

Title: Plants and seeds of corn variety I286346
Patent Number: 7,521,612 Issued on 04/21/2009 to Carlson

Title: Inbred maize variety PH1T9
Patent Number: 7,521,611 Issued on 04/21/2009 to Cunnyngham

Title: Maize hybrid variety X5T123
Patent Number: 7,521,610 Issued on 04/21/2009 to Pinnisch

Title: Plants and seeds of corn variety 1294213
Patent Number: 7,521,609 Issued on 04/21/2009 to Hall,   et al.

Title: Manufacturing method of a semiconductor device
Patent Number: 7,521,350 Issued on 04/21/2009 to Kurashima,   et al.

Title: Fundamental cell, semiconductor integrated circuit device, wiring method and wiring apparatus
Patent Number: 7,521,349 Issued on 04/21/2009 to Komaki

Title: Method of forming HfSiN metal for n-FET applications
Patent Number: 7,521,346 Issued on 04/21/2009 to Callegari,   et al.

Title: Method for producing direct bonded wafer and direct bonded wafer
Patent Number: 7,521,334 Issued on 04/21/2009 to Kobayashi,   et al.

Title: Methods of fabricating trench isolation structures having varying depth
Patent Number: 7,521,333 Issued on 04/21/2009 to Choi,   et al.

Title: Resistance-based etch depth determination for SGT technology
Patent Number: 7,521,332 Issued on 04/21/2009 to Li,   et al.

Title: High dielectric film and related method of manufacture
Patent Number: 7,521,331 Issued on 04/21/2009 to Park,   et al.

Title: Methods for forming capacitor structures
Patent Number: 7,521,330 Issued on 04/21/2009 to Wu,   et al.

Title: Semiconductor light emitting diode having textured structure and method of manufacturing the same
Patent Number: 7,521,329 Issued on 04/21/2009 to Kwak,   et al.

Title: Methods of fabricating bipolar transistor with emitter and collector in separate device isolation trenches
Patent Number: 7,521,328 Issued on 04/21/2009 to Song

Title: High f.sub.T and f.sub.max bipolar transistor and method of making same
Patent Number: 7,521,327 Issued on 04/21/2009 to Joseph,   et al.

Title: Semiconductor device and manufacturing method thereof
Patent Number: 7,521,326 Issued on 04/21/2009 to Tanaka

Title: Semiconductor device and method for fabricating the same
Patent Number: 7,521,325 Issued on 04/21/2009 to Sakoda,   et al.

Title: Semiconductor device and method for manufacturing the same
Patent Number: 7,521,324 Issued on 04/21/2009 to Ohmi,   et al.

Title: Method of fabricating a double gate field effect transistor device, and such a double gate field effect transistor device
Patent Number: 7,521,323 Issued on 04/21/2009 to Surdeanu,   et al.

Title: Vertical transistors
Patent Number: 7,521,322 Issued on 04/21/2009 to Tang,   et al.

Title: Method of fabricating a non-volatile semiconductor memory device
Patent Number: 7,521,321 Issued on 04/21/2009 to Shih,   et al.

Title: Flash memory device and method of manufacturing the same
Patent Number: 7,521,320 Issued on 04/21/2009 to Dong

Title: Method of forming gate of flash memory device
Patent Number: 7,521,319 Issued on 04/21/2009 to Jeong,   et al.

Title: Semiconductor device and method of manufacturing the same
Patent Number: 7,521,318 Issued on 04/21/2009 to Ueno

Title: Method of forming a semiconductor device and structure thereof
Patent Number: 7,521,317 Issued on 04/21/2009 to Li,   et al.

Title: Methods of forming gate structures for semiconductor devices
Patent Number: 7,521,316 Issued on 04/21/2009 to Sohn,   et al.

Title: Method for fabricating image sensor capable of increasing photosensitivity
Patent Number: 7,521,315 Issued on 04/21/2009 to Kim,   et al.

Title: Method for selective removal of a layer
Patent Number: 7,521,314 Issued on 04/21/2009 to Jawarani,   et al.

Multilayer circuit component and method for manufacturing the same Number:7,146,719 from the United States Patent and Trademark Office (PTO) owispatent

Home    Author Login    Submit Article    Article Search    Add Your Link    Edit Your Link    Contact Us    Advertising    Disclaimer

   

 
Web LinkGrinder.com

Top Breaking News
     Two British Soldiers Killed in Afghanistan by VOA News
     Iranian Clerics Protest Election Results by VOA News
     Pakistani Airstrikes Kill 6 Militants in North Waziristan by VOA News

Title: Multilayer circuit component and method for manufacturing the same

Abstract: A multilayer circuit component and a method for manufacturing the same, in which the difference of the amounts of baking shrinkages between each of the glass-containing layers is small, and the enlargement rate of the diameter of the via hole formed in each of the glass-containing layers is close to those in the other layers, so that it is possible to prevent a short circuit defect due to the mutual short circuit of the conductors in the via hole from occurring, and the warp of the substrate is reduced. The multilayer circuit component is provided with at least two glass-containing layers on a substrate, differentiating the softening temperature of glass compounded in the first glass-containing layer formed on the substrate from the softening temperature of glass compounded in the second glass-containing layer formed on the first glass-containing layer. The difference in the sintering properties due to the difference between the wettabilities is counterbalanced, and therefore, a multilayer circuit component, in which the warp of the substrate is reduced, and the degree of the enlargement of the via hole diameter of each of the glass-containing layers during baking is uniform, is produced.

Patent Number: 7,146,719 Issued on 12/12/2006 to Iha


Inventors: Iha; Michiaki (Otsu, JP)
Assignee: Murata Manufacturing Co., Ltd. (JP)
Appl. No.: 10/815,659
Filed: April 2, 2004


Related U.S. Patent Documents

Application NumberFiling DatePatent NumberIssue Date
09881974Jun., 20016759115

Foreign Application Priority Data

Jun 15, 2000 [JP] 2000-180086
Jul 07, 2000 [JP] 2000-206262

Current U.S. Class: 29/830 ; 29/825; 29/832; 29/852; 428/209; 428/414; 428/415
Current International Class: H05K 3/36 (20060101)
Field of Search: 29/825,830,832,852 428/209,414,415


References Cited [Referenced By]

U.S. Patent Documents
4769309 September 1988 King et al.
5827605 October 1998 Nishide et al.
5928839 July 1999 Rath et al.
6159322 December 2000 Ogata et al.
6190834 February 2001 Narahara et al.
6534723 March 2003 Asai et al.
6759115 July 2004 Iha
Foreign Patent Documents
2145574 Mar., 1985 GB
53008771 Jul., 1976 JP
55-62799 May., 1980 JP
63-194395 Aug., 1988 JP
63-261796 Oct., 1988 JP
7-312511 Nov., 1995 JP
08-236936 Sep., 1996 JP
10-65335 Mar., 1998 JP
11-224825 Aug., 1999 JP
11-330694 Nov., 1999 JP
Primary Examiner: Arbes; Carl J.
Attorney, Agent or Firm: Dickstein, Shapiro, LLP.

Parent Case Text



This is a division of application Ser. No. 09/881,974, filed Jun. 14, 2001 now U.S. Pat. No. 6,759,115.
Claims



What is claimed is:

1. A method for manufacturing a multilayer circuit component which comprises at least two glass-containing layers on a substrate, in which the baking shrinkage rates of the first glass-containing layer and second glass-containing layer formed are about the same, comprising: (a) applying and drying a first photosensitive glass paste comprising glass having a softening temperature and a photosensitive vehicle to a substrate; (b) forming a via hole pattern on the resulting dried first paste; (c) baking the resulting paste with said via hole pattern so as to form a first glass-containing layer; (d) applying and drying a second photosensitive glass paste comprising glass having a softening temperature and a photosensitive vehicle, on said first glass-containing layer; (e) forming a via hole pattern on the resulting dried second paste; and (f) baking the resulting second paste with said via hole pattern so as to form a second glass-containing layer; wherein at least one parameter selected from glass softening temperature and glass content in the first glass paste is different from the same parameter in the second glass paste, whereby the baking shrinkage rates of the first glass-containing layer and second glass-containing layer formed are about the same.

2. A method for manufacturing a multilayer circuit component according to claim 1, wherein the glass softening temperature parameter in the first glass paste is different from the glass softening temperature parameter in the second glass paste.

3. A method for manufacturing a multilayer circuit component according to claim 2, wherein the glasses in the pastes are such that the glass of the first glass-containing layer has a contact angle relative to said substrate which is larger than the contact angle of the glass of the second glass-containing layer relative to said first glass-containing layer; and the softening temperature of the glass in the first photosensitive glass paste is lower than the softening temperature of the glass in the second photosensitive glass paste.

4. A method for manufacturing a multilayer circuit component according to claim 2, wherein the glasses in the pastes are such that the glass of the first glass-containing layer has a contact angle relative to said substrate which is smaller than the contact angle of the glass of the second glass-containing layer relative to said first glass-containing layer; and the softening temperature of the glass in the first photosensitive glass paste is higher than the softening temperature of the glass in the second photosensitive glass paste.

5. A method for manufacturing a multilayer circuit component according to claim 2, wherein the difference between the softening temperature of the glass in the first photosensitive glass paste and the softening temperature of the glass in the second photosensitive glass paste is at least about 30.degree. C.

6. A method for manufacturing a multilayer circuit component according to claim 1, wherein the glass content in the first glass paste is different from the glass content in the second glass paste.

7. A method for manufacturing a multilayer circuit component according to claim 6, wherein the first and second photosensitive glass pastes each comprise low softening temperature glass and the low softening temperature glass content in the first and second photosensitive glass pastes are different.

8. A method for manufacturing a multilayer circuit component according to claim 7, wherein the first and second photosensitive glass pastes each comprise ceramic.

9. A method for manufacturing a multilayer circuit component according to claim 1, wherein the glass in each of the first and second photosensitive glass pastes comprise low softening temperature glass.

10. A method for manufacturing a multilayer circuit component according to claim 1, wherein the glass in the first photosensitive glass paste comprises low softening temperature glass.

11. A method for manufacturing a multilayer circuit component according to claim 1, wherein the first and second photosensitive glass pastes each comprise ceramic.

12. A method for manufacturing a multilayer circuit component according to claim 11, wherein the substrate is a glass-free ceramic.

13. A method for manufacturing a multilayer circuit component according to claim 12, wherein the glass in the first photosensitive glass paste comprises low softening temperature glass.

14. A method for manufacturing a multilayer circuit component according to claim 13, wherein the glass in the second photosensitive glass paste comprises low softening temperature glass.

15. A method for manufacturing a multilayer circuit component according to claim 14, wherein the glass content in the first glass paste is different from the glass content in the second glass paste.

16. A method for manufacturing a multilayer circuit component according to claim 14, wherein the glass softening temperature parameter in the first glass paste is different from the glass softening temperature parameter in the second glass paste.

17. A method for manufacturing a multilayer circuit component according to claim 16, wherein the glass softening temperature parameters differ be at least about 30.degree. C.

18. A method for manufacturing a multilayer circuit component according to claim 1, wherein the substrate is a glass-free ceramic.

19. A method for manufacturing a multilayer circuit component according to claim 18, wherein the glass content in the first glass paste is different from the glass content in the second glass paste.

20. A method for manufacturing a multilayer circuit component according to claim 19, wherein the in the first glass paste is different from the glass in the second glass paste.
Description



BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a multilayer circuit component and a method for manufacturing the same. In particular, the present invention relates to a multilayer circuit component having a structure in which at least two layers of glass-containing layers are provided on a substrate, and a method for manufacturing the same.

2. Description of the Related Art

Semiconductor elements, such as ICs, have hitherto been mounted on printed circuit substrates, such as glass epoxy substrates, and alumina ceramic substrates. In recent years, requirements for higher packing densities, finer wirings, higher transmission speeds, higher frequencies and higher heat dissipations of the semiconductor elements have been intensified.

Conventional printed circuit substrates, such as glass epoxy, do not always have sufficient properties regarding its through hole plating property, workability, multilayer adhesion property, thermal deformation resistance at a high temperature, etc., so that there is a limit in practice regarding the increase in density. Nevertheless, expectations for ceramic substrates having large mechanical strength and high thermal resistance are running high.

For example, an alumina substrate, which is one of the ceramic substrates, has large mechanical strength and superior thermal resistance, so that various multilayer circuit components have been developed in which fine wirings are provided on the alumina substrates, and furthermore, insulation layers provided with through holes are formed by a green sheet lamination method or a printing method.

For example, a laminated air-core coil used as an inductor is produced by repeating the steps of forming a coil (coil pattern) on an alumina substrate from a conductor paste, forming an insulation layer provided with a via hole thereon, filling the via hole with a conductor and forming a second layer of coil (coil pattern) on the insulation layer. Since a spiral type coil is produced, high inductance can be produced.

As the method for manufacturing the laminated air-core coil, a method in which a screen plate coated with a photosensitive emulsion, etc., for forming a predetermined pattern is produced, and then a paste is applied by printing on a substrate or an insulation layer through the resulting screen plate using, e.g. a squeegee, and a method in which a conductor paste having photo-hardening property is applied by printing on all over the surface of a substrate or an insulation layer with a spin coating method, etc., and then a coil is formed by exposure and development through a photomask provided with a desired pattern, are known.

As a method for forming an insulation layer provided with a via hole at which a part of a conductor pattern is exposed, in a manner similar to that in the aforementioned case of the formation of the coil, there are a method in which a coating of a paste is applied by a screen printing, and a method in which exposure and development are performed using a photosensitive paste. In addition, there is a method in which a green sheet is produced from a compound of an insulation powder and an organic binder, a through hole is formed by punching at a predetermined location of the green sheet, and thereafter, this is stacked on a substrate or an insulation layer provided with a conductor and is pressure-bonded.

For example, in the formation of a plurality of insulation layers containing glass on a ceramic sintered substrate made of alumina, etc., each of the insulation layers has been hitherto formed using the same material containing the same glass. When each of the insulation layers is, however, conventionally formed by coating and baking of a material in which the same type of glass is compounded, the wettability of the first insulation layer (first glass-containing layer) formed on the ceramic sintered substrate made of alumina, etc., relative to the sintered substrate and the wettability of the second insulation layer (second glass-containing layer) formed on the first glass-containing layer relative to the first glass-containing layer are different. This difference in the wettability affects the sinterability of each of the glass-containing layers to a large degree. That is, since large differences in the amount of baking shrinkages and in the shrinkage behavior occur due to the difference in the sinterability between the first glass-containing layer and the second glass-containing layer, there are problems in that remarkable warps occur in the substrates, and in particular, when the via hole is formed in each of the insulation layer, the diameter of the via hole is enlarged.

Table 1 shows wettabilities (contact angles) of borosilicate glass relative to an alumina substrate, a crystalline quartz (SiO.sub.2) substrate and a borosilicate glass substrate. The wettability of the glass can be evaluated by the contact angle, and when the wettability becomes better, the contact angle decreases.

TABLE-US-00001 TABLE 1 Contact angle of borosilicate glass (SiO.sub.2:B.sub.2O.sub.3:(K.sub.2O = 79:19:2) Substrate relative to substrate at 1,000.degree. C. Alumina 48.degree. SiO.sub.2(Crystalline Quartz) 140.degree. Borosilicate Glass 8.degree. (SiO.sub.2:B.sub.2O.sub.3:K.sub.2O = 79:19:2)

As shown in Table 1, the contact angle of the borosilicate glass relative to the alumina substrate, frequently used as the substrate of the multilayer circuit component, is 48.degree., the contact angle of the borosilicate glass relative to the crystalline quartz (SiO.sub.2) substrate is 140.degree., and the contact angle of the borosilicate glass relative to the borosilicate glass substrate (the contact angle of borosilicate glasses relative to each other) is 8.degree.. Therefore, when comparisons are made between the alumina substrate and the borosilicate glass substrate, it is clear that the wettability of the glass relative to the alumina substrate is inferior by a large degree.

As a consequence, when the insulation layers (glass-containing layers) are laminated on the alumina substrate by a sequential baking method, in which the layers are baked one by one, since the insulation layer at the first layer (the first glass-containing layer) is baked on the alumina substrate, viscous flow is not likely to occur and the sinterability tends to be inferior. On the other hand, since the insulation layer at the second layer (the second glass-containing layer) formed on the first glass-containing layer is baked on the first glass-containing layer having excellent wettability, viscous flow starts early on, so that the sintering is likely to be accelerated compared to that in the case in which the first glass-containing layer is baked on the alumina substrate.

When the sinterability of the second glass-containing layer is improved, the baking shrinkages in the second glass-containing layer and glass-containing layers thereafter are accelerated, so that the diameters of the formed via holes become larger than that in the first layer. Accordingly, the exposure region is increased in excess of the required exposure region, and sometimes, not only the conductor pattern planned to be exposed, but also the conductor pattern adjacent thereto is exposed, so that when the via hole is filled with the conductor, a short circuit with the adjacent conductor pattern may occur, i.e., there is a circuit defect.

FIG. 1 shows a state of an insulation layer (the first glass-containing layer) 54a, provided with a via hole 53a and formed by applying a coating of an insulation material paste containing glass on a substrate 51, on which a conductor pattern (circuit) 52a is formed, and by baking, according to a conventional process for manufacturing a multilayer circuit component. FIG. 2 shows a state of an insulation layer (the second glass-containing layer) 54b, provided with a via hole 53b and formed by applying an insulation material paste containing glass on the first glass-containing layer 54a, on which conductor patterns (circuits) 52b and 52c are provided, and by baking.

As shown in FIGS. 1 and 2, according to the aforementioned conventional method for manufacturing the multilayer circuit component in which the same insulation material paste, with the same glass being compounded, is applied by coating and is baked, the baking shrinkage in the second glass-containing layer 54b is accelerated, so that the diameter of the via hole 53b of the second glass-containing layer 54b becomes larger than that of the via hole 53a in the first glass-containing layer 54a. Accordingly, when the via hole conductor 55 is introduced from the via hole 53b, there is a problem in that the via hole conductor 55 is not only connected to the planned conductor pattern 52b, but also short-circuited with the adjacent conductor patterns 52c exposed at the via hole 53b, so as to cause the short circuit defect.

Furthermore, since the residual stress of the substrate is unevenly generated due to the difference in the amounts of baking shrinkages, even when the properties, such as the thermal expansion and the thermal shrinkage, of the glass constituting the first glass-containing layer coincide with those of the substrate, the degree of the thermal shrinkage in the second glass-containing layer formed on the first glass-containing layer is different from that in the first glass-containing layer, so that a warp occurs in the substrate, and there is a problem in that the manufacture of the multilayer circuit component is difficult.

SUMMARY OF THE INVENTION

The present invention was made to solve the aforementioned problems. Accordingly, it is an object of the present invention to provide a multilayer circuit component and a method for manufacturing the same in which the difference of the amounts of baking shrinkages between each of the glass-containing layers is small and the enlargement rate of the diameter of the via hole formed in each of the glass-containing layers is close to those in the other layers, so that it is possible to prevent the short circuit defect due to the mutual short circuit of the conductors in the via hole from occurring, and the warp of the substrate is reduced.

In order to achieve the aforementioned objects, according to an aspect of the present invention, a multilayer circuit component provided with at least two layers of glass-containing layers composed of materials containing glass on a substrate is provided in which among the at least two layers of glass-containing layers, the softening temperature of glass compounded in the first glass-containing layer formed on the substrate and the softening temperature of glass compounded in the second glass-containing layer formed on the aforementioned first glass-containing layer are different.

By differentiating the softening temperature (Ts) of the glass compounded in the first glass-containing layer formed on the substrate from the softening temperature of the glass compounded in the second glass-containing layer formed on the first glass-containing layer, it is possible to control the wettabilities relative to the substrate, the glass-containing layer, etc., on which each of the glass-containing layers are to be formed, so as to prevent the amount of baking shrinkages of the first glass-containing layer and the second glass-containing layer from being uneven, and when the via hole is formed in the glass-containing layer, it is possible to suppress the enlargement of the via hole diameter, so as to make the degree of the enlargement of the via hole diameter in each of glass-containing layer small, to prevent the short circuit defect with adjacent conductors from occurring, and furthermore, it is possible to provide a multilayer circuit component in which the warp of the substrate is reduced.

In the present invention, the glass-containing layer includes a layer made of glass only and a layer made of the material in which glass is compounded in the inorganic component, for example, ceramic particles.

In the multilayer circuit component according to the present invention, when the contact angle of the glass constituting the aforementioned first glass-containing layer relative to the aforementioned substrate is larger than the contact angle of the glass constituting the aforementioned second glass-containing layer relative to the aforementioned first glass-containing layer, the softening temperature of the glass compounded in the aforementioned first glass-containing layer is preferably made to be lower than the softening temperature of the glass compounded in the aforementioned second glass-containing layer.

When the contact angle of the glass constituting the first glass-containing layer relative to the substrate is larger than the contact angle of the glass constituting the second glass-containing layer relative to the first glass-containing layer, that is, when the wettability of the glass constituting the first glass-containing layer relative to the substrate is inferior to the wettability of the glass constituting the second glass-containing layer relative to the first glass-containing layer, and when the softening temperature of the glass compounded in the first glass-containing layer is made to be lower than the softening temperature of the glass compounded in the second glass-containing layer, it is possible that the wettability of the first glass-containing layer relative to the substrate is improved, while the wettability of the second glass-containing layer relative to the first glass-containing layer is reduced, so as to counterbalance the difference in the sintering properties due to the difference between the wettabilities of each of the glass-containing layers, and to reduce the difference in the amounts of the baking shrinkages of the first and the second glass-containing layers. As a result, it is possible to suppress the enlargement of the via hole diameter in each of the glass-containing layers so as to prevent the short circuit defect with adjacent conductors from occurring, and furthermore, it is possible to provide the multilayer circuit component in which the warp of the substrate is reduced.

On the other hand, when the contact angle of the glass constituting the aforementioned first glass-containing layer relative to the aforementioned substrate is smaller than the contact angle of the glass constituting the aforementioned second glass-containing layer relative to the aforementioned first glass-containing layer, the softening temperature of the glass compounded in the aforementioned first glass-containing layer is preferably higher than the softening temperature of the glass compounded in the second glass-containing layer.

That is, when the contact angle of the glass constituting the first glass-containing layer relative to the substrate is smaller than the contact angle of the glass constituting the second glass-containing layer relative to the first glass-containing layer, that is, when the wettability of the glass constituting the first glass-containing layer relative to the substrate is superior to the wettability of the glass constituting the second glass-containing layer relative to the first glass-containing layer, and the softening temperature of the glass compounded in the first glass-containing layer is made to be higher than the softening temperature of the glass compounded in the second glass-containing layer, it is possible that the wettability of the first glass-containing layer relative to the substrate is reduced, while the wettability of the second glass-containing layer relative to the first glass-containing layer is improved, so as to counterbalance the difference in the sintering properties due to the difference between the wettabilities of each of the glass-containing layers, and to reduce the difference in the amounts of the baking shrinkages of the first and the second glass-containing layers. As a result, it is possible to suppress the enlargement of the via hole diameter in each of the glass-containing layers so as to prevent the short circuit defect with adjacent conductors from occurring, and furthermore, it is possible to provide the multilayer circuit component in which the warp of the substrate is reduced.

The difference between the softening temperature of the glass compounded in the aforementioned first glass-containing layer and the softening temperature of the glass compounded in the aforementioned second glass-containing layer is preferably about 30.degree. C. or more.

When the difference between the softening temperature of the glass compounded in the first glass-containing layer and the softening temperature of the glass compounded in the second glass-containing layer is made to be about 30.degree. C. or more, it is possible to significantly control the wettability of the first glass-containing layer relative to the substrate and the wettability of the second glass-containing layer relative to the first glass-containing layer, so as to counterbalance the difference in the sintering properties due to the difference between the wettabilities of each of the glass-containing layers, and to reduce the difference in the amounts of the baking shrinkages of the first and the second glass-containing layers. Therefore, the effects of the present invention can be exhibited in practice.

According to another aspect of the present invention, a method for manufacturing a multilayer circuit component provided with at least two layers of glass-containing layers composed of materials containing glass on a substrate, in which among the at least two layers of glass-containing layers, the softening temperature of glass compounded in the first glass-containing layer formed on the substrate and the softening temperature of glass compounded in the second glass-containing layer formed on the first glass-containing layer are different, is provided. The aforementioned method for manufacturing the multilayer circuit component is provided with the steps of at least

(a) applying a photosensitive glass paste composed of the glass having a predetermined softening temperature or a compound of the glass having the predetermined softening temperature and an oxide, and a photosensitive vehicle, by printing on a substrate and then drying,

(b) exposing and developing a via hole pattern using a predetermined mask on the resulting printed and dried paste layer,

(c) baking the resulting paste layer with the aforementioned exposed and developed via hole pattern so as to form the first glass-containing layer,

(d) applying a photosensitive glass paste composed of glass having a softening temperature different from the softening temperature of the glass in the aforementioned first glass-containing layer and a photosensitive vehicle by printing on the aforementioned first glass-containing layer and drying,

(e) exposing and developing a via hole pattern using a predetermined mask on the resulting printed and dried paste layer, and

(f) baking the resulting paste layer with the aforementioned exposed and developed via hole pattern so as to form the second glass-containing layer.

By forming each of the glass-containing layers by way of the aforementioned steps (a) to (f), the multilayer circuit component provided with at least two layers of glass-containing layers composed of materials containing glass on a substrate can be reliably produced, in which among the at least two layers of glass-containing layers, at least the softening temperature of the glass compounded in the first glass-containing layer formed on the substrate and the softening temperature of the glass compounded in the second glass-containing layer formed on the first glass-containing layer are different, the degree of the enlargement of the via hole diameter in each of the glass-containing layer is small, the short circuit defect with adjacent conductors is prevented from occurring and the warp of the substrate is reduced.

As the photosensitive glass paste, a photosensitive glass paste in which an inorganic component and a photosensitive vehicle are compounded in the weight ratio of about 40:60 to 70:30, is preferably used. The ratio of the inorganic component is more preferably made to be in the range of about 50:50 to 55:45.

As the photosensitive glass paste, for example, a photosensitive glass paste, in which the inorganic component and the photosensitive vehicle are dispersed using a triple roller mill can be used.

As the photosensitive vehicle usable in the present invention, a compound of a co-polymer of methyl methacrylate and methacrylic acid, a monomer, a photo initiator and a solvent, etc., can be used, although there is no particular limitation regarding specified kinds thereof.

In the method for manufacturing the multilayer circuit component according to the present invention, when the contact angle of the glass constituting the aforementioned first glass-containing layer relative to the aforementioned substrate is larger than the contact angle of the glass constituting the aforementioned second glass-containing layer relative to the aforementioned first glass-containing layer, the softening temperature of the glass in the photosensitive glass paste used for forming the aforementioned first glass-containing layer is preferably made to be lower than the softening temperature of the glass in the photosensitive glass paste used for forming the aforementioned second glass-containing layer.

When the contact angle of the glass constituting the first glass-containing layer relative to the substrate is larger than the contact angle of the glass constituting the second glass-containing layer relative to the first glass-containing layer, by making the softening temperature of the glass in the photosensitive glass paste used for forming the first glass-containing layer lower than the softening temperature of the glass in the photosensitive glass paste used for forming the second glass-containing layer, it is possible that the wettability of the first glass-containing layer relative to the substrate is improved, while the wettability of the second glass-containing layer relative to the first glass-containing layer is reduced, so as to counterbalance the difference in the sintering properties due to the difference between the wettabilities of each of the glass-containing layers and to reduce the difference in the amounts of the baking shrinkages of the first and the second glass-containing layers. As a result, it is possible to suppress the enlargement of the via hole diameter in each of the glass-containing layers, so as to efficiently produce the multilayer circuit component in which the short circuit defect with adjacent conductors is prevented from occurring, and furthermore, the warp of the substrate is reduced.

On the other hand, when the contact angle of the glass constituting the aforementioned first glass-containing layer relative to the aforementioned substrate is smaller than the contact angle of the glass constituting the aforementioned second glass-containing layer relative to the aforementioned first glass-containing layer, the softening temperature of the glass in the photosensitive glass paste used for forming the aforementioned first glass-containing layer is preferably made to be higher than the softening temperature of the glass in the photosensitive glass paste used for forming the aforementioned second glass-containing layer.

When the contact angle of the glass constituting the first glass-containing layer relative to the substrate is smaller than the contact angle of the glass constituting the second glass-containing layer relative to the first glass-containing layer, by making the softening temperature of the glass in the photosensitive glass paste used for forming the first glass-containing layer higher than the softening temperature of the glass in the photosensitive glass paste used for forming the second glass-containing layer, it is possible that the wettability of the first glass-containing layer relative to the substrate is reduced, while the wettability of the second glass-containing layer relative to the first glass-containing layer is improved, so as to counterbalance the difference in the sintering properties due to the difference between the wettabilities of each of the glass-containing layers and to reduce the difference in the amounts of the baking shrinkages of the first and the second glass-containing layers. As a result, it is possible to suppress the enlargement of the via hole diameter in each of the glass-containing layers, so as to efficiently produce the multilayer circuit component in which the short circuit defect with adjacent conductors is prevented from occurring, and furthermore, the warp of the substrate is reduced.

In the method for manufacturing the multilayer circuit component according to the present invention, the difference between the softening temperature of the glass in the photosensitive glass paste used for forming the first glass-containing layer and the softening temperature of the glass in the photosensitive glass paste used for forming the second glass-containing layer is preferably about 30.degree. C. or more.

By making the difference between the softening temperature of the glass in the photosensitive glass paste used for forming the first glass-containing layer and the softening temperature of the glass in the photosensitive glass paste used for forming the second glass-containing layer about 30.degree. C. or more, it is possible to significantly control the wettability of the first glass-containing layer relative to the substrate and the wettability of the second glass-containing layer relative to the first glass-containing layer, so as to counterbalance the difference in the sintering properties due to the difference between the wettabilities of each of the glass-containing layers, and to reduce the difference in the amounts of the baking shrinkages of the first and the second glass-containing layers. Therefore, the effects of the present invention can be exhibited in practice.

In the method for manufacturing the multilayer circuit component according to the present invention, it is preferable that the baking is performed after every paste layer is formed by way of the aforementioned steps of the printing and drying, and developing.

When baking is performed after every paste layer is formed by way of the aforementioned steps of the printing and drying, and developing (so-called sequential baking), the present invention is especially significant since it is possible to suppress the enlargement of the via hole diameter in each of the glass-containing layers, so as to efficiently produce the multilayer circuit component in which the short circuit defect with adjacent conductors is prevented from occurring, and furthermore, the warp of the substrate is reduced.

In order to achieve the aforementioned objects, according to another aspect of the present invention, a multilayer circuit component provided with at least two layers of glass-containing layers composed of materials containing glass and ceramic on a substrate is provided, in which among the at least two layers of glass-containing layers, at least the first glass-containing layer formed on the substrate and the second glass-containing layer formed on the aforementioned first glass-containing layer are different in glass content.

By differentiating the glass content of at least the first glass-containing layer formed on the substrate, in particular, on a ceramic sintered substrate, among the at least two layers of glass-containing layers, and the second glass-containing layer formed thereon, it is possible to control the wettabilities relative to the substrate, the glass-containing layer, etc., on which each of the glass-containing layers are to be formed, so as to prevent the amounts of baking shrinkages of the first glass-containing layer and the second glass-containing layer from being uneven, and when a via hole is formed in the glass-containing layer, it is possible to suppress the enlargement of the via hole diameter, so as to prevent the short circuit defect between conductors through the via hole conductor from occurring, and furthermore, it is possible to provide a multilayer circuit component in which the warp of the substrate is reduced.

In the multilayer circuit component according to the present invention, the glasses contained in the aforementioned first glass-containing layer and the aforementioned second glass-containing layer are preferably low softening temperature glasses.

When the glasses contained in the aforementioned first glass-containing layer and the aforementioned second glass-containing layer are low softening temperature glasses, by differentiating the contents of the low softening temperature glasses in the first glass-containing layer and in the second glass-containing layer, it is possible to control the wettabilities relative to the substrate and the glass-containing layer, etc., on which each of the glass-containing layers are formed, so as to prevent the amounts of baking shrinkages of the first glass-containing layer and the second glass-containing layer from being uneven. Consequently, it is possible to provide a multilayer circuit component in which the short circuit defect between conductors is prevented from occurring, and the warp of the substrate is reduced.

According to another aspect of the present invention, a multilayer circuit component provided with at least two layers of glass-containing layers composed of materials containing glass on a substrate is provided, in which at least the first glass-containing layer, formed on the substrate, among the at least two layers of glass-containing layers and the second glass-containing layer formed on the aforementioned first glass-containing layer contain compounded glasses composed of at least two kinds of low softening temperature glass, and the compounded glass contained in the aforementioned first glass-containing layer and the compounded glass contained in the aforementioned second glass-containing layer are different in the compounding ratios of the low softening temperature glasses. By the term low softening temperature glass is mean a glass having a softening temperature below about 650.degree. C., and preferably below about 500.degree. C.

By making at least the first glass-containing layer formed on the substrate and the second glass-containing layer formed thereon contain compounded glasses composed of at least two kinds of low softening temperature glass, and by differentiating the compounding ratios of the low softening temperature glasses in the compounded glasses contained in the first glass-containing layer and the second glass-containing layer, it is possible to control the wettabilities relative to the substrate and the glass-containing layer, etc., on which each of the glass-containing layers are to be formed, so as to prevent the amounts of baking shrinkages of the first glass-containing layer and the second glass-containing layer from being uneven, and when a via hole is formed in the glass-containing layer, it is possible to suppress the enlargement of the via hole diameter so as to prevent the short circuit defect between conductors through the via hole conductor from occurring, and furthermore, it is possible to provide the multilayer circuit component in which the warp of the substrate is reduced.

According to another aspect of the present invention, a multilayer circuit component provided with at least two layers of glass-containing layers composed of materials containing glass and ceramic on a substrate is provided in which at least the first glass-containing layer formed on the substrate, and the second glass-containing layer formed on the aforementioned first glass-containing layer contain compounded glasses composed of at least two kinds of low softening temperature glass, and the aforementioned first glass-containing layer and the aforementioned second glass-containing layer are different in the content of the aforementioned compounded glasses.

By making at least the first glass-containing layer formed on the substrate and the second glass-containing layer formed thereon contain compounded glasses composed of at least two kinds of low softening temperature glass, and by differentiating the contents of the compounded glasses in the first glass-containing layer and the second glass-containing layer, it is possible to control the wettabilities relative to the substrate and the glass-containing layer, etc., on which each of the glass-containing layers are to be formed, so as to prevent the amounts of baking shrinkages of the first glass-containing layer and the second glass-containing layer from being uneven, and when the via hole is formed in the glass-containing layer, it is possible to suppress the enlargement of the via hole diameter, so as to prevent the short circuit defect between conductors through the via hole conductor from occurring, and furthermore, it is possible to provide the multilayer circuit component in which the warp of the substrate is reduced.

When the contact angle of the glass constituting the aforementioned first glass-containing layer in the aforementioned multilayer circuit component relative to the aforementioned substrate is larger than the contact angle of the glass constituting the aforementioned second glass-containing layer relative to the aforementioned first glass-containing layer, the glass content of the aforementioned first glass-containing layer is preferably made to be larger than the glass content of the aforementioned second glass-containing layer.

When the contact angle of the glass constituting the first glass-containing layer relative to the substrate is larger than the contact angle of the glass constituting the second glass-containing layer relative to the first glass-containing layer, that is, when the wettability of the glass constituting the first glass-containing layer relative to the substrate is inferior to the wettability of the glass constituting the second glass-containing layer relative to the first glass-containing layer, and when the glass content of the first glass-containing layer is made to be larger than the glass content of the second glass-containing layer, it is possible that the wettability of the first glass-containing layer relative to the substrate is improved while the wettability of the second glass-containing layer relative to the first glass-containing layer is reduced, so as to counterbalance the difference in the sintering properties due to the difference between the wettabilities of each of the glass-containing layers, and to reduce the difference in the amounts of the baking shrinkages of the first and the second glass-containing layers. As a result, it is possible to suppress the enlargement of the via hole diameter in each of the glass-containing layers, so as to prevent the short circuit defect between the conductors from occurring, and furthermore, it is possible to produce the multilayer circuit component in which the warp of the substrate is reduced.

When a contact angle of the glass constituting the aforementioned first glass-containing layer in the aforementioned multilayer circuit component relative to the aforementioned substrate is smaller than a contact angle of the glass constituting the aforementioned second glass-containing layer relative to the aforementioned first glass-containing layer, the content of the low softening temperature glass in the aforementioned first glass-containing layer is preferably made to be smaller than the content of the low softening temperature glass in the aforementioned second glass-containing layer.

That is, when the contact angle of the glass constituting the first glass-containing layer relative to the substrate is smaller than the contact angle of the glass constituting the second glass-containing layer relative to the first glass-containing layer, that is, when the wettability of the glass constituting the first glass-containing layer relative to the substrate is superior to the wettability of the glass constituting the second glass-containing layer relative to the first glass-containing layer, and when the content of the low softening temperature glass in the first glass-containing layer is made to be smaller than the content of the low softening temperature glass in the second glass-containing layer, it is possible that the wettability of the first glass-containing layer relative to the substrate is reduced while the wettability of the second glass-containing layer relative to the first glass-containing layer is improved, so as to counterbalance the difference in the sintering properties due to the difference between the wettabilities of each of the glass-containing layers, and to reduce the difference in the amounts of the baking shrinkages of the first and the second glass-containing layers. As a result, when the via hole is formed in the glass-containing layer, it is possible to suppress the enlargement of the via hole diameter, so as to prevent the short circuit defect between the conductors through the via hole conductor from occurring, and furthermore, it is possible to produce the multilayer circuit component in which the warp of the substrate is reduced.

When the contact angle of the glass constituting the aforementioned first glass-containing layer relative to the aforementioned substrate is larger than the contact angle of the glass constituting the aforementioned second glass-containing layer relative to the aforementioned first glass-containing layer, the compounding ratio of the low softening temperature glass in the aforementioned first glass-containing layer is preferably made to be larger than the compounding ratio of the low softening temperature glass in the aforementioned second glass-containing layer.

When the contact angle of the glass constituting the first glass-containing layer relative to the substrate is larger than the contact angle of the glass constituting the second glass-containing layer relative to the first glass-containing layer, that is, when the wettability of the glass constituting the first glass-containing layer relative to the substrate is inferior to the wettability of the glass constituting the second glass-containing layer relative to the first glass-containing layer, and when the compounding ratio of the low softening temperature glass in the compounded glass of the first glass-containing layer is made to be larger than the compounding ratio of the low softening temperature glass in the compounded glass of the second glass-containing layer, it is possible that the wettability of the first glass-containing layer relative to the substrate is improved while the wettability of the second glass-containing layer relative to the first glass-containing layer is reduced, so as to counterbalance the difference in the sintering properties due to the difference between the wettabilities of each of the glass-containing layers, and to reduce the difference in the amounts of the baking shrinkages of the first and the second glass-containing layers. As a result, it is possible to suppress the enlargement of the via hole diameter in each of the glass-containing layer, so as to prevent the short circuit defect between the conductors from occurring, and furthermore, it is possible to produce the multilayer circuit component in which the warp of the substrate is reduced.

When the contact angle of the glass constituting the aforementioned first glass-containing layer relative to the aforementioned substrate is smaller than the contact angle of the glass constituting the aforementioned second glass-containing layer relative to the aforementioned first glass-containing layer, the compounding ratio of the low softening temperature glass in the compounded glass of the aforementioned first glass-containing layer is preferably made to be smaller than the compounding ratio of the low softening temperature glass in the compounded glass of the aforementioned second glass-containing layer.

That is, when the contact angle of the glass constituting the first glass-containing layer relative to the substrate is smaller than the contact angle of the glass constituting the second glass-containing layer relative to the first glass-containing layer, that is, when the wettability of the glass constituting the first glass-containing layer relative to the substrate is superior to the wettability of the glass constituting the second glass-containing layer relative to the first glass-containing layer, and when the compounding ratio of the low softening temperature glass in the compounded glass of the first glass-containing layer is made to be smaller than the compounding ratio of the low softening temperature glass in the compounded glass of the second glass-containing layer, it is possible that the wettability of the first glass-containing layer relative to the substrate is reduced while the wettability of the second glass-containing layer relative to the first glass-containing layer is improved, so as to counterbalance the difference in the sintering properties due to the difference between the wettabilities of each of the glass-containing layers, and to reduce the difference in the amounts of the baking shrinkages of the first and the second glass-containing layers. As a result, it is possible to suppress the enlargement of the via hole diameter in each of the glass-containing layer so as to prevent the short circuit defect between the conductors from occurring, and furthermore, it is possible to produce the multilayer circuit component in which the warp of the substrate is reduced.

When the contact angle of the glass constituting the aforementioned first glass-containing layer relative to the aforementioned substrate is larger than the contact angle of the glass constituting the aforementioned second glass-containing layer relative to the aforementioned first glass-containing layer, the content of the compounded glass in the aforementioned first glass-containing layer is preferably made to be larger than the content of the compounded glass in the aforementioned second glass-containing layer.

When the contact angle of the glass constituting the first glass-containing layer relative to the substrate is larger than the contact angle of the glass constituting the second glass-containing layer relative to the first glass-containing layer, that is, when the wettability of the glass constituting the first glass-containing layer relative to the substrate is inferior to the wettability of the glass constituting the second glass-containing layer relative to the first glass-containing layer, and when the content of the compounded glass in the first glass-containing layer is made to be larger than the content of the compounded glass in the second glass-containing layer, it is possible that the wettability of the first glass-containing layer relative to the substrate is improved while the wettability of the second glass-containing layer relative to the first glass-containing layer is reduced, so as to counterbalance the difference in the sintering properties due to the difference between the wettabilities of each of the glass-containing layers, and to reduce the difference in the amounts of the baking shrinkages of the first and the second glass-containing layers. As a result, it is possible to suppress the enlargement of the via hole diameter in each of the glass-containing layer, so as to prevent the short circuit defect between the conductors from occurring, and furthermore, it is possible to produce the multilayer circuit component in which the warp of the substrate is reduced.

When the contact angle of the glass constituting the aforementioned first glass-containing layer relative to the aforementioned substrate is smaller than the contact angle of the glass constituting the aforementioned second glass-containing layer relative to the aforementioned first glass-containing layer, the content of the compounded glass in the aforementioned first glass-containing layer is preferably made to be smaller than the content of the compounded glass in the aforementioned second glass-containing layer.

When the contact angle of the glass constituting the first glass-containing layer relative to the substrate is smaller than the contact angle of the glass constituting the second glass-containing layer relative to the first glass-containing layer, that is, when the wettability of the glass constituting the first glass-containing layer relative to the substrate is superior to the wettability of the glass constituting the second glass-containing layer relative to the first glass-containing layer, and when the content of the compounded glass in the first glass-containing layer is made to be smaller than the content of the compounded glass in the second glass-containing layer, it is possible that the wettability of the first glass-containing layer relative to the substrate is reduced while the wettability of the second glass-containing layer relative to the first glass-containing layer is improved, so as to counterbalance the difference in the sintering properties due to the difference between the wettabilities of each of the glass-containing layers, and to reduce the difference in the amounts of the baking shrinkages of the first and the second glass-containing layers. As a result, it is possible to suppress the enlargement of the via hole diameter in each of the glass-containing layer, so as to prevent the short circuit defect between the conductors from occurring, and furthermore, it is possible to produce the multilayer circuit component in which the warp of the substrate is reduced.

According to another aspect of the present invention, a method for manufacturing a multilayer circuit component provided with at least two glass-containing layers composed of materials containing glass and ceramic on a substrate is provided. The aforementioned method for manufacturing the multilayer circuit component is provided with the steps of at least

(a) applying a photosensitive glass paste composed of glass, ceramic and a photosensitive vehicle by printing on a substrate and then drying,

(b) exposing and developing a via hole pattern using a predetermined mask on the resulting printed and dried paste layer,

(c) baking the resulting paste layer with the aforementioned exposed and developed via hole pattern so as to form the first glass-containing layer,

(d) applying a photosensitive glass paste composed of glass, ceramic and a photosensitive vehicle, in contents different from those in the aforementioned first glass-containing layer, by printing on the aforementioned first glass-containing layer and then drying,

(e) exposing and developing a via hole pattern using a predetermined mask on the resulting printed and dried paste layer, and

(f) baking the resulting paste layer with the aforementioned exposed and developed via hole pattern so as to form the second glass-containing layer.

By forming each of the glass-containing layers with the aforementioned steps (a) to (f), the multilayer circuit component provided with at least two layers of glass-containing layers composed of materials containing glass on a substrate can be reliably produced, in which the first glass-containing layer formed on the substrate and the second glass-containing layer formed thereon are different in glass content, the unevenness in the amounts of the baking shrinkages of the first and the second glass-containing layers is reduced, the degree of the enlargement of the via hole diameter in each of the glass-containing layer is reduced by a great degree, the short circuit defect between the conductors is prevented from occurring and the warp of the substrate is reduced.

The glass constituting the photosensitive glass paste used for forming the aforementioned first glass-containing layer and the glass constituting the photosensitive glass paste used for forming the aforementioned second glass-containing layer are preferably low softening temperature glasses.

In the case in which the glass constituting the photosensitive glass paste used for forming the first glass-containing layer and the glass constituting the photosensitive glass paste used for forming the second glass-containing layer are low softening temperature glasses, by differentiating the glass contents of the first glass-containing layer and the second glass-containing layer, a multilayer circuit component in which the unevenness in the amounts of the baking shrinkages of the first and the second glass-containing layers is reduced, the degree of the enlargement of the via hole diameter in each of the glass-containing layer is reduced by a great degree, the short circuit defect between the conductors is prevented from occurring and the warp of the substrate is reduced can be reliably produced.

As the photosensitive glass paste, a photosensitive glass paste in which an inorganic component and a photosensitive vehicle are compounded in the weight ratio of about 40:60 to 70:30, is preferably used. The ratio of the inorganic component is more preferably made to be about 50:50 to 55:45.

As the photosensitive glass paste, for example, a photosensitive glass paste in which the inorganic component and the photosensitive vehicle are dispersed using a triple roller mill, etc., can be used.

As the photosensitive vehicle usable in the present invention, a compound of a co-polymer of methyl methacrylate and methacrylic acid, a monomer, a photo initiator and a solvent, etc., can be used, although there is no particular limitation regarding specified kinds thereof.

According to another aspect of the present invention, a method for manufacturing a multilayer circuit component provided with at least two layers of glass-containing layers composed of materials containing glass on a substrate is provided. The aforementioned method for manufacturing the multilayer circuit component is provided with the steps of at least

(a) applying a photosensitive glass paste composed of a compounded glass, containing at least two kinds of glasses including a low softening temperature glass, and a photosensitive vehicle by printing on a substrate, and then, drying,

(b) exposing and developing a via hole pattern using a predetermined mask on the resulting printed and dried paste layer,

(c) baking the resulting paste layer with the aforementioned exposed and developed via hole pattern so as to form the first glass-containing layer,

(d) applying a photosensitive glass past


Free Web Sudoku Puzzles.
Solve with your browser.
      4     5    
  4 6         7  
1 3   6          
          3 4 9  
4               3
  2 5 8          
          7   6 9
  9         2 4  
    3     5      
What is it?



Add Your Site · Terms Of Service · Privacy Policy


DISCLAIMER
Linkgrinder is a free service that searches the Internet and indexes all files found so that you may search quickly and easily for shared files. These files are created and made available individually by users whose identity we are not aware of and who we have no control over. In essence we function like a search engine tool; these files ARE NOT STORED OR SERVED BY OUR NETWORK. We are not responsible for any materials obtained by using our service. We do not monitor any of the contents of these files. These files may contain viruses, illegal materials, materials inappropriate for minors, offensive files and the like. BY USING OUR SERVICE, YOU ASSUME FULL RESPONSIBILITY FOR DOWNLOADING THESE MATERIALS AND WILL INDEMNIFY US FOR ANY DAMAGES THAT MAY BE INCURRED.

For More Specific Information VIEW OUR TERMS OF SERVICE.

Thank you and Enjoy!