Title: Nitride semiconductor device
Abstract: A nitride semiconductor device including a light emitting device comprises a n-type region of one or more nitride semiconductor layers having n-type conductivity, a p-type region of one or more nitride semiconductor layers having p-type conductivity and an active layer between the n-type region and the p-type region. In such devices, there is provided with a super lattice layer comprising first layers and second layers which are nitride semiconductors having a different composition respectively. The super lattice structure makes working current and voltage of the device lowered, resulting in realization of more efficient devices.
Patent Number: 6,849,864 Issued on 02/01/2005 to Nagahama, et al.
| Inventors:
|
Nagahama; Shinichi (Anan, JP);
Senoh; Masayuki (Anan, JP);
Nakamura; Shuji (Anan, JP)
|
| Assignee:
|
Nichia Chemical Industries, Ltd. (Tokushima, JP)
|
| Appl. No.:
|
601582 |
| Filed:
|
June 24, 2003 |
Foreign Application Priority Data
| Jan 09, 1997[JP] | P 09-001937 |
| Jan 27, 1997[JP] | P 09-012707 |
| Apr 03, 1997[JP] | P 09-102793 |
| May 26, 1997[JP] | P 09-134210 |
| Sep 09, 1997[JP] | P 09-244342 |
| Oct 27, 1997[JP] | P 09-274438 |
| Oct 27, 1997[JP] | P 09-311272 |
| Current U.S. Class: |
257/22; 257/15; 257/94; 257/E33.008; 257/E33.028 |
| Intern'l Class: |
H01L 031/032.8 |
| Field of Search: |
257/15,22,94
|
References Cited [Referenced By]
U.S. Patent Documents
| 5005057 | Apr., 1991 | Izumiya et al.
| |
| 5146465 | Sep., 1992 | Khan et al.
| |
| 5306662 | Apr., 1994 | Nakamura et al.
| |
| 5578839 | Nov., 1996 | Nakamura et al.
| |
| 5583879 | Dec., 1996 | Yamazaki et al.
| |
| 5585648 | Dec., 1996 | Tischler.
| |
| 5585649 | Dec., 1996 | Ishikawa et al. | 257/94.
|
| 5592501 | Jan., 1997 | Edmond et al.
| |
| 5747827 | May., 1998 | Duggan et al.
| |
| 5903017 | May., 1999 | Itaya et al.
| |
| 5945689 | Aug., 1999 | Koike et al. | 257/88.
|
| 6153894 | Nov., 2000 | Udagawa | 257/96.
|
| 6377596 | Apr., 2002 | Tanaka et al.
| |
| Foreign Patent Documents |
| 2 298 735 | Sep., 1996 | GB.
| |
| 2-288371 | Nov., 1990 | JP.
| |
| 5-110138 | Apr., 1993 | JP.
| |
| 5-110139 | Apr., 1993 | JP.
| |
| 5-183189 | Jul., 1993 | JP.
| |
| 6-021511 | Jan., 1994 | JP.
| |
| 6-268257 | Sep., 1994 | JP.
| |
| 06-268259 | Sep., 1994 | JP.
| |
| 7-169701 | Jul., 1995 | JP.
| |
| 07-170017 | Jul., 1995 | JP.
| |
| 8-023124 | Jan., 1996 | JP.
| |
| 8-056015 | Feb., 1996 | JP.
| |
| 8-070139 | Mar., 1996 | JP.
| |
| 8-203834 | Aug., 1996 | JP.
| |
| 08-213653 | Aug., 1996 | JP.
| |
| 8-228048 | Sep., 1996 | JP.
| |
| 8-250810 | Sep., 1996 | JP.
| |
| 9-116234 | May., 1997 | JP.
| |
| 9-148678 | Jun., 1997 | JP.
| |
| 9-232629 | Sep., 1997 | JP.
| |
| 9-293935 | Nov., 1997 | JP.
| |
| 9-298341 | Nov., 1997 | JP.
| |
| 10-93194 | Apr., 1998 | JP.
| |
| 10-145004 | May., 1998 | JP.
| |
| WO 97/11518 | Mar., 1997 | WO.
| |
Other References
S. Nakamura et al., "Present Status of InGaN/GaN/AlGaN-Based Laser Diodes,"
Proceedings of the Second International Conference on Nitride
Semiconductors (ICNS '97), 1997, p. 444-446.
T. Shibata et al., "Hydride Vapor Phase Epitaxy Growth of High Quality GaN
Bulk Single Crystal by Epitaxial Lateral Overgrowth," Proceedings of the
Second International Conference on Nitride Semiconductors (ICNS '97),
1997, pp. 154-155.
H. Matsushima et al., "Sub-micron Fine Structure of GaN by MOVPE Selective
Area Growth (SAG) and Buried Structure by Epitaxial Lateral Overgrowth
(ELO)," Proceedings of the Second International Conference of Nitride
Semiconductors (ICNS '97), 1997 pp. 492-493.
S. Nakamura et al., "InGaN-Based Multi-Quantum-Well-Structure Laser
Diodes," Jpn. J. Appl. Phys., vol. 35 (1996), pp. L74-L76, Part 2, No. 1B,
Jan. 15, 1996S.
Nakamura et al., "In GaN-Based Multi-Quantum-Well-Structure Laser Diodes
with Cleaved Mirror Cavity Facets," Jpn. J. Appl. Phys., vol. 35 (1996),
pp. L217-L220, Part 2, No. 2B, Feb. 15, 1996.
S. Nakamura et al., "High-Power, Long-Lifetime InGaN
Multi-Quantum-Well-Structure Laser Diodes," Jpn. J. Appl. Phys., vol. 36
(1997), pp. L1059-L1061, Part 2, No. 8B, Aug. 15, 1997.
F.L. Degertekin et al., "Single mode Lamb wave excitation in thin plates by
Hertzian contacts," Appl. Phys. Lett. 69 (2), pp. 146-148, Jul. 8, 1996.
M. Shao et al., "Radio-frequency . . . ," Appl. Phys. Lett. 69 (2), pp.
3045-3047, Nov. 11, 1996.
S. Nakamura et al., "Room-temperature continuous-wave operation of InGaN
multi-quantum-well structure laser diodes," Appl. Phys. Lett. 69 (2), pp.
4056-4058, Dec. 23, 1996.
Suemune, Ikuo, "Doping in a superlattice structure: Improved hole
activation in wide-gap II-VI materials," J. Appl. Phys. vol. 67, No. 5
(Mar. 1, 1990), pp. 2364-2369.
M.A. Khan, et al., "Reflective filters based on single-crystal GaN/Al.sub.x
Ga.sub.1-x N multilayers deposited using low-pressure metalorganic
chemical vapor deposition," Appl. Phys. Lett. 59 (12), pp. 1449-1451, Sep.
16, 1991.
|
Primary Examiner: Wilson; Allan R.
Attorney, Agent or Firm: Birch, Stewart, Kolasch & Birch, LLP
Parent Case Text
This application is a divisional of application Ser. No. 09/714,143, filed
on Nov. 17, 2000 now U.S. Pat. No. 6,667,619, which is a continuation of
prior application Ser. No. 09/004,925, filed on Jan. 9, 1998 which issued
as U.S. Pat. No. 6,172,382 on Jan. 9, 2001, the entire contents of which
are hereby incorporated by reference and for which priority is claimed
under 35 U.S.C. .sctn. 120; and this application claims priority of
Application No. 9-001937 filed in Japan on Jan. 9, 1997; 9-012707 filed in
Japan on Jan. 27, 1997; 9-102793 filed in Japan on Apr. 3, 1997; 9-134210
filed in Japan on May 26, 1997, 9-244342 filed in Japan on Sep. 9, 1997;
9-274438 filed in Japan on Oct. 7, 1997; and 9-311272 filed in Japan on
Oct. 27, 1997 under 35 U.S.C. .sctn. 119.
Claims
What is claimed is:
1. A nitride semiconductor device comprising an n-type semiconductor region
comprising one or more nitride semiconductor layers, a p-type
semiconductor region comprising one or more nitride semiconductor layers
and an active layer of a nitride semiconductor between said n-type
semiconductor region and said p-type semiconductor region,
wherein at least one nitride semiconductor layer in said n-type
semiconductor region is an n-side super lattice comprising first and
second nitride semiconductor layers, each of said first nitride
semiconductor layers and each of said second nitride semiconductor layers
being laminated alternately, said first nitride semiconductor layer has a
higher band gap energy and a smaller concentration of the n-type impurity
than said second nitride semiconductor layer.
2. A nitride semiconductor device comprising an n-type semiconductor region
comprising one or more nitride semiconductor layers, a p-type
semiconductor region comprising one or more nitride semiconductor layers
and an active layer of a nitride semiconductor between said n-type
semiconductor region and said p-type semiconductor region,
wherein at least one nitride semiconductor layer in said p-type
semiconductor region is a p-side super lattice comprising third and fourth
nitride semiconductor layers, each of said third nitride semiconductor
layers and each of said fourth nitride semiconductor layers being
laminated alternately, said third nitride semiconductor layer has higher
band gap energy and a smaller concentration of the p-type impurity than
said fourth nitride semiconductor layer.
3. A nitride semiconductor device comprising an n-type semiconductor region
comprising one or more nitride semiconductor layers, a p-type
semiconductor region comprising one or more nitride semiconductor layers
and an active layer of a nitride semiconductor between said n-type
semiconductor region and said p-type semiconductor region,
wherein at least one nitride semiconductor layer in said n-type
semiconductor region is an n-side super lattice comprising first and
second nitride semiconductor layers, each of said first nitride
semiconductor layers and each of said second nitride semiconductor layers
being laminated alternately, said first nitride semiconductor layer has a
higher band gap energy and a smaller concentration of the n-type impurity
than said second nitride semiconductor layer,
wherein at least one nitride semiconductor layer in said p-type
semiconductor region is a p-side super lattice comprising third and fourth
semiconductor nitride layers, each of said third nitride semiconductor
layers and each of said fourth nitride semiconductor layers being
laminated alternately, said third nitride semiconductor layer has a higher
band gap energy and a smaller concentration of the p-type impurity than
said fourth nitride semiconductor layer.
4. The nitride semiconductor device according to claim 1 or 3, wherein the
part of said second nitride semiconductor layer which is close to said
first nitride semiconductor layer has a lower concentration of the n-type
impurity than the part which is farther from the first nitride
semiconductor layer.
5. The nitride semiconductor device according to claim 1 or 3, wherein the
concentration of the n-type impurity in said first nitride semiconductor
layer is not more than 1.times.10.sup.19 /cm.sup.3 and the concentration
of the n-type impurity in said second nitride semiconductor layer ranges
between 1.times.10.sup.17 /cm.sup.3 and 1.times.10.sup.20 /cm.sup.3.
6. The nitride semiconductor device according to claim 1 or 3, wherein said
first nitride semiconductor layers are made of Al.sub.y Ga.sub.1-y N
(0<Y<1) and said second nitride semiconductor layers are made of
In.sub.x Ga.sub.1-x N (0.ltoreq.X<1).
7. The nitride semiconductor device according to claim 1 or 3, wherein said
second nitride semiconductor layers are made of GaN.
8. The nitride semiconductor device according to claim 1 or 3, wherein said
first nitride semiconductor layers are made of Al.sub.x Ga.sub.1-x N
(0<X<1) and said second nitride semiconductor layers are made of
Al.sub.y Ga.sub.1-y N (0<Y<1, X>Y).
9. The nitride semiconductor device according to claim 1 or 3, wherein said
first nitride semiconductor layer or said second nitride semiconductor
layer is not doped with an n-type impurity.
10. The nitride semiconductor device according to claim 2 or 3, wherein the
part of said fourth nitride semiconductor layer which is close to the
third nitride semiconductor layer has a lower concentration of the p-type
impurity than the part which is farther from the third nitride
semiconductor layer.
11. The nitride semiconductor device according to claim 2 or 3, wherein the
concentration of the p-type impurity in said third nitride semiconductor
layer is not more than 1.times.10.sup.20 /cm.sup.3 and the concentration
of the p-type impurity in said fourth nitride semiconductor layer ranges
between 1.times.10.sup.18 /cm.sup.3 and 1.times.10.sup.21 /cm.sup.3.
12. The nitride semiconductor device according to claim 2 or 3, wherein
said third nitride semiconductor layers are made of Al.sub.y Ga.sub.1-y N
(0<Y<1) and said fourth nitride semiconductor layers are made of
In.sub.x Ga.sub.1-x N (0.ltoreq.X<1).
13. The nitride semiconductor device according to claim 2 or 3, wherein
said fourth nitride semiconductor layers are made of GaN.
14. The nitride semiconductor device according to claim 2 or 3, wherein
said third nitride semiconductor layers are made of Al.sub.x Ga.sub.1-x N
(0<X<1) and said fourth nitride semiconductor layers are made of
Al.sub.y Ga.sub.1-y N (0<Y<1, X>Y).
15. The nitride semiconductor device according to claim 2 or 3, wherein
said third nitride semiconductor layer or said fourth nitride
semiconductor layer is not doped with an n-type impurity.
16. A nitride semiconductor device comprising an n-type semiconductor
region comprising one or more nitride semiconductor layers, a p-type
semiconductor region comprising one or more nitride semiconductor layers
and an active layer of a nitride semiconductor between said n-type
semiconductor region and said p-type semiconductor region,
wherein at least one nitride semiconductor layer in said n-type
semiconductor region is an n-side super lattice comprising first and
second nitride semiconductor layers, each of said first nitride
semiconductor layers and each of said second nitride semiconductor layers
being laminated alternately, said first nitride semiconductor layers
having different concentrations of n-type impurity from those of said
second nitride semiconductor layers, said first nitride semiconductor
layers being made of Al.sub.x Ga.sub.1-x N (0<X<1) and said second
nitride semiconductor layers being made of GaN.
17. A nitride semiconductor device comprising an n-type semiconductor
region comprising one or more nitride semiconductor layers, a p-type
semiconductor region comprising one or more nitride semiconductor layers
and an active layer of a nitride semiconductor between said n-type
semiconductor region and said p-type semiconductor region,
wherein at least one nitride semiconductor layer in said p-type
semiconductor region is a p-side super lattice comprising third and fourth
nitride semiconductor layers, each of said third nitride semiconductor
layers and each of said fourth nitride semiconductor layers being
laminated alternately, said third nitride semiconductor layers having
different concentrations of p-type impurity from those of said fourth
nitride semiconductor layers, said third nitride semiconductor layers
being made of Al.sub.x Ga.sub.1-x N (0<X<1) and said fourth nitride
semiconductor layers being made of GaN.
18. A nitride semiconductor device comprising an n-type semiconductor
region comprising one or more nitride semiconductor layers, a p-type
semiconductor region comprising one or more nitride semiconductor layers
and an active layer of a nitride semiconductor between said n-type
semiconductor region and said p-type semiconductor region,
wherein at least one nitride semiconductor layer in said n-type
semiconductor region is an n-side super lattice comprising first and
second nitride semiconductor layers, each of said first nitride
semiconductor layers and each of said second nitride semiconductor layers
being laminated alternately, said first nitride semiconductor layers
having different concentrations of n-type impurity from those of said
second nitride semiconductor layers, said first nitride semiconductor
layer being made of Al.sub.x Ga.sub.1-x N (0<X<1), said second
nitride semiconductor layer being made of GaN,
wherein at least one nitride semiconductor layer in said p-type
semiconductor region is a p-side super lattice comprising third and fourth
nitride semiconductor layers, each of said third nitride semiconductor
layers and each of said fourth nitride semiconductor layers being
laminated alternately, said third nitride semiconductor layers having
different concentrations of p-type impurity from those of said fourth
nitride semiconductor layers, said third nitride semiconductor layer being
made of Al.sub.x Ga.sub.1-x N (0<X<1), said fourth nitride
semiconductor layers being made of GaN, respectively.
19. The nitride semiconductor device as in one of claims 13, 16-18, wherein
said device is a laser device comprising an active layer between a p-type
cladding layer and an n-type cladding layer, and
at least one of said p-type cladding layer and said n-type cladding layer
is said n-side super lattice layer or said p-side super lattice layer.
20. The nitride semiconductor device according to claim 19, wherein said
device is a laser device, and
an optical guide layer made of a nitride semiconductor containing In or GaN
which has an impurity concentration of not more than 1.times.10.sup.19
/cm.sup.3 which is formed at least either between said p-type cladding
layer and said active layer or between said p-type cladding layer and said
active layer.
Description
TECHNICAL FIELD OF THE INVENTION
This invention relates to a device provided with a nitride semiconductor
In.sub.x Al.sub.y Ga.sub.1-x-y N (0.ltoreq.x, 0.ltoreq.y, x+y.ltoreq.1)
including light emitting devices such as LED (light emitting diode), LD
(laser diode) and SLD (super luminescent diode), solar cells, light
receiving devices such as optical sensors and electronic devices such as
transistors and power devices.
BACKGROUND OF THE INVENTION
Nitride semiconductors have been recently produced as materials used for a
high bright blue LED and a pure green LED, a full color LED display and a
traffic signal LED. Such LEDs are provided with an active layer of SQW
(Single Quantum Well) or MQW (Multi Quantum Well) where the well layer is
made of InGaN and positioned between a p-type nitride layer and an n-type
nitride layer to form a DH (Double Hetero) structure. The wavelength of
the blue or green light emitting from the active layer depends on a ratio
of In in the InGaN well layer.
The inventors have first realized laser emitting by using the above nitride
materials and reported it in Jpn. J. Appl. Phys. 35(1996)L74 and Jpn. J.
Appl. Phys. 35(1996)L217. The laser device comprises the DH structure
where the active layer is MQW having InGaN well layers and showed the
following data:
Threshold current: 610 mA;
Threshold current density: 8.7 kA/m2;
Wavelength: 410 nm
(pulse width 2 .mu.m and pulse cycle 2 ms)
The inventors have further improved the laser device and reported it in
Appl. Phys. Lett. 69(1996)1477. The laser device comprises a ridge strip
structure formed on a part of p-type nitride semiconductor and showed the
following data.
Threshold current: 187 mA;
Threshold current density: 3 kA/m2;
Wavelength: 410 nm
(pulse width 2 .mu.m, pulse cycle 2 ms and duty ratio: 0.1%)
The inventors have first succeeded in CW (Continuous-Wave) Oscillation or
Operation at room temperature and reported it in Gijutsu-Sokuho of Nikkei
Electronics issued on Dec. 2, 1996, Appl. Phys. Lett. 69(1996) and Appl.
Phys. Lett. 69(1996)4056.
The laser diode showed a lifetime of 27 hours at 20.degree. C. under the
threshold current density of 3.6 ka/cm.sup.2, the threshold voltage of 5.5
V and the output of 1.5 mW.
On the other hand, the blue and green LED of nitrides showed a forward
current (If) of 20 mA and a forward voltage (Vf) of 3.4 to 3.6 V which are
higher by 2 V or more than those of red LEDs made of GaAlAs
semiconductors. Therefore, further decrease of Vf in the blue and green
LED was required. Additionally, there was required an effective LD which
can decrease the threshold current and voltage to get a longer lifetime of
CW operation at room temperature, because the conventional LD still had a
higher threshold current and voltage.
The inventors have gotten the idea that technology of decreasing the
threshold in LDs was applicable to LEDs in order to decrease the Vf.
Therefore, a first object of the present invention is to decrease the
threshold current and voltage of nitride semiconductor LDs and realize a
longer lifetime of CW operation.
In the specification, it should be understood that the general formulae:
In.sub.x Ga.sub.1-x N and Al.sub.y Ga.sub.1-y N show chemical atoms which
compose of nitride layers and therefore, even if different layers are
represented by the same formula, the different layers do not necessarily
have the same composition, that is, the same x or y does not mean the same
ratio.
DISCLOSURE OF THE INVENTION
According to a first aspect of the present invention, there is provided a
nitride semiconductor device comprising a p-type region comprising one or
more p-conductivity semiconductor layers of nitride, a n-type region
comprising one or more n-conductivity semiconductor layers of nitride and
an active layer of a nitride semiconductor which is positioned between
said p type region and said n type region, at least one layer of said p
type region being a super lattice layer comprising first thin layers of
nitride and second thin layers of nitride, said first layers having
different composition from those of said second layers and the first and
second thin layers being laminated alternately.
The super lattice structure can make the nitride layers improved in
crystallinity and then make the nitride layers decreased in resistivity,
resulting in smaller resistance of the p-type region and higher power
efficiency of the device.
In the present invention, the p-type region means a region comprising one
or more nitride semiconductor layers between an active layer and a
p-electrode while the n-type region means a region comprising one or more
nitride semiconductor layers between the active layer and an n-electrode.
According to a second aspect of the present invention, there is provided a
nitride semiconductor device having an active layer made of a nitride
semiconductor between the n-type region of one or more nitride
semiconductor layers and the p-type region of one or more nitride
semiconductor layers, at least one semiconductor layer in the p-type
region or the n-type region is a super lattice layer made by laminating
first layers and second layers which are made of nitride semiconductor,
respectively, and have different constitutions from each other.
The super lattice structure can make the nitride layers improved in
crystallinity and then make the nitride layers decreased in resistivity,
resulting in smaller resistance of the n-type region and higher power
efficiency of the device.
In a preferred embodiment of the first and second nitride semiconductor
devices, the super lattice layer is made by laminating first layers which
is made of a nitride semiconductor and has a thickness of not more than
100 angstroms and second layers which is made of a nitride semiconductor
having different constitutions from the first layer and has a thickness of
not more than 100 angstroms.
In order to keep or confine carriers in the active layer, at least one of
the first and second layers is preferably made of a nitride semiconductor
containing Al, especially Al.sub.Y Ga.sub.1-Y N (0<Y.ltoreq.1).
In a second preferred embodiment of the first and second nitride
semiconductor devices, for the super lattice, the first layer is
preferably made of a nitride semiconductor represented by the formula
In.sub.X Ga.sub.1-X N (0.ltoreq.X.ltoreq.1) and the second layer is
preferably made of a nitride semiconductor represented by the formula
Al.sub.Y Ga.sub.1-Y N (0<Y.ltoreq.1, X=Y.noteq.0). According to the
second embodiment, all the nitride layers have a good crystallinity, which
results in improving output of the nitride semiconductor device
(improvement of power efficiency). In LED or LD devices, the forward
voltage (hereinafter referred to Vf) and also the threshold current and
voltage can be lowered. In order to form a nitride layer having better
crystallinity in the first and second semiconductor device, it is further
recommendable that first layers of the super lattice structure are made of
a nitride semiconductor represented by the formula In.sub.X Ga.sub.1-X N
(0.ltoreq.X<1) and said second layer is made of a nitride semiconductor
represented by the formula Al.sub.Y Ga.sub.1-Y N (0<Y<1).
In the above first and second semiconductor devices, it is preferable that
the first layer and the second layer are made of a nitride semiconductor
and have a thickness of not more than 70, especially 40 angstroms,
respectively, while said first layer and said second layer have a
thickness of not less than 10, especially 5 angstroms, respectively. The
thickness within the above range makes it easy to form Al.sub.x Ga.sub.1-y
N (0<Y.ltoreq.1), which layer is otherwise difficult to be formed with
a good crystallinity. Especially, in case that the super lattice layer can
be made as at least one layer of the p-type region between the p-electrode
and the active layer and also as at least one layer of the n-type
semiconductor region between the n-contact layer for current charging and
the active layer, it is recommendable to get better effect that thickness
of the first and second layer should be set within the above range.
In the above embodiment of the first and second nitride semiconductor
devices, the p-type region is preferably provided with a p-side contact
layer having a thickness of not more than 500 angstroms, on which the
p-electrode is to be formed. More preferably, the p-side contact layer has
a thickness of not more than 300 angstroms and not less than 10 angstroms.
In the second nitride semiconductor device of the present invention,
wherein the p-type region is provided with a p-side contact layer on which
the p-electrode is to be formed, the super lattice layer is preferably
formed between the active layer and the p-side contact layer.
Further, in the second nitride semiconductor device of the present
invention, the n-type region may comprise a second buffer layer made of a
nitride semiconductor which has a thickness of not less than 0.1 .mu.m via
a first buffer layer on the substrate, an n-side contact layer made of a
nitride semiconductor doped with an n-type impurity on said second buffer
layer, and an n-electrode being formed on the n-side contact layer. This
construction makes the n-side contact layer have higher carrier
concentration and good crystallinity. In order to make the n-side contact
layer have much better crystallinity, it is preferable that the
concentration of the impurity in second buffer layer is lower than that in
said n-side contact layer. Further, it is preferable that at least one of
the first and second buffer layers is a super lattice layer made by
laminating nitride semiconductor layers of different constitutions with a
thickness of not more than 100 angstroms in order to make a nitride layer
formed on the buffer layer and have a good crystallinity.
In the second nitride semiconductor device, wherein the n-type region has a
n-side contact layer on which a n-electrode is to be formed, the super
lattice layer is preferably formed between the active layer and the n-side
contact layer. In the LD device, the layer formed between the active layer
and the n-side contact layer or between the active layer and the p-side
contact layer may be a cladding layer acting as a carrier keeping layer or
a light guide layer, which is preferably made of the super lattice
structure. Thereby, the super lattice structure can remarkably decrease
the threshold current and voltage. Especially, if the p-cladding layer
between the active layer and the p-side contact layer, the p-cladding
layer of the super lattice structure is advantageous to lower the
threshold current and voltage. In the second nitride semiconductor device
of the present invention, it is preferable that at least one of said first
layer and said second layer is doped with an impurity which makes the
conductivity of the layer n-type or p-type and the impurity concentration
doped to the first layer and the second layer to make the conductivity of
the layers n-type or p-type, are different from each other. The impurity
for making the conductivity of the layer includes n-impurities belonging
to IV-A, IV-B, VI-A and VI-B groups and p-impurities belonging to I-A,
I-B, II-A, II-B groups (hereinafter referred to n-impurity and
p-impurity).
In the second nitride semiconductor device of the present invention, the
super lattice layer may be formed as the n-side contact layer on which the
n-electrode is to be formed, whereby the resistance of n-side contact
layer can be lowered, resulting in further decreasing of the threshold
current and voltage in LD devices.
In the LD devices provided with the first or second nitride semiconductor
device of the present invention, if the laser device has a super lattice
layer in the p-type region, a ridge portion may be formed on the supper
lattice layer and on the layer located over said super lattice layer in a
manner that the longitudinal direction of the ridge portion coincides with
the direction of resonance and the ridge has a predetermined width.
In a preferred first laser diode of the present invention, which comprises
an active layer in which laser is emitted between the n-type region
including a n-side cladding layer and the p-type region including a p-side
cladding layer, the n-side cladding layer may be a super lattice layer
made by laminating first layers made of a nitride semiconductor having a
thickness of not more than 100 angstroms and second layers made of a
nitride semiconductor of a different constitution from the first layer and
having a thickness of not more than 100 angstroms, and said p-side
cladding layer may be a super lattice layer made by laminating a third
layer made of a nitride semiconductor having a thickness of not more than
100 angstroms and a fourth layer made of a nitride semiconductor of a
different constitution from the third layer and having a thickness of not
more than 100 angstroms. Due to this, during laser emission the threshold
current and voltage can be lowered. In this case, the ridge portion may be
formed on said p-side cladding layer and on the layer located over said
p-side cladding layer in a manner that the longitudinal direction of the
ridge coincidences with the direction of resonance and the ridge has a
desired width.
According to a third aspect of the present invention, there is provided a
third nitride semiconductor device which comprises an active layer made of
a nitride semiconductor between a n-type region of one or more nitride
semiconductor layers and a p-type region of one or more nitride
semiconductor layers, wherein at least one nitride semiconductor layer in
the n-type region is a n-side super lattice made by laminating first and
second nitride semiconductor layers which have different constitutions and
different concentrations of a n-type impurity from each other. Due to this
construction, the nitride semiconductor layer made of the super lattice
structure makes the electrical resistance thereof smaller and thus the
total resistance of the n-type region can be smaller.
According to a fourth aspect of the present invention, there is provided a
nitride semiconductor device comprising an active layer made of a nitride
semiconductor between the n-type region of one or more nitride
semiconductor layers and the p-type region of one or more nitride
semiconductor layers, characterized in that at least one nitride
semiconductor layer in the p-type region is a p-side super lattice made by
laminating third and fourth nitride semiconductor layers which have
different constitutions and different concentrations of a p-type impurity
from each other. The super lattice structure can make the nitride
semiconductor layer comprising the super lattice structure have a lower
resistance and then total resistance of the p-type region can be
decreased.
Please note that the first and second and the third and fourth of layers
does not mean the laminating order in the specification.
According to a fifth aspect of the present invention, there is provided a
nitride semiconductor device comprising an active layer made of a nitride
semiconductor between the n-type region of one or more nitride
semiconductor layers and the p-type semiconductor region of one or more
nitride semiconductor layers, characterized in that at least one nitride
semiconductor layer in the n-type region is a n-side super lattice made by
laminating the first and second nitride semiconductor layers which have
different constitutions and different concentrations of a n-type impurity
from each other, and at least one nitride semiconductor layer in p-type
region is a p-side super lattice made by laminating the third and fourth
nitride semiconductor layers which have different constitutions and
different concentrations of a p-type impurity from each other. The super
lattice structure can make the resistance of the nitride semiconductor
comprising super lattice structure smaller and thus total resistance of
the p-type region can be decreased.
In a case that the third and fifth semiconductor devices are devices of
optoelectronics such as light emitting devices and light receiving
devices, the n-side super lattice layer may be formed as at least one of
the group consisting of a buffer layer formed on the substrate, a n-side
contact layer for n-electrode, n-side cladding layer for confining or
keeping carriers and n-side light guide layer for guiding emission from
the active layer. On the other hand, in the fourth and fifth semiconductor
device, the p-side super lattice layer maybe formed as at least one
selected from the group consisting of the p-side contact layer, the p-side
cladding layer for confining carriers and the p-side wave guide layer for
guiding emission from the active layer.
In the third and fifth semiconductor devices of the present invention, for
the n-side super lattice layer, the first nitride semiconductor layer
having a higher band gap may have a larger or smaller concentration of the
n-type impurity than the second nitride semiconductor layer having a lower
band gap. The larger impurity concentration of the first layer than that
of the second layer makes carrier generate in the first layer having a
higher band gap and then the carrier injected into the second layer having
a lower band gap to move the carrier through the second layer having a
smaller impurity concentration and a larger mobility. Therefore, this
construction makes the n-side super lattice layer decreased in electrical
resistance.
In a case that the impurity concentration of the first layer is relatively
larger than that of the second layer, the first layer of the super lattice
layer in the first semiconductor device may decrease the n or p-impurity
concentration at a part close to the second layer comparing with that at a
part remote from the second layer, which prevents the carrier moving
through the second layer from scattering by the impurity at the part close
to the second layer, resulting in increase of mobility of the second layer
and thus lowering of the resistance of the super lattice layer.
In the embodiment of the third and fifth nitride semiconductor devices, if
the n-impurity concentration in the first layer having a higher band gap
becomes larger, it is preferable that the n-impurity concentration in the
first layer ranges between 1.times.10.sup.17 /cm.sup.3 and
1.times.10.sup.20 /cm.sup.3 and the n-impurity concentration in the second
layer is smaller than that of the first layer and not more than
1.times.10.sup.19 /cm.sup.3. The n-impurity concentration in the second
layer having a smaller band gap is preferably not more than
1.times.10.sup.18 /cm.sup.3, more preferably not more than
1.times.10.sup.17 /cm.sup.3. From the aspect of increasing the mobility of
the second layer, a smaller n-impurity concentration is better and an
undoped layer or intentionally not doped layer is most preferable.
If the impurity concentration of the first layer is smaller than that of
the second layer, it is preferable that the n-impurity concentration of
the second layer is smaller at a part close to the first layer than that
at a part remote from the first layer. For example, it is preferable that
the n-impurity concentration in the first layer is not more than
1.times.10.sup.19 /cm.sup.3 and the n-impurity in the second layer ranges
between 1.times.10.sup.17 /cm.sup.3 and 1.times.10.sup.20 /cm.sup.3. The
n-impurity concentration in the first layer having a smaller band gap is
preferably not more than 1.times.10.sup.18 /cm.sup.3, more preferably not
more than 1.times.10.sup.17 /cm.sup.3. The most preferable first layer is
an undoped layer or intentionally not doped layer.
In order to form an n-side super lattice layer having a good crystallinity
in the third and fifth semiconductor device, the first nitride
semiconductor layer may be made of Al.sub.Y Ga.sub.1-Y N (0<Y<1)
capable of forming a relatively higher band gap layer having a good
crystallinity and the second nitride semiconductor layer may be made of
In.sub.X Ga.sub.1-X N (0.ltoreq.X<1) capable of forming a relatively
smaller band gap layer having a good crystallinity. The best second layer
of the super lattice layer in the third and fifth semiconductor devices,
is a GaN layer. This construction is advantageous in manufacturing the
super lattice layer because the same atmosphere can be used to form the
first layer (Al.sub.Y Ga.sub.1-Y N) and the second layer (GaN).
In the third and fifth nitride semiconductor devices, the first nitride
semiconductor layer may be made of Al.sub.X Ga.sub.1-X N (0<X<1) and
the second nitride semiconductor layer may be made of Al.sub.Y Ga.sub.1-Y
N (0<Y<1, X>Y). In this case, further, the first nitride
semiconductor layer or said second nitride semiconductor layer is
preferably not doped with a n-type impurity.
In the fourth and fifth semiconductor devices of the present invention, for
the p-side super lattice layer, the third nitride semiconductor layer
having a higher band gap may have a larger or smaller concentration of the
p-type impurity than that of the fourth nitride semiconductor layer having
a smaller band gap. The larger impurity concentration of the third layer
than that of the fourth layer makes carriers generate in the third layer
having a higher band gap, and the carriers injected into the fourth layer
having a smaller band gap to move the injected carriers through the fourth
layer having a smaller impurity concentration and a larger mobility,
resulting in decreasing the super lattice resistance.
Further, in the fourth and fifth semiconductor devices of the present
invention, it is preferable that apart of the third nitride semiconductor
layer which is close to the fourth nitride semiconductor layer has a lower
concentration of the p-type impurity than a part remote or farther from
the fourth nitride semiconductor layer, which prevents the carrier moving
through the fourth layer from scattering by the impurity at the part close
to the fourth layer, resulting in increase of mobility of the fourth layer
and thus further lowering of the resistance of the super lattice layer.
In the embodiment of the fourth and fifth nitride semiconductor devices, if
the n-impurity concentration in the third layer becomes larger than that
in the fourth layer, it is preferable that the n-impurity concentration in
the third layer having a larger band gap ranges between 1.times.10.sup.18
/cm.sup.3 and 1.times.10.sup.21 /cm.sup.3 and the p-impurity concentration
in the fourth layer is smaller than that of the third layer and not more
than 1.times.10.sup.20 /cm.sup.3. The p-impurity concentration in the
fourth layer having a smaller band gap is preferably not more than
1.times.10.sup.19 /cm.sup.3, more preferably not more than
1.times.10.sup.18 /cm.sup.3. From the aspect of increasing the mobility of
the second layer, a smaller n-impurity concentration is better and an
undoped layer or intentionally not doped layer is most preferable.
In the fourth and fifth nitride semiconductor, if the impurity
concentration of the third layer is smaller than that of the fourth layer,
it is preferable that the p-impurity concentration of the fourth layer is
smaller at a part close to the third layer than that at a part remote from
the third layer. For example, it is preferable that the p-impurity
concentration in the first layer is not more than 1.times.10.sup.20
/cm.sup.3 and the n-impurity in the second layer ranges between
1.times.10.sup.18 /cm.sup.3 and 1.times.10.sup.21 /cm.sup.3. The
n-impurity concentration in the third layer having a smaller band gap is
preferably not more than 1.times.10.sup.19 /cm.sup.3, more preferably not
more than 1.times.10.sup.18 /cm.sup.3. The most preferable first layer is
an undoped layer or intentionally not doped layer.
In order to form a super lattice layer having a good crystallinity in the
fourth and fifth semiconductor device, the third nitride semiconductor
layer may be made of Al.sub.Y Ga.sub.1-Y N (0<Y<1) capable of
forming a relatively higher band gap layer having a good crystallinity and
the fourth nitride semiconductor layer may be made of In.sub.X Ga.sub.1-X
N (0.ltoreq.X<1). The best fourth layer of the super lattice layer in
the third and fifth semiconductor devices, is a GaN layer. This
construction is advantageous in manufacturing the super lattice layer
because the same atmosphere can be used to form the third layer (Al.sub.Y
Ga.sub.1-Y N) and the fourth layer (GaN).
In the fourth and fifth nitride semiconductor devices, the third nitride
semiconductor layer may be made of Al.sub.X Ga.sub.1-X N (0<X<1) and
the fourth nitride semiconductor layer may be made of Al.sub.Y Ga.sub.1-Y
N (0<Y<1, X>Y). In this case, further, the third nitride
semiconductor layer or the fourth second nitride semiconductor layer is
preferably not doped with a n-type impurity.
In the fifth nitride semiconductor, for the n-side super lattice layer, the
first nitride semiconductor layer may be provided with a higher band gap
energy and a larger concentration of the n-type impurity than the second
nitride semiconductor layer, and for the p-side super lattice layer, the
third nitride semiconductor layer may be provided with a higher band gap
energy and a larger concentration of the p-type impurity than the fourth
nitride semiconductor layer. In this case, it is preferable that the
concentration of the n-type impurity in the first nitride semiconductor
layer ranges between 1.times.10.sup.17 /cm.sup.3 and 1.times.10.sup.20
/cm.sup.3 and the concentration of the n-type impurity in the second
nitride semiconductor layer is not more than 1.times.10.sup.19 /cm.sup.3,
and the concentration of the p-type impurity in the third nitride
semiconductor layer ranges between 1.times.10.sup.18 /cm.sup.3 and
1.times.10.sup.21 /cm.sup.3 and the concentration of the p-type impurity
in the fourth nitride semiconductor layer is not more than
1.times.10.sup.20 /cm.sup.3.
Further, in the fifth nitride semiconductor device, for the n-side super
lattice layer, the first nitride semiconductor layer may be provided with
a higher band gap energy and a larger concentration of the n-type impurity
than said second nitride semiconductor layer, and for the p-side super
lattice layer, the third nitride semiconductor layer may be provided with
a higher band gap energy and a smaller concentration of the p-type
impurity than the fourth nitride semiconductor layer. In this case, it is
preferable that the concentration of the n-type impurity in the first
nitride semiconductor layer ranges between 1.times.10.sup.17 /cm.sup.3 and
1.times.10.sup.20 /cm.sup.3 and the concentration of the n-type impurity
in the second nitride semiconductor layer is not more than
1.times.10.sup.19 /cm.sup.3, and the concentration of the p-type impurity
in the third nitride semiconductor layer is not more than
1.times.10.sup.20 /cm.sup.3 and the concentration of the p-type impurity
in the fourth nitride semiconductor layer ranges between 1.times.10.sup.18
/cm.sup.3 and 1.times.10.sup.21 /cm.sup.3.
Furthermore, in the fifth nitride semiconductor device, for the n-side
super lattice layer, the first nitride semiconductor layer may be designed
to have a higher band gap energy and a smaller concentration of the n-type
impurity than the second nitride semiconductor layer, and for the p-side
super lattice layer, the third nitride semiconductor layer may be designed
to have a higher band gap energy and a larger concentration of the p-type
impurity than the fourth nitride semiconductor layer. In this case, it is
preferable that the concentration of the n-type impurity in the first
nitride semiconductor layer is not more than 1.times.10.sup.19 /cm.sup.3
and the concentration of the n-type impurity in the second nitride
semiconductor layer ranges between 1.times.10.sup.17 /cm.sup.3 and
1.times.10.sup.20 /cm.sup.3, and the concentration of the p-type impurity
in the third nitride semiconductor layer ranges between 1.times.10.sup.18
/cm.sup.3 and 1.times.10.sup.21 /cm.sup.3 and the concentration of the
p-type impurity in the fourth nitride semiconductor layer is not more than
1.times.10.sup.20 /cm.sup.3.
Further, in the fifth nitride semiconductor device, for the n-side super
lattice layer, the first nitride semiconductor layer may be designed to
have a higher band gap energy and a smaller concentration of the n-type
impurity than the second nitride semiconductor layer, and for the p-side
super lattice layer, the third nitride semiconductor layer may be designed
to have a higher band gap energy and a smaller concentration of the p-type
impurity than the fourth nitride semiconductor layer. In this case, it is
preferable that the concentration of the n-type impurity in the first
nitride semiconductor layer is not more than 1.times.10.sup.19 /cm.sup.3
and the concentration of the n-type impurity in the second nitride
semiconductor layer ranges between 1.times.10.sup.17 /cm.sup.3 and
1.times.10.sup.20 /cm.sup.3, and the concentration of the p-type impurity
in the third nitride semiconductor layer is not more than
1.times.10.sup.20 /cm.sup.3 and the concentration of the p-type impurity
in the fourth nitride semiconductor layer ranges between 1.times.10.sup.18
/cm.sup.3.about.1.times.10.sup.21 /cm.sup.3.
Furthermore, in the fifth nitride semiconductor device, for the n-side
super lattice layer, the first nitride semiconductor layer may be made of
Al.sub.Y Ga.sub.1-Y N (0<Y<1) and the second nitride semiconductor
layer may be made of In.sub.X Ga.sub.1-X N (0.ltoreq.X<1), and for the
p-side super lattice layer, the third nitride semiconductor layer may be
made of Al.sub.Y Ga.sub.1-Y N (0<Y<1) and the fourth nitride
semiconductor layer maybe made of In.sub.X Ga.sub.1-X N (0.ltoreq.X<1).
In this case, it is preferable that the second and fourth nitride
semiconductor layers are made of GaN, respectively.
Further, in the fifth nitride semiconductor device, for the n-side super
lattice layer, the first nitride semiconductor layer may be made of
Al.sub.X Ga.sub.1-X N (0<X<1) and the second nitride semiconductor
layer is made of Al.sub.Y Ga.sub.1-Y N (0<Y<1, X>Y), and for the
p-side super lattice layer, the third nitride semiconductor layer may be
made of Al.sub.X Ga.sub.1-X N (0<X<1) and the fourth nitride
semiconductor layer may be made of Al.sub.Y Ga.sub.1-Y N (0<Y<1,
X>Y).
Furthermore, in the fifth nitride semiconductor device, it is preferable
that the first nitride semiconductor layer or the second nitride
semiconductor layer is an undoped layer to which a n-type impurity is not
doped. It is also preferable that the third nitride semiconductor layer or
the fourth nitride semiconductor layer is an undoped layer which is not
doped with a p-type impurity.
In the third, fourth and fifth nitride semiconductor device, the active
layer preferably includes a InGaN layer. The InGaN layer in the active
layer is preferably in a form of a quantum well layer. The active layer
may be SQW or MQW.
According to the present invention, there is provided a second nitride
semiconductor LD device comprising an active layer between a p-side
cladding layer and a n-side cladding layer, and at least one of the p-side
and the n-side cladding layers is the n-side super lattice layer or the
p-side super lattice layer respectively. The LD device can operate at a
lower threshold current. In the second LD device, it is preferable that an
optical wave guide layer made of a nitride semiconductor containing In or
GaN which has an impurity concentration of not more than 1.times.10.sup.19
/cm.sup.3, the optical wave guide layer being formed at least either
between the p-side cladding layer and the active layer or between the
p-side cladding layer and the active layer. In this case, the wave guide
can prevent the emission generated from disappearing due to a low
absorption rate of the optical wave guide, which causes a LD device
capable of waving at a low gain. In this case, in order to further
decrease the light absorption rate, it is more preferable that the
impurity concentration of the wave guide layer is not more than
1.times.10.sup.18 /cm.sup.3, especially not more than 1.times.10.sup.17
/cm.sup.3. The most preferable layer is an undoped one. The optical wave
guide layer may be made of the super lattice structure.
Furthermore, it is recommendable that there is provided with a cap layer
made of a nitride semiconductor between the optical wave guide layer and
the active layer. It is preferable that the cap layer having a higher band
gap energy than the well layer in the active layer and also the optical
wave guide layer and having a thickness of not more than 0.1 .mu.m is
formed between said optical wave guide layer and said active layer. It is
more preferable that the cap layer contains an impurity of not less than
1.times.10.sup.18 /cm.sup.3. The cap layer can make a leak current lowered
because of a higher band gap. It is effective that the optical wave guide
layer and cap layer are formed in the p-type region or the semiconductor
region of p-conductivity side.
The third to the fifth nitride semiconductor devices of the present
invention may be preferably formed on a nitride semiconductor substrate.
The nitride semiconductor substrate can be prepared by a method of growing
a nitride semiconductor layer on an auxiliary substrate made of a material
other than nitride semiconductor, forming a protective film on the grown
nitride semiconductor layer so as to expose partially the surface thereof,
thereafter growing a nitride semiconductor layer to cover the protective
film from the exposed nitride semiconductor layer. The nitride
semiconductor substrate can make it better the crystallinity of every
layers in the third to the fifth nitride semiconductor device. In this
case, the auxiliary substrate and the protective film can be removed from
the nitride semiconductor substrate before or after the device layers are
formed on the nitride semiconductor substrate. The cap layer had better be
formed in the p-type region.
In a preferred embodiment of the LD device according to the present
invention, wherein p-side cladding layer is a super lattic
