Scanning conversion circuit Number:7,092,032 from the United States Patent and Trademark Office (PTO) owispatent

Title: Scanning conversion circuit

Abstract: A scanning conversion circuit which interpolates an image signal of an interpolation scanning line from an input image signal Vi of a scanning line adjacent to the upside or downside of an interpolation scanning line to output an image signal Vp doubled in scanning line, and which comprises a directivity detection unit (50) for detecting, in order to prevent an unnatural view of a slant line when a moving image is displayed with an image signal Vp, a direction having the strongest correlation out of a plurality of directions, including a vertical direction and a slant direction, centering on an interpolation point of an interpolation scanning line based on the signal Vi, and an average value computing unit (56) for computing an average value of image signals at two sampling points corresponding to the detected direction out of a plurality of sampling points in an upside scanning line and downside scanning line. When the directivity detection unit (50) judges that a slant-direction correlation is the strongest, the average value computing unit (56) computes an average value of image signals at corresponding and slant-direction two sampling points in an upside scanning line and downside scanning line to process the value as an image signal of an interpolation scanning line, thereby permitting a proper interpolation processing an a slant line in a moving image.

Patent Number: 7,092,032 Issued on 08/15/2006 to Matsunaga,   et al.

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Inventors:	Matsunaga; Seiji (Kanagawa-ken, JP), Onodera; Junichi (Kanagawa-ken, JP), Ikeda; Makoto (Kanagawa-ken, JP)
Assignee:	Fujitsu General Limited (Kanagawa-Ken, JP)
Appl. No.:	10/182,500
Filed:	September 22, 2000
PCT Filed:	September 22, 2000
PCT No.:	PCT/JP00/06539
371(c)(1),(2),(4) Date:	July 26, 2002
PCT Pub. No.:	WO01/56282
PCT Pub. Date:	August 02, 2001

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Foreign Application Priority Data

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Jan 28, 2000 [JP]			2000-020559
Jan 28, 2000 [JP]			2000-020563

Current U.S. Class:	348/452 ; 348/448
Current International Class:	H04N 7/01 (20060101)
Field of Search:	348/452,448,458,700,701

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References Cited [Referenced By]

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U.S. Patent Documents

	5786862		July 1998		Kim et al.
	5796437		August 1998		Muraji et al.
	5936676		August 1999		Ledinh et al.
	6122017		September 2000		Taubman
	6181382		January 2001		Kieu et al.
	6215525		April 2001		Fujino
	6288745		September 2001		Okuno et al.
	6421090		July 2002		Jiang et al.

Foreign Patent Documents

	2-312381		Dec., 1990		JP
	3-108889		May., 1991		JP
	4-343590		Nov., 1992		JP
	4-364685		Dec., 1992		JP
	4-366894		Dec., 1992		JP
	5-153562		Jun., 1993		JP
	11-331773		Nov., 1999		JP

Primary Examiner: Kostak; Victor R.
Attorney, Agent or Firm: Flynn, Thiel, Boutell & Tanis, P.C.

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Claims

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The invention claimed is:

1. A scanning conversion circuit for outputting a video signal with a scanning line doubled by interpolating a video signal of an interpolated scanning line from an input signal of an upper scanning line disposed adjacent above the interpolated scanning line and a lower scanning line disposed adjacently below the interpolated scanning line, the scanning conversion circuit comprising: a direction detecting section for detecting the best correlating direction out of (2n+1) directions, n being an integer of at least 1, including a vertical direction, a direction inclining leftward and a direction inclining rightward, centering around an interpolation point of said interpolated scanning line on the basis of the input video signals of a plurality of sampling points on the upper scanning line and the lower scanning line, the direction detection section comprising: a first subtracting section for obtaining the luminance level differences of the sampling points on the upper scanning line and the lower scanning line in a plurality of directions including the vertical direction and the inclined directions centering around the interpolation point of the interpolated scanning line, the first subtracting section comprising (2n+1) units of subtracters that each obtain the luminance level differences of the sampling points on the upper scanning line and the lower scanning line in the (2n+1) directions including the vertical direction and the direction inclining leftward and the direction inclining rightward centering around the interpolation point of the interpolated line on the basis of the video signals of the upper scanning line and the lower scanning line, a first absolute value computing section for obtaining the absolute values of the luminance level differences obtained by the first subtracting section, the first absolute value computing section comprising: (2n+1) units of absolute value computers for obtaining absolute values of the luminance level differences obtained by each of said (2n+1) units of subtracters, a first relative detecting section for comparing the absolute values obtained by the first absolute value computing section and detecting the best correlating direction, the first relative detecting section comparing the (2n+1) absolute values respectively obtained by the (2n+1) units of the absolute value computers and outputting a first signal indicating direction corresponding to the best correlating direction out of the (2n+1) directions such that a corresponding direction is indicated when a smallest absolute value exists, a gate signal is output when the absolute values are equal, and the vertical direction is indicated when another condition exists, a second subtracting section for obtaining 2n luminance level differences between (2n+1) sampling points of the upper scanning line and the adjacent sampling points, a third subtracting section for obtaining 2n luminance level differences between (2n+1) sampling points on the lower scanning line and adjacent sampling points, a second absolute value computing section for obtaining 2n absolute values of the 2n luminance level differences obtained by the second subtracting section, a third absolute value computing section for obtaining 2n absolute values of the 2n luminance level differences obtained by the third subtracting section, a second relative detecting section for comparing the 2n absolute values obtained by the second absolute value computing section, detecting whether a smallest value exists and outputting a second signal indicating direction, a third relative detecting section for comparing the 2n absolute values obtained by the third absolute value computing section, detecting whether a smallest value exists and outputting a third signal indicating direction, and a gate circuit having an opening and closing operation controlled by the gate signal outputted from the first relative detecting section and outputting a fourth signal indicating direction corresponding to the second and the third signals indicating direction; and an average value computing section for computing an average value of the video signals of two sampling points corresponding to the best correlating direction detected by said direction detecting section out of a plurality of the sampling points on the upper scanning line and the lower scanning line to thereby obtain the video signal of the interpolation point of the interpolated scanning line.

2. The scanning conversion circuit according to claim 1, wherein the direction detecting section further comprises: a first selecting section for selecting a video signal of one sampling point corresponding to the first signal indicating direction of the direction detecting section out of the (2n+1) sampling points of the upper scanning line, and a second selecting section for selecting a video signal of one sampling point corresponding to the first signal indicating direction out of the (2n+1) sampling points of the lower scanning line, and wherein the average value computing section comprises: an adding section for adding the signals selected by said first and second selecting sections, and a constant multiplier for multiplying the output signal of the adding section by the coefficient of 1/2 for obtaining the video signal of the interpolation point of the interpolated scanning line.

3. The scanning conversion circuit according to claim 1, wherein the average value computing section comprises: an adding section for adding video signals of two sampling points in each of the (2n+1) directions centering around the interpolation point of the interpolated scanning line, a constant multiplier for multiplying each of the (2n+1) output signals of the adding section by the coefficient 1/2, and a selecting section for selecting one output signal out of the (2n+1) output signals of said constant multiplier for obtaining the video signal for the interpolated scanning line on the basis of the detected direction indicating signal of the direction detecting section for obtaining the video signal of the interpolation point of the interpolated scanning line.

4. The scanning conversion circuit according to claim 1, wherein the direction detecting section further comprises: a subtracter corresponding to the vertical direction connected so that a predetermined value is subtracted from the output signal corresponding to the vertical direction out of the (2n+1) output signals of the first constant multiplier to thereby output the result to the first relative detecting section.

5. The scanning conversion circuit according to claim 1, wherein the first relative detecting section compares the (2n+1) absolute values obtained by the first absolute value computing section to output a signal indicating the corresponding detected direction out of the (2n+1) directions when a smallest value does exist, while outputting the detected direction indicating signal indicating the vertical direction when a smallest value does not exist.

6. The scanning conversion circuit according to claim 1, wherein the first relative detecting section compares the (2n+1) absolute values obtained by the first absolute value computing section to output a signal indicating the corresponding one direction out of the (2n+1) directions when a smallest value does exist, while outputting the signal indicating the vertical direction when a smallest value does not exist.

7. The scanning conversion circuit according to claim 4, wherein the first relative detecting section compares the (2n+1) absolute values obtained by the first absolute computing section to output the signal indicating corresponding one direction out of the (2n+1) directions when a smallest value does exist, to output the gate signal when the absolute values are equal, and to output the signal indicating the vertical direction when another condition exists.

8. The scanning conversion circuit according to claim 1, wherein the direction detecting section further comprises a second constant multiplying section for multiplying each of the 2n absolute values obtained by said second absolute value computing section by the coefficient of 1/2.sup.v, v being an integer of at least 1, and outputting the result to said second relative detecting section, the second constant multiplying section being inserted between the second absolute value computing section and the second relative detecting section, and a third constant multiplying section for multiplying each of the 2n absolute values obtained by the third absolute value computing section, the third constant multiplying section being inserted between the third absolute value computing section and the third relative detecting section.

9. The scanning conversion circuit according to claim 7, further comprising: a second constant multiplying section for multiplying each of the 2n absolute values obtained by said second absolute value computing section by the coefficient of 1/2.sup.v, v being an integer of at least 1, and outputting the result to said second relative detecting section, the second constant multiplying section being inserted between the second absolute value computing section and the second relative detecting section, and a third constant multiplying section for multiplying each of the 2n absolute values obtained by the third absolute value computing section and outputting the result to said third relative detecting section, the third constant multiplying section being inserted between the third absolute value computing section and the third relative detecting section.

10. The scanning conversion circuit according to claim 1, wherein n=1.

11. The scanning conversion circuit according to claim 6, wherein n=1.

12. The scanning conversion circuit according to claim 7, wherein n=1.

13. The scanning conversion circuit according to claim 4, wherein n=1.

14. The scanning conversion circuit according to claim 5, wherein n=1.

15. A scanning conversion circuit for detecting movement of an image on the basis of an input video signal for interlace scanning, for obtaining a video signal of an interpolation point by combining a video signal for interfield interpolation processing with a video signal for in-field interpolation processing to obtain the video signal of the interpolation point according to a movement detection signal, and for outputting a video signal for progressive scanning through a double speed conversion processing of the video signal of the interpolation point and the input video signal, the scanning conversion circuit comprising: a direction detecting section for detecting the best correlating direction out of (2n+1) directions, n being an integer of at least 1, including the vertical direction and the direction inclining leftward and the direction inclining rightward centering around the interpolation point in an interpolated scanning line on the basis of a plurality of sampling points of the upper scanning line and the lower scanning line adjacent to the interpolated scanning line, the direction detecting section comprising: a first subtracting section for obtaining luminance level differences of the sampling points on the upper scanning line and the lower scanning line in a plurality of directions including the vertical direction and the inclined directions centering around the interpolation point of the interpolated scanning line, the first subtracting section comprising (2n+1) units of subtracters for obtaining the luminance level differences of the sampling points on the upper scanning line and the lower scanning line in the (2n+1) directions, n being an integer of at least 1, including the vertical direction and the direction inclining leftward and the direction inclining rightward centering around the interpolation point of the interpolated line on the basis of the video signals of the upper scanning line and the lower scanning line, a first absolute value computing section for obtaining the absolute values of the luminance level differences obtained by the first subtracting section, the first absolute value computing section comprising (2n+1) units of absolute value computers for obtaining absolute values of the luminance level differences obtained by each of said (2n+1) units of subtracters, a first relative detecting section for comparing the absolute values obtained by the first absolute value computing section and detecting the best correlating direction, the first relative detecting section comparing the (2n+1) absolute values respectively obtained by the (2n+1) units of the absolute value computers and outputting a first signal indicating direction corresponding to the best correlating direction out of the (2n+1) directions such that a corresponding direction is indicated when a smallest absolute value exists, a gate signal is output when the absolute values are equal, and the vertical direction is indicated when another condition exists, a first constant multiplying section, disposed between the (2n+1) units of absolute value computers of the furst absolute value computing section and the first relative detecting section, for multiplying the absolute value obtained by each said absolute value computer by the coefficient of 1/2.sup.m, m being an integer of at least 1, and outputting the resulting product to the first relative detecting section, a second subtracting section for obtaining 2n luminance level differences between (2n+1) sampling points of the upper scanning line and the adjacent sampling points, a third subtracting section for obtaining 2n luminance level differences between (2n+1) sampling points on the lower scanning line and adjacent sampling points, a second absolute value computing section for obtaining 2n absolute values of the 2n luminance level differences obtained by the second subtracting section, a third absolute value computing section for obtaining 2n absolute values of the 2n luminance level differences obtained by the third subtracting section, a second relative detecting section for comparing the 2n absolute values obtained by the second absolute value computing section, detecting whether a smallest value exists and outputting a second signal indicating direction, a third relative detecting section for comparing the 2n absolute values obtained by the third absolute value computing section, detecting whether a smallest value exists and outputting a third signal indicating direction, and a gate circuit having an opening and closing operation controlled by the gate signal outputted from the first relative detecting section and outputting a fourth signal indicating direction corresponding to the second and the third signals indicating direction; and an average computing section for computing an average value of the video signals of two sampling points corresponding to the best correlating direction detected by said direction detection section out of a plurality of sampling points on the upper scanning line and the lower scanning line for obtaining the video signal for the in-field interpolation processing.

16. The scanning conversion circuit according to claim 15, wherein the direction detecting section further comprises: a first selecting section for selecting a video signal of one sampling point out of the (2n+1) sampling points of the upper scanning line on the basis of the first signal indicating direction of the direction detecting section, a second selecting section for selecting a video signal of one sampling point out of the (2n+1) sampling points of the lower scanning line on the basis of the first signal indicating direction of the direction detecting section, and a constant multiplier for multiplying the output signal of the adding section by the coefficient 1/2 for obtaining the video signal for the interpolation point of the in-field interpolation processing.

17. The scanning conversion circuit according to claim 15, wherein the average value computing section comprises: an adding section for adding video signals of two sampling points in each of the (2n+1) directions centering around the interpolation point of the interpolated scanning line, a constant multiplier for multiplying each of the (2n+1) output signals of the adding section by the coefficient 1/2, and a selecting section for selecting one output signal out of the (2n+1) output signals for obtaining the video signal of the interpolation point for the in-field interpolation processing on the basis of the first signal indication direction of the direction detecting section.

18. A scanning conversion circuit for outputting a video signal with a scanning line doubled by interpolating video signal of an interpolated scanning line from an input signal of upper and lower scanning lines disposed adjacently above and below, respectively, the interpolated scanning line, the scanning conversion circuit comprising: a direction detecting section for detecting the best correlating direction out of (2n+1) directions, n being an integer of at least 1, including the vertical direction and the direction inclining leftward and the direction inclining rightward centering around an interpolation point of said interpolated scanning line on the basis of the input video signals of a plurality of sampling points on the upper scanning line and the lower scanning line, the direction detecting section comprising: a first subtracting section for obtaining luminance level differences of the sampling points on the upper scanning line and the lower scanning line in a plurality of directions including the vertical direction and the inclined directions centering around the interpolation point of the interpolated scanning line, the first subtracting section comprising (2n+1) units of subtracters for obtaining luminance level differences of the sampling points on the upper scanning line and the lower scanning line in each of the (2n+1) directions, including the vertical direction and the direction inclining leftward and the direction inclining rightward centering around the interpolation point of the interpolated line on the basis of the video signals of the upper scanning line and the lower scanning line, a first absolute value computing section for obtaining absolute values of the luminance level differences obtained by the first subtracting section, the first absolute value computing section comprising (2n+1) units of absolute value computers for obtaining absolute values of the luminance level differences obtained by each of said (2n+1) units of subtracters, a first relative detecting section for comparing the absolute values obtained by the first absolute value computing section and detecting the best correlating direction, wherein the first relative detecting section compares the (2n+1) absolute values obtained by the first absolute value computing section, outputs a signal indicating a corresponding direction out of the (2n+1) directions when a smallest absolute value exists, outputs a gate signal when the absolute values are equal, and outputs a signal indicating the vertical direction when another condition exists, and a gate circuit having an opening and closing operation controlled by the gate signal outputted from the first relative detecting section to supply a signal indicating the best correlation direction; and an average value computing section for computing an average value of the video signals of the two sampling points corresponding to the direction detected by said direction detecting section out of a plurality of the sampling points on the upper scanning line and the lower scanning line to thereby obtain a video signal of the interpolation point of the interpolated scanning line.

19. The scanning conversion circuit according to claim 18, wherein the direction detecting section further comprises: a second subtracting section for obtaining 2n luminance level differences between (2n+1) sampling points of the upper scanning line and the adjacent sampling points, a third subtracting section for obtaining 2n luminance level differences between (2n+1) sampling points on the lower scanning line and adjacent sampling points, a second absolute value computing section for obtaining 2n absolute values of the 2n luminance level differences obtained by the second subtracting section, a third absolute value computing section for obtaining 2n absolute values of the 2n luminance level differences obtained by the third subtracting section, a second relative detecting section for comparing the 2n absolute values obtained by the second absolute value computing section, detecting whether a smallest value exists and outputting a second signal indicating direction, and a third relative detecting section for comparing the 2n absolute values obtained by the third absolute value computing section, detecting whether a smallest value exists, and outputting a third signal indicating direction, wherein the gate circuit selectively outputs a fourth signal indicating direction based upon the second and the third signals indicating direction.

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Description

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TECHNICAL FIELD

The present invention relates to a scanning conversion circuit designed for outputting a video signal (e.g., a video signal for progressive scanning) whose number of scanning lines is doubled by interpolating the video signal of the interpolated scanning line from the input video signal of the upper adjacent scanning line and the lower adjacent scanning line to the interpolated scanning line.

For instance, in the case of digital video signal processing in a display unit using a PDP (Plasma Display Panel) or LCD (Liquid Crystal Display) panel as the display panel, the present invention is applicable in converting a video signal for interlace scanning to a video signal for progressive scanning.

BACKGROUND ART

Conventionally, as seen from FIG. 1, a scanning conversion circuit comprises a 262H delayer 12, a 1H delayer 14, a 262H delayer 16, adders 18 and 20, a constant multiplier 22, coefficient-variable constant multipliers 24 and 26, a movement detecting section 28 and a double-speed converting section 36.

The movement detecting section 28 detects the movement of the image on the bases of the video signal Vi (e.g., video signal according to the NTSC system) for the interlace scanning inputted to the input terminal 10, and the signal delayed by 525H (1H represents 1 line, and 525H is equivalent to the delay by 1 frame) by means of the 262H delaying section 12, 1H delaying section 14 and 262H delaying section 16. More specifically, the signals of the detected movement (1-K) and K, which become K=0 in the case of the moving image and K=1 in the case of the still image.

The adder 18 adds the output signal of the 262H delayer and the output signal of the 1H delayer 14, and the constant multiplier 22 multiplies the output signal of the adder 18 by the coefficient 1/2. Therefore, the constant multiplier 22 outputs the video signal obtained by averaging the video signals of the upper scanning line and the lower scanning line to the interpolated scanning line. This video signal corresponds to the video signal for the in-field interpolation processing.

One of the coefficient-variable constant multipliers 24 and 26 multiplies the video signal, which has been delayed by 1 field by means of the 252H delaying section (the video signal for interfield interpolation processing), by the signal detected by the movement detecting section 28 and outputs the result, while the other constant multiplier 26 multiplies the output signal of the constant multiplier 22 by the detected signal (1-K) from the movement detecting section 28 to output the result.

The adder 20 adds the output signal of the constant multiplier 24 and the output signal of the constant multiplier 26 to obtain the video signal (the video signal of the interpolation signal) for the interpolated scanning line.

Therefore, since K=0 in the case of a moving image, the coefficients of the constant multipliers 24 and 26 becomes 0 and 1, so that only the video signal, obtained by averaging the video signals of the upper adjacent scanning line and the lower adjacent scanning line, is outputted from the adder 20, and since K=1 in the case of the still image, the coefficients of the constant multipliers 24 and 26 are reversed to become 1 and 0, whereby only the video signal preceding by 1 field is outputted from the adder 20.

For instance, in the case of a moving image, the video signal of the interpolation point Np of the interpolated scanning line becomes the signal obtained by averaging the video signals of the sampling points Sp and Sp in the vertical direction from the upper and lower adjacent scanning lines, while, in the case of a still image, as indicated by the arrow followed by the dotted line, the signal becomes the video signal of the sampling point Sp corresponding to the field (n-1) preceding by 1 field.

The double speed converting section 36 is capable of performing double speed conversion processing by using a double-speed clock in reading out the video signal Vi, delayed by 263H by means of the 262H delaying section 12 and the 1H delaying section 14, and the output signal of the adder 20, which have been stored in the memory, to output the video signal Vp for progressive scanning.

The double speed converting section 36, for example, though not limited to this example, comprises a first memory (e.g., a line memory) for storing the video signal outputted from the 1H delaying section 14 and a second memory (e.g., a line memory) for storing the video signal of the interpolated scanning line outputted from the adder 20, whereby the video signal Vp for progressive scanning is outputted from the output terminal 38 by reading out the data stored in the first and the second memories alternately for each 1 line by using the double-speed clock.

However, the conventional scanning conversion circuit shown in FIG. 1 has a drawback in that the inclined lines in the moving image appear unnatural.

For instance, when the inclined line 40 having 2-dot width appears in the moving image, the two interpolation points Np1 and Np2 included in the inclined line 40 of the interpolated scanning line becomes the signal obtained by averaging the video signals of the sampling points Spb and Spc of the upper scanning line and the sampling points Spe and Spf of the lower scanning line. In consequence, the interpolation points Np1 and Np2 have a half-lighted state (gray color between block color and white color) despite being required to have a lighted state (white color), and the outer two interpolation points Np3 and Np4 have a half-lighted state despite being required to have a non-lighted state (block color), thereby causing a problem that these interpolation points look unnatural.

The present invention is made in consideration of the above-mentioned problem and is intended to provide a scanning conversion circuit capable of preventing the vertical line and inclined lines in the moving image from appearing unnatural and reproducing a high-quality image when the moving image is displayed on the basis of a video signal (e.g., a video signal for progressive scanning) which has undergone scanning conversion processing.

DISCLOSURE OF THE INVENTION

In the present invention, the scanning conversion circuit is designed for outputting a video signal whose number of scanning line is doubled by incorporating the video signal of the interpolated scanning line from the input video signals of the upper adjacent scanning line and the lower scanning line respectively adjacent to the interpolated scanning line, and comprises a direction detecting section for detecting the best correlating direction out of a plurality of the directions including the vertical direction and the inclined directions centering around the interpolation point of the interpolated scanning line, and an average value computing section for computing the average value of the video signals of the two sampling points corresponding to the direction detected by the direction detecting section out of a plurality of sampling points on the upper scanning line and the lower scanning line to obtain the video signal of the interpolated scanning line.

With the scanning conversion circuit designed as discussed above, when the direction detecting section finds that the inclined direction is best correlating, the average value computing section computes the average value of the video signals for the two sampling points corresponding to the inclined direction out of a plurality of the sampling points on the upper scanning line and the lower scanning line and processed as the video signal of the interpolated scanning line, whereby optimal interpolation processing can be made for the inclined lines in the moving image.

Further, when the direction detecting section finds that the vertical direction is best correlating, the average value computing section computes the average value of the video signals of two sampling points corresponding to the vertical direction out of a plurality of sampling points on the upper scanning line and the lower scanning line, and the average value is processed as being the video signal of the interpolated scanning line, whereby the optimal interpolation processing can be made for the inclined lines in the moving image.

In the present invention, the scanning conversion circuit, wherein the movement of the image is detected on the basis of the inputted video signal for interlace scanning; the video signal of the interpolation point is obtained by combining the video signal for the interfield interpolation processing and the video signal for the in-field interpolation processing on the basis of the movement detecting signal; the video signal for progressive scanning is outputted by subjecting the video signal of the interpolation point and the input video signal to the double speed conversion processing, comprises the direction detecting section for detecting the best correlating direction out of a plurality of directions including the vertical and inclined directions centering around the interpolation point of the interpolated scanning line on the bases of the input video signals of a plurality of interpolation points on the upper adjacent scanning line and the lower adjacent scanning line to the interpolated scanning line, and the average value computing section for computing the average value of the video signals of the two sampling points corresponding to the direction detected by the direction detecting section out of a plurality of sampling points on the upper scanning line and the lower scanning line.

With the scanning conversion circuit designed as discussed above, when the direction detecting section finds that the inclined direction (or the vertical direction) is best correlating, similarly to the case of the invention previously discussed, the optimal in-field interpolation processing can be made for the inclined line (or the vertical line) in the moving image.

Differing from the invention discussed previously, in the invention, in order for the interpolation processing of the vertical line and the lines inclined leftward and rightward centering around said vertical line to be made properly, the direction detecting section is designed to detect the best correlating direction out of (2n+1) directions (n being an integer of 1 or more) including the vertical direction and the lines inclining leftward and rightward centering around the interpolation point of the interpolated scanning line. In other words, the direction detecting section detects the best correlating direction out of the vertical direction and directions inclining leftward and rightward centering around the interpolation point, so that proper interpolation processing can be made for the vertical line and the lines inclining leftward and rightward in the moving image.

Differing from the previously discussed invention, the invention, in order to simplify the composition of the average value computing section, the average value computing section comprises a first selecting section for selecting a video signal for 1 sampling point out of the (2n+1) sampling points on the upper scanning line on the basis of the direction detecting signal from the direction detecting section, a second selecting section for selecting the video signal of 1 sampling point out of the (2n+1) sampling points on the lower scanning line on the basis of the direction detecting signal from the direction detecting section, an adding section for adding the signals selected by the first selecting section and the second selecting section, and a constant multiplier for multiplying the output signal from the adding section by the coefficient 1/2 to obtain the video signal of the interpolated scanning line (or the video signal for the in-field interpolation processing).

Differing from the invention discussed above, the invention, in order to simplify the composition of the average value computing section, the average value computing section comprises an adding section for adding the video signals of each 2 sampling points of (2n+1) directions centering around the interpolation point of the interpolated scanning line out of the (2n+1) sampling points on the upper scanning line and the lower scanning line, a constant multiplier for multiplying each of the (2n+1) output signals from the adding section, and a selecting section for selecting one output signal corresponding to the (2n+1) output signals of the constant multiplier as the video signal of the interpolated scanning line (or the video signal for in-field interpolation processing) on the basis of the signal of the detected direction from the direction detecting section.

Differing from the invention described above, in the invention, in order to simplify the composition of the direction detecting section, the direction detecting section comprises a first subtracting section for obtaining the luminance level differences sampling points on the upper scanning line and the lower scanning line with respect to a plurality of directions including the vertical direction and the inclined directions centering around the interpolation point of the interpolated scanning line on the basis of the video signals of a plurality of sampling points on the upper scanning line and the lower scanning line, a first absolute value computing section for computing the absolute values of the luminance level differences obtained by the first subtracting section, and a first relative detecting section for comparing a plurality of absolute values obtained by the first absolute value computing section to detect the best correlating direction. More specifically, the composition of the direction detecting section can be simplified by composing the direction detecting section with the first subtracting section, the first absolute value computing section and the first relative detecting section.

Differing from the invention described above, in the invention, in order not only to simplify the composition of the direction detecting section but also to enable interpolation processing for the vertical line and the lines inclined leftward and rightward centering around the vertical line to be made properly, the first subtracting section comprises the (2n+1) units of subtracters for obtaining the luminance level differences of the sampling points on the upper scanning line and the lower scanning line with respect to the (2n+1) directions (n being an integer of 1 or more) including the vertical direction and the inclined lines centering around the interpolation point of the interpolated scanning line on the bases of the video signals of the upper scanning line and the lower scanning line; the first absolute value computing section comprises the (2n+1) units of absolute value computers for obtaining the absolute value of the luminance level difference obtained by each of the (2n+1) units of subtracters; the first relative detecting section compares the (2n+1) absolute values obtained by the (2n+1) units of the absolute value computers to detect the best correlating direction; the average value computing section computes the average value of the video signals of the 2 sampling points corresponding to the direction detected by the first relative detecting section out of the (2n+1) sampling points on the upper scanning line and the lower scanning line.

Differing from the previously discussed invention, in the invention, in order to prevent the interpolation processing from being made improperly due to the noise when the luminance level differences of the sampling points on the upper scanning line and the lower scanning line with respect to the (2n+1) directions, the first constant multiplying section for multiplying absolute value obtained by each absolute value computer by the coefficient 1/2.sup.m (m being an integer of 1 or more) to output the result to the first relative detecting section is inserted between the (2n+1) units of absolute value computers constituting the first absolute value computing section and the first relative detecting section.

Differing from the previously discussed invention, in the invention, in order to precede the interpolation processing on the basis of the sampling point in the vertical direction when the absolute values of the luminance level differences of the sampling points on the upper scanning line and the downside scanning line in the (2n+1) directions are substantially equal, a vertical direction preceding subtracter for subtracting the set value from the output signal corresponding to the vertical direction out of the (2n+1) output signals of the first constant multiplying section to output the result to the first relative detecting section is provided.

Differing from the previously discussed invention, in the invention, in order to enable the interpolation processing to be made properly even when the smallest value is not existing in the absolute values of the luminance level differences of the sampling points on the upper scanning line and the lower scanning line in the (2n+1) directions, the first relative detecting section compares the (2n+1) absolute values, obtained by the first absolute value computing section, to output the signal corresponding to the detected one direction when the smallest value is existing, while outputting the signal for the detected vertical direction when the smallest value is not existing. In other words, the interpolation processing in the vertical direction is made to precede when the smallest value is not existing.

Differing from the invention discussed above, in the invention, in order to enable the interpolation processing to be made properly, even when the absolute values of the luminance level differences of the sampling points on the upper scanning line and the lower scanning line in the (2n+1) directions, the first relative detecting section compares the (2n+1) absolute values, obtained by a first absolute value computing section, to output the detected signal for the corresponding one direction out of the (2n+1) directions when the smallest value is existing, to output the gate signal when the absolute values are equal, and to output the signal for the detected vertical direction when another condition is existing, while providing the second subtracting section for obtaining the luminance level differences between the (2n+1) sampling points on the upper scanning line and the adjacent 2n sampling points, a second absolute value computing section for obtaining the absolute values of the luminance level differences obtained by the second subtracting section, a third absolute value computing section for obtaining the absolute values of the luminance level differences obtained by the third subtracting section, a second relative detecting section for comparing the 2n absolute values obtained by the second absolute value computing section to determine whether the smallest value is existing, a third relative detecting section for comparing the 2n absolute values obtained by the third absolute value computing section to determine whether the smallest value is existing or not, and a gate circuit, whose opening and closing is controlled by the gate signal outputted from the first relative detecting section, for outputting the detecting signal of the direction corresponding to the signals detected by the second and the third relative detecting sections.

Differing from the invention described above, in the invention, in order to prevent the interpolation processing from being made improperly due to the noise when the absolute values of the luminance level differences of the sampling points on the upper scanning line and the lower scanning line in the (2n+1) directions, a second constant multiplying section for multiplying each of the 2n absolute values, obtained by a second absolute value computing section, by the coefficient 1/2.sup.v (v being an integer of 1 or more) to output the result to a second relative detecting section is inserted between the second absolute value computing section and the second relative detecting section, and a third relative detecting section for multiplying each of the 2n absolute values by the coefficient 1/2.sup.v to output the result to the third relative detecting section is inserted between the third absolute value computing section and the third relative detecting section.

Differing from the invention described above, in the invention, in order to simplify the composition of the circuit (especially, the composition of the direction detecting section), the n in (2n+1) is set to 1. For instance, the direction detecting section for detecting the best correlating direction out of the (2n+1) directions is composed of the direction detecting section (where n=1) for detecting the most correlating direction out of the three directions, namely the vertical direction, direction inclining leftward at 45.degree. and the direction inclining rightward at 45.degree..

Differing from the invention previously discussed, in the invention, the n in (2n+1) is set to 1.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a block diagram illustrating the prior art.

FIG. 2 illustrates the function given in FIG. 1, the in-field interpolation processing and the interfield interpolation processing.

FIG. 3 illustrates the function given in FIG. 1 and the in-field interpolation processing of the inclined line in the moving image.

FIG. 4 is a block diagram illustrating the scanning conversion circuit as the first embodiment of the present invention.

FIG. 5 is a block diagram specifically illustrating the direction detecting section given in FIG. 4.

FIG. 6 illustrates the functions given in FIG. 4 and FIG. 5 and wherein (a) is a diagram for explaining the in-field interpolation processing and (b) a diagram for explaining the interfield interpolation processing.

FIG. 7 illustrates the functions given in FIG. 4 and FIG. 5 and the in-field interpolation processing of the inclined line in the moving image.

FIG. 8 is a block diagram illustrating the scanning conversion circuit as the second embodiment of the present invention.

FIG. 9 is a block diagram illustrating the scanning conversion circuit as the third embodiment of the present invention.

BEST MODE FOR CARRYING OUT THE INVENTION

The scanning conversion circuit as the first embodiment of the present invention will be described in the following referring to the accompanying drawings. For the convenience of explanation, the video signal Vi to be outputted to the input terminal is the video signal of the NTSC system.

In FIG. 4, the numerals 42, 44, 46 and 48 represent D-delayers; 50, the direction detecting section; 52, the first selecting section; 54, the second selecting section; the first and the second selecting sections 52 and 54, the adder 18 and the constant multiplier 22 constitute the average value computing section 56.

The D-delayers 42 and 44, for example, comprises the D-type flip-flop circuit and outputs the output signals of the 1H delayer 14 by sequentially delaying by 1 dot.

The D-delayers 46 and 48, for example, comprises the D-type flip-flop circuit and outputs the output signals of the 262H delayer 12 sequentially delaying by 1 dot.

The direction detecting section 50 detects the best correlating direction out of the three directions, namely the vertical direction, the direction inclining leftward at 45.degree. and the direction inclining rightward at 45.degree., centering around the interpolation point of the interpolated scanning line out of the sampling points on the upper scanning line and the lower scanning line adjacent respectively to the interpolated scanning line, on the basis of each of the output signals C, B and A of the 1H delayer 14 and the D-delayer 42 and 44, and each of the output signals F, E and D of the 262H delayer 12 and D-delayers 46 and 48.

The direction detecting section 50 is composed as specifically illustrated in FIG. 5.

As shown in FIG. 5, 11.sub.1 11.sub.3 are 3 units of the first subtracters constituting the first subtracting section; 13.sub.1 13.sub.2 are 2 units of the second subtracters constituting the second subtracting section; 15.sub.1 15.sub.2 are 2 units of the third subtracters constituting the third subtracting section. 17.sub.1 17.sub.3 are 3 units of the first absolute value computers constituting the first absolute value computing section; 19.sub.1 19.sub.2 are 2 units of the second absolute value computers constituting the second absolute value computing section; 21.sub.1 21.sub.2 are 2 units of the third absolute value computers constituting the third absolute value computing section.

23.sub.1 23.sub.3 are 3 units of the first constant multipliers constituting the first constant multiplying section; 25.sub.1 25.sub.2 are 2 units of the second constant multipliers constituting the second constant multiplying section; 27.sub.1 27.sub.2 are 2 units of the third constant multipliers constituting the third constant multiplying section.

29 represents the vertical direction preceding subtracter; 31, 33 and 37 correspond to the first, the second and the third relative detecting sections respectively; 39 and 41 are the first and the second gate circuits.

The first subtracters 11.sub.1, 11.sub.2 and 11.sub.3 compute the differences between each of the output signals A, B and C of the D-delayers 44 and 42 and each of the output signals F, E and D of the 262H delayer 12, the D-delayer 46 and 48 to obtain the luminance level differences of the sampling points on the upper scanning line and the lower scanning line in the direction inclining leftward at 45.degree. (hereinafter referred to as (-45.degree.) direction), the vertical direction (hereinafter referred to as (+90.degree.) direction and the direction inclining rightward at 45.degree. (hereinafter referred to as (+45.degree.) direction).

The second subtracters 13.sub.1 and 13.sub.2 compute the differences between the output signals D and E and the output signals E and F to obtain the luminance level differences of the sampling points on the lower scanning line.

The third subtracters 15.sub.1 and 15.sub.2 compute the differences between the output signals A and B and the output signals B and C to obtain the luminance level differences of the sampling points on the upper scanning line.

The first absolute value computers 17.sub.1, 17.sub.2 and 17.sub.3 respectively compute the absolute values of the differences obtained by the first subtracters 11.sub.1, 11.sub.2 and 11.sub.3; the second absolute value computers 19.sub.1 and 19.sub.2 respectively compute the absolute values of the differences obtained by the second subtracters 13.sub.1 and 13.sub.2; the third absolute value computers 21.sub.1 and 21.sub.2 respectively compute the absolute values of the differences obtained by the third subtracters 15.sub.1 and 15.sub.2.

The first constant multipliers 23.sub.1, 23.sub.2 and 23.sub.3 respectively multiply the absolute values obtained by the first absolute value computers 17.sub.1, 17.sub.2 and 17.sub.3 by the coefficient 1/2.sup.m to output the signals a, b0 and c; the second constant multipliers 25.sub.1 and 25.sub.2 respectively multiply the absolute values obtained by the second absolute value computers 19.sub.1 and 19.sub.2 by the coefficient 1/2.sup.v to output the signals d and e; the third constant multipliers 27.sub.1 and 27.sub.2 respectively multiply the absolute values obtained by the third absolute value computers 21.sub.1 and 21.sub.2 by the coefficient 1/2.sup.v to output the signals f and g.

The first constant multipliers 23.sub.1, 23.sub.2 and 23.sub.3 are, for example, respectively composed of the m-stage shift registers; the second constant multipliers 25.sub.1 and 25.sub.2, and the third constant multipliers 27.sub.1 and 27.sub.2, are, for example, respectively composed of the v-stage shift registers.

The subtracter 29 subtracts the predetermined value S from the output signal b0 of the first constant multiplier 23.sub.2 to output the resulting signal b.

The first relative detecting section 31 compares the output signals a, b and c to detect the (-45.degree.) direction when a is the smallest value (a<b, a<c), to detect the (+90.degree.) direction when b is the smallest value (b<a, b<c), to detect the (+45.degree.) when c is the smallest value (c<a, c<b), to output the gate signal (e.g., H-level signal) when a=b=c and to detect the (+90.degree.) when other conditions occur (e.g., a=b<c) respectively as being the best correlating direction.

The relative detecting section 33 compares the output signals d and e to output the signal (-45.degree.) when d<e, to output the signal (+45.degree.) when e<d, and to output the signal (+90.degree.) when another condition is existing respectively as being the signal indicating the correlativity among the adjacent sampling points on the lower scanning line.

The third relative detecting section 37 compares the output signals f and g to output the signal (+45.degree.).sub.2 when f<g, to output the signal (-45.degree.).sub.2 when g<f, and to output the signal (+90.degree.) when another condition is existing as being the signals respectively indicating the correlativity among the adjacent sampling points on the upper scanning line.

The first gate circuit 39 comprises the AND gates 43, 45 and 47, each of which opens when the gate signal from the first relative detecting section 31 is H-level (corresponding to a=b=c) and closes when the gate signal is L-level (other condition than a=b=c).

The AND gate 43 outputs the signal (-45.degree.) corresponding to the best correlating direction when the gate signal from the first relative detecting section is H-level and when the signal (-45.degree.).sub.1 and the signal (-45.degree.).sub.2 are outputted from the second and the third relative detecting sections 33 and 37 respectively.

The AND gate 45 outputs the signal corresponding to (+45.degree.) direction as being the best correlating direction when the gate signal from the first relative detecting section 31 is H-level, and when the second and the third relative detecting sections 33 and 37 output the signal (+45.degree.).sub.1 and (+45.degree.).sub.2 respectively.

The AND gate 47 outputs the signal corresponding to (+90.degree.) as being the best correlating direction when the gate signal from the first relative detecting section 31 is H-level, and when the signal (+90.degree.).sub.1 and the signal (+90.degree.) are outputted respectively from the third relative detecting sections 33 and 37.

The second gate circuit 41 comprises the OR gates 49, 51 and 53.

The OR gate 49 outputs the OR signal, based on the signals outputted from the first relative detecting section 31 and the AND gate 43 respectively corresponding to the (-45.degree.) direction, as being the best correlating direction.

The OR gate 51 outputs the OR signal, based on the signals outputted from the first relative detecting section 32 and the AND gate 47 corresponding to the (+90.degree.) direction, as being the best correlating direction.

The OR gate 53 outputs the OR signal, based on the signals outputted from the first relative detecting section and the AND gate 45 corresponding to the (+45.degree.) direction, as being the best correlating direction.

Returning to FIG. 4, the first selecting section 52 selects the video signal of the corresponding one sampling point out of the signals outputted from the 1H delayer 14 and the D-delayers 42 and 44 corresponding to the three sampling points (pixel points) on the upper scanning line, on the basis of the detected direction indicating signal of the direction detecting section 50.

The second selecting section 54 selects the video signal of the corresponding 1 sampling point out of the signals outputted from the 262H delayer 12 and the D-delayers 46 and 48 corresponding to the three sampling points on the lower scanning line, on the basis of the detected direction indicating signal of the direction detecting section 50.

The adder 18 adds the output signal of the first selecting section 52 and the output signal of the second selecting section 54, and the constant multiplier 22 multiplies the output signal of the adder 18 by the coefficient 1/2 to output the result as being the signal for the in-field interpolation processing.

Next, the functions given in FIG. 4 and FIG. 5 will be described referring with FIG. 6 and FIG. 7.

(1) The video signal Vi of the NTSC system inputted to the input terminal 10 is delayed by 1 frame +1 dot by means of the 262H delayer 12, 1H delayer 14, 262H delayer 16 and D-delayer 35 and inputted to the constant multiplier 24 as being the video signal for the interfield interpolation processing.

For instance, as indicated by an arrow in FIG. 6(b), with respect to the interpolation point Np on the interpolated scanning line of the field (n), the video signal of the sampling point Sp at the predetermined position on the scanning line of the field (n-1) corresponding to the field preceding by 1 field is inputted, as being the video signal for the interfield interpolation processing, to the constant multiplier 24.

(2) The signal C, obtained by delaying the input video signal by 1 dot by means of the 262H delayer 12 and the 1H delayer, the signal B further delayed by 1 dot by means of the D-delayer 42, the signal A further delayed by 1 dot by means of the D-delayer 44, the signal F obtained by delaying the input video signal Vi by 262H by means of the 262H delayer 12, the signal E obtained by further delaying by 1 dot by means of the D-delayer 46, and the signal D obtained by delaying by 1 dot by means of the D-delayer 48, are inputted to the direction detecting section 50. Then, with respect to the three directions, namely the vertical direction, the direction inclining leftward at 45.degree. and the direction inclining rightward at 45.degree., the direction detecting section 50 obtains and compares the luminance level differences between the corresponding sampling points Spb, Spa and Spc on the upper scanning line and the corresponding sampling points Spe, Spf and Spd on the lower scanning line to detect the smallest value (i.e., the best correlating direction).

Next, the process through which the direction detecting section 50, previously discussed in (2), detects the best correlating direction will be detailed in (2-1) through (2-7).

(2-1) When the signals A, B, C, D, E and F are inputted respectively to the first subracters 11.sub.1, 11.sub.2 and 11.sub.3, the differences between the signals A, B and C and the signals F, E and D are obtained by the first subtracters 11.sub.1, 11.sub.2 and 11.sub.3 and the absolute values of the differences are obtained by the first absolute value computers 17.sub.1, 17.sub.2 and 17.sub.3.

The absolute values obtained by the first absolute value computers 17.sub.1 and 17.sub.3 are multiplied by the coefficient 1/2.sup.m (e.g., 1/4 where m=2) by means of the corresponding first constant multipliers 23.sub.1 and 23.sub.2 to suppress the effect of the noise component on the result of the detection and to be inputted, as the signals a and c, to the first relative detecting section 31.

The absolute value obtained by the first absolute value computer 17.sub.2 is multiplied by coefficient 1/2.sub.m to become the signal b0, the effect of the noise component on which is suppressed and from which the predetermined value S is subtracted by the subtracter 29 to be inputted,