Title: Semiconductor device, liquid crystal display device, EL display device, method for fabricating semiconductor thin film, and method for manufacturing the semiconductor device
Abstract: This invention concerns with a semiconductor device which is characterized in that the device is provided with a thin film transistor 40 having a polycrystalline semiconductor layer 11, the semiconductor layer 11 including a channel area 22, highly doped drain areas 24, 17 positioned on both sides of the channel area 22 and LDD areas 18a, 18b positioned between the channel area 22 and the highly doped drain areas 24, 17 and lower in dopant density than the highly doped drain areas 24, 17, wherein any diameter of the crystal 14 at least partly existing in the LDD area 18b is larger than the size of other crystals 15.
Patent Number: 6,906,346 Issued on 06/14/2005 to Nishitani, et al.
| Inventors:
|
Nishitani; Hikaru (Nara, JP);
Yamamoto; Makoto (Takarazuka, JP);
Taketomi; Yoshinao (San Diego, CA)
|
| Assignee:
|
Matsushita Electric Industrial Co., Ltd. (Osaka, JP)
|
| Appl. No.:
|
333793 |
| Filed:
|
July 24, 2001 |
| PCT Filed:
|
July 24, 2001
|
| PCT NO:
|
PCT/JP01/06365
|
| 371 Date:
|
April 21, 2003
|
| 102(e) Date:
|
April 21, 2003
|
| PCT PUB.NO.:
|
WO02/09192 |
| PCT PUB. Date:
|
January 31, 2002 |
Foreign Application Priority Data
| Jul 24, 2000[JP] | 2000-222275 |
| Oct 23, 2000[JP] | 2000-322301 |
| Current U.S. Class: |
257/70; 257/75; 257/347; 438/166; 438/486; 438/487; 257/E21.703; 257/E27.111; 257/E29.278; 257/E29.293; 257/E29.294; 257/E29.295; 438/166; 438/486; 438/487 |
| Intern'l Class: |
H01L 027/10.8; H01L029/04; H01L031/03.6 |
| Field of Search: |
257/66,69,70,75,347
438/142,166,479,486,487,489
|
References Cited [Referenced By]
U.S. Patent Documents
| 5663579 | Sep., 1997 | Noguchi.
| |
| 5851862 | Dec., 1998 | Ohtani et al.
| |
| 6117752 | Sep., 2000 | Suzuki.
| |
| Foreign Patent Documents |
| 62-193178 | Aug., 1987 | JP.
| |
| 3-116924 | May., 1991 | JP.
| |
| 3-292721 | Dec., 1991 | JP.
| |
| 5-21343 | Jan., 1993 | JP.
| |
| 5-326402 | Dec., 1993 | JP.
| |
| 6-151305 | May., 1994 | JP.
| |
| 6-163590 | Jun., 1994 | JP.
| |
| 7-86604 | Mar., 1995 | JP.
| |
| 11-64883 | Mar., 1999 | JP.
| |
| 11-274502 | Oct., 1999 | JP.
| |
| 2000-82669 | Mar., 2000 | JP.
| |
Primary Examiner: Sarkar; Asok Kumar
Attorney, Agent or Firm: McDermott Will & Emery LLP
Claims
1. A semiconductor device which is provided with a thin film transistor having
a polycrystalline semiconductor layer, the semiconductor layer including a channel
area, highly doped drain areas positioned on both sides of the channel area and
LDD or offset areas positioned between the channel area and the highly doped drain
areas, the LDD or offset areas being lower in dopant density than the highly doped
drain areas or being free of dopant;
wherein any diameter of the crystal at least partly existing in the LDD or offset
areas is larger than that of other crystals;
wherein the thin film transistor is formed in the vicinity of a pattern in a
specified shape which is made of a material higher in heat conductivity than the
semiconductor layer;
wherein the pattern is formed between the substrate and the semiconductor layer;
wherein the pattern is covered with an insulating undercoat film formed between
the substrate and the semiconductor layer;
wherein the undercoat film includes an upper undercoat film and a lower undercoat
film and the pattern is laid between the upper undercoat film and the lower undercoat
film; and
wherein the upper undercoat film is a porous layer and the lower undercoat film
is denser than the porous layer.
2. The semiconductor device according to claim 1, wherein the upper undercoat
film is thinner in thickness than the lower undercoat film.
3. A liquid crystal display device which is characterized in that the device
has pixels which are operated by a supply of a voltage via the semiconductor device
of claim 1.
4. An El display device which is characterized in that the device has pixels
which are operated by a supply of a voltage via the semiconductor display device
of claim 1.
5. A method of producing a semiconductor thin film which is characterized by
comprising the step of irradiating an amorphous or polycrystalline semiconductor
thin film formed on a substrate with high-intensity light rays or laser beams via
an exposure mask to accomplish crystallization, wherein the exposure mask has a
lens member with a curved face on at least a part of the top and underside surfaces,
possesses a key-forming pattern made of a light-intercepting material and bring
about an inclining distribution of light quantity applied to the semiconductor
thin film, wherein the semiconductor thin film is crystallized by the step of applying
high-intensity light rays or laser beams via the exposure mask to achieve crystallization,
and wherein the alignment key comprising an amorphous or polycrystalline silicon
area is formed along with crystallized semiconductor thin film.
6. The method according to claim 5, wherein the lens member is allowed to assume
the form of a strip or a circle in a plan view, and wherein the distribution of
light quantity is established in a lengthwise direction of the strip or a direction
of diameter of the circular form.
7. The method according to claim 5, wherein the curved surface of the lens member
is formed by depressing at least a part of the top and the back surfaces of the
exposure mask.
8. A method of producing a semiconductor thin film which is characterized by
comprising the step of applying high-intensity light rays or laser beams to an
amorphous or polycrystalline semiconductor thin film formed on a substrate via
an exposure mask to achieve crystallization, wherein the exposure mask is formed
of a light-intercepting material having a plurality of openings by which an inclining
distribution of light quantity applied to the semiconductor thin film is brought
about, wherein the plurality of openings are arranged such that a rate of hole
area per area unit is continuously varied along the lengthwise direction of the
strip area, and wherein the distribution is brought about along the lengthwise direction.
9. A method of producing a semiconductor thin film which is characterized by
comprising the step of applying high-intensity light rays or laser beams to an
amorphous or polycrystalline semiconductor thin film formed on a substrate via
an exposure mask to achieve crystallization, wherein the exposure mask is formed
of a light-intercepting material having a plurality of openings by which an inclining
distribution of light quantity applied to the semiconductor thin film is brought
about, wherein the plurality of openings are arranged such that a rate of hole
area per area unit is stepwise or continuously increased in a diameter direction
from the center of the circular area toward the periphery of the circular area
and wherein the distribution is brought about along the diameter direction.
10. A method of producing a semiconductor device which is characterized by comprising
the steps of forming an alignment key on a part of a substrate, forming an amorphous
or polycrystalline semiconductor thin film on the substrate and on the alignment
key, irradiating the semiconductor thin film with high-intensity light rays or
laser beams for crystallization, and forming a gate electrode film on the semiconductor
thin film, wherein the alignment key is formed of a material higher in heat conductivity
than the semiconductor thin film and wherein the alignment key functions as a heat-dissipating
layer to form a large diameter crystal in its vicinity, and is used at least in
a photo step for forming a pattern of the gate electrode at a specified position
by etching a part of the gate electrode film.
11. A method of producing for producing a semiconductor device which is characterized
by comprising the steps of applying high-intensity light rays or laser beams to
an amorphous semiconductor thin film formed on a substrate via an exposure mask
to accomplish crystallization in a state wherein a distribution of light quantity
has been brought about, forming an amorphous alignment key according to the distribution
of light quantity, and forming a gate electrode film on the semiconductor thin
film, wherein there is a difference in color between the polycrystalline silicon
area formed on the semiconductor thin film and an alignment key comprising an amorphous
silicon area formed by shutting off a part of penetrating light rays with the exposure
mask, and wherein the alignment key having a color different from the color of
the polycrystalline silicon is used at least in a photo step for forming a pattern
of the gate electrode at a specified position by etching a part of the gate electrode film.
12. A method for manufacturing a semiconductor device which is characterized
by comprising the steps of forming a gate electrode and an alignment key on a part
of a substrate, forming an amorphous or polycrystalline semiconductor thin film
on the gate electrode and the alignment key, forming a heat-dissipating layer from
a material higher in heat conductivity than the semiconductor thin film in a specified
position of the semiconductor thin film using the alignment key and irradiating
the semiconductor thin film with high-intensity light ray or laser beams for crystallization.
Description
FIELD OF THE INVENTION
The present invention relates to a semiconductor device, a liquid crystal display
device, an EL display device, a method for fabricating a semiconductor thin film
and a method for manufacturing the semiconductor device.
BACKGROUND ART
A laser anneal method is generally known as a method of producing a semiconductor
thin film for forming a semiconductor layer of a thin film transistor (hereinafter
referred to as "TFT"). The laser anneal method comprises the steps of forming an
amorphous semiconductor film or a microcrystalline semiconductor film on a substrate
made of glass or the like, and irradiating the film with laser beams for crystallization
to give a polycrystalline semiconductor film. Usually this method is called a crystallization process.
Argon laser, KrF and XeCl excimer laser are generally used as a light source
for laser beams to be employed in the crystallization process. The TFT produced
by the foregoing method is generally called a low-temperature poly Si-TFT since
Si is mainly used as a semiconductor and the process is performed at a temperature
below the melting point of glass used as the substrate.
Conventional TFT liquid crystal display devices generally include a
TFT having a semiconductor layer formed of amorphous silicon, and is provided with
a circuit member for driving the pixels which is of the type having IC chips fixed
to the periphery of an image plane. On the other hand, even a driving circuit can
be produced by use of the low-temperature poly Si-TFT using a TFT formed on a glass
substrate. That is, a region outside an image plane can be reduced at an outer
periphery of a panel of a liquid crystal display device which is generally called
a picture frame and a more elaborate dot-pitch liquid crystal display device can
be produced. Various kinds of semiconductor circuits can be formed on a glass substrate
by use of a low-temperature poly Si-TFT having improved performance. That is, the
so-called system-on-panel (SOP) can be realized. Moreover, with use of a low-temperature
poly Si-TFT, an EL display device can be produced by switching an EL display element.
However, the low-temperature poly Si-TFt poses the following problems.
(1) The crystals in a polycrystalline silicon thin film thus formed have a small
size so that due to low mobility of electron, response capability and the like
are deteriorated in producing a TFT.
(2) In a TFT, numerous grain boundaries of silicon crystals may be present in
a boundary between a lightly doped drain area (hereinafter referred to as "LDD
area") or an offset area and a channel area or in its vicinity. In this case, a
large number of crystalline defects and dangling bonds exist in the vicinity of
the grain boundary so that the performance is deteriorated when the TFT Is allowed
to execute a switching operation continuously for a long time or repeatedly many
times, resulting in impairment of reliability.
(3) In producing a TFT or a display device, no means is available for determining
the positional relationship between the crystals of silicon thin film and TFT pattern,
so that it is impossible to determine the position of grain boundary of silicon
crystal with respect to the TFT. This results in irregularities of performance
in producing a TFT.
DISCLOSURE OF THE INVENTION
A main object of the present invention is to provide a polycrystalline semiconductor
thin film having a crystal of large size.
Another main object of the invention is to provide a semiconductor device
having a superior performance and high reliability.
(Method of Producing a Semiconductor Thin Film)
To achieve the foregoing objects, a method of producing a semiconductor thin
film
according to the invention is characterized by comprising the steps of forming
a heat-dissipating layer from a material higher in heat conductivity than the semiconductor
thin film on a part of an amorphous or polycrystalline semiconductor thin film
formed on a substrate, and irradiating the semiconductor thin film with high-intensity
light rays or laser beams to achieve crystallization.
According to this method of producing a semiconductor thin film, when the
semiconductor thin film is melted by irradiation of intensive light such as flash
lamp or laser beams, heat is dissipated by the heat-dissipating layer in the vicinity
of the heat-dissipating layer in the semiconductor thin film, whereby the vicinity
thereof is quickly cooled. The cooling rate is reduced as the heated part is far
and far from the heat-dissipating layer. As a result, a temperature gradient is
established in the semiconductor thin film when it is cooled so that the crystal
grows along the temperature gradient, i.e. along a direction in which the heated
part is more and more away from the vicinity of the heat-dissipating layer, whereby
a large size crystal is formed. A TFT produced from the semiconductor thin film
thus obtained is improved in mobility because of a crystal of larger size than
conventional crystal, whereby the degradation of performance is alleviated.
Preferred specific examples of the procedure of forming a heat-dissipating
layer are as follows.
- A procedure comprising the steps of forming on the semiconductor thin
film a film from a material higher in heat conductivity than the semiconductor
thin film; forming a resist mask by photolithography on the film made of a material
higher in heat conductivity; removing a part not covered with the resist mask from
the film made of a material higher in heat conductivity by an etching technique;
and peeling the resist mask.
- A procedure comprising the steps of forming a resist pattern by photolithography;
forming a film from a material higher in heat conductivity than the semiconductor
thin film; and lifting off the resist pattern together with the film made of a
material higher in heat conductivity.
- A procedure of forming a film from a material higher in heat conductivity
than the semiconductor thin film by vapor deposition or sputtering using a mask
having openings.
In any of these procedures, the heat-dissipating layer can be easily formed,
resulting
in an increase of productivity.
The heat-dissipating layer can be formed at a position in contact with the semiconductor
thin film and may be positioned on or under the semiconductor thin film.
Another method of producing a semiconductor thin film according to the invention
is characterized by comprising the step of irradiating the thin film with high-intensity
light rays or laser beams at one or more pulses over a specified range of the substrate
in a fixed state of positional relationship between the substrate and a light source.
In the case of scanning irradiation wherein pulse irradiation is executed while
the substrate or a light source is moved at a specified pitch, the crystal grows
correspondingly to the irradiation position, so that the crystal having a greater
size than the pitch width in the scanning direction will not grow. On the other
hand, the crystal can grow to a large size irrespectively of scanning pitch width
by pulse irradiation in a fixed state of positional relationship between the substrate
and the light source. Irradiation is executed at a plurality of pulses over a specified
range of the substrate, whereby the irregularity of irradiation intensity at each
pulse is levelled, and the crystalline size and film quality of the semiconductor
thin film are made uniform, so that the irregularity in the performance of TFT
produced can be diminished.
High-intensity light rays or laser beams can be supplied with a pulse
laser device by scanning irradiation in which irradiation is performed at a plurality
of pulses over a specified range of substrate while relatively changing the positional
relationship between the substrate and the light source at a specified pitch.
A further method of producing a semiconductor thin film according to the invention
is characterized by comprising the steps of forming a heat-dissipating layer on
a part of a substrate, forming an amorphous or polycrystalline semiconductor thin
film on the substrate, and applying high-intensity light rays or laser beams to
the semiconductor thin film to achieve crystallization, wherein the heat-dissipating
layer is made of a material higher in heat conductivity than the semiconductor
thin film.
According to this method of producing a semiconductor thin film, the semiconductor
thin film is formed after forming the heat-dissipating layer, that is, the heat-dissipating
layer is formed under the semiconductor thin film, so that the heat-dissipating
layer need not be removed in producing a TFT using the semiconductor thin film.
Since the removal of heat-dissipating layer can be saved, the heat-dissipating
layer can be used as the alignment key in the course of producing a TFT. Examples
of the procedure of forming the heat-dissipating layer under the semiconductor
thin film include the following.
- A procedure comprising the steps of forming a heat-dissipating layer
on a substrate; forming an undercoat film having insulating properties over the
substrate in a manner to cover the heat-dissipating layer with the undercoat film;
and forming an amorphous or polycrystalline semiconductor thin film on the undercoat film,
- A procedure comprising the steps of forming an undercoat film having
insulating properties on a substrate; forming the heat-dissipating layer on the
undercoat film; forming another undercoat film having insulating properties over
the undercoat film in a manner to cover the heat-dissipating layer with the other
undercoat film; and forming an amorphous or polycrystalline semiconductor thin
film on the other undercoat film.
A still further method of producing a semiconductor thin film according to the
invention is characterized by comprising the step of applying high-intensity light
rays or laser beams to an amorphous or polycrystalline semiconductor thin film
formed on a substrate via an exposure mask to achieve crystallization, wherein
the exposure mask includes a lens member having a curved surface on least one of
the top and underside surfaces to give rise to an inclining distribution of light
quantity applied to the semiconductor thin film.
According to this method of producing a semiconductor thin film, light-intensity
light rays or laser beams are penetrated through the lens member of the exposure
mask, whereby an inclining distribution of light quantity applied to the semiconductor
thin film is established and a temperature distribution is given to the semiconductor
thin film according to the distribution of light quantity. Thereby the molten semiconductor
thin film initiates solidification and crystallization at a portion having the
lowest temperature, i.e. at a portion having the smallest irradiated light quantity.
The crystal grows toward a portion involving a large quantity of irradiated light
along an inclining temperature gradient, finally developing into a crystal of large
size. When a TFT is produced using this semiconductor thin film, the mobility is
increased and the degradation of performance is attenuated because of larger size
crystal than conventional crystals.
Preferred specific examples of the method of giving rise to the foregoing
distribution of light quantity include the following.
- Using an exposure mask having a lens member in the form of a strip or
a circle in a plan view, a distribution of light quantity is established in a lengthwise
direction of the strip or a diameter direction of the circle.
When the lens member takes the form of a strip in a plan view, the crystal grows
from a portion involving a small light quantity to a portion involving a large
light quantity along a lengthwise direction of the strip. When the lens member
takes the form of a circle in a plan view, the crystal grows in a direction from
the vicinity of the center of the lens member to the periphery thereof from a small
light quantity to a large light quantity in a direction from the vicinity of center
of the lens member to the periphery thereof. When the lens member takes the form
of a circle in a plan view, the crystallization is initiated at a point, i.e.,
a definite position, so that the position of a large size crystal being formed
can be advantageously controlled with a high accuracy. Specific examples of the
lens member in the form of a circle in a plan view include a concave lens wherein
the internal wall surface of a concave portion formed at an underside surface of
the exposure mask is substantially spherical.
The curved surface of the lens member is preferably formed by depressing at least
a part of the top and underside surfaces of the exposure mask, or may be formed
by forming the lens member in a convex form in such manner that the convex part
is given a greater thickness than other parts of the lens member.
An additional method of producing a semiconductor thin film according to the
invention
is characterized by comprising the step of irradiating an amorphous or polycrystalline
semiconductor thin film formed on a substrate with high-intensity light rays or
laser beams via an exposure mask to achieve crystallization, wherein the exposure
mask is so configured that an inclining distribution of light quantity applied
to the semiconductor thin film is brought about by giving a phase distribution
to the irradiated light quantity.
According to the above-described method of producing a semiconductor thin
film, the inclining distribution of light quantity irradiated to the semiconductor
thin film is established due to interference of light resulting from the phase
distribution so that a temperature distribution is set up in the semiconductor
thin film according to the distribution of light quantity. Thereby the molten semiconductor
thin film initiates solidification and crystallization at a portion involving the
lowest temperature, i.e., a portion involving the smallest irradiated light quantity.
Then the crystal grows toward a portion involving a large light quantity along
an inclining temperature gradient, finally developing into a crystal having a large
size. In producing a TFT using this semiconductor thin film, the mobility is increased
and the degradation of performance is decreased due to the larger size crystal
than conventional crystals.
Preferred examples of the method of establishing the foregoing phase distribution
include the following which facilitate establishing a distribution of light quantity.
- Using an exposure mask made of a light transmitting material which is
partly different in thickness, a phase distribution is given to the irradiated
light rays according to the thickness distribution.
For example, a level difference is made by forming a concave portion of cylindrical
shape on an internal wall of an underside surface of the exposure mask, whereby
a phase distribution can be given to the irradiated light. When a concave portion
is made in a circular form in a plan view, the starting position of crystallization
is definite as a point so that advantageously the position of a large size crystal
being formed can be precisely controlled.
Another method of producing a semiconductor thin film according to the invention
is characterized by comprising the step of applying high-intensity light rays or
laser beams to an amorphous or polycrystalline semiconductor thin film formed on
a substrate via an exposure mask to achieve crystallization, wherein the exposure
mask is formed of a light-intercepting material and has a plurality of openings
by which an inclining distribution of light quantity applied to the semiconductor
thin film is established.
According to this method of producing a semiconductor thin film, an inclining
distribution of light quantity applied to the semiconductor thin film is established
by suitably determining the size, shape and arrangement of openings so that a temperature
distribution is brought about in respect of the semiconductor thin film according
to the distribution of light quantity. Thereby the molten semiconductor thin film
initiates solidification and crystallization at a portion of the film involving
the lowest temperature, i.e., a portion involving the smallest irradiated light
quantity. Then the crystal grows along an inclining temperature gradient toward
a portion involving a large quantity of irradiated light, finally developing into
a crystal having a large size. In producing a TFT using this semiconductor thin
film, the mobility is improved and the degradation of performance is mitigated
due to the larger size crystal than conventional crystals.
Preferred specific examples of the method of giving rise to the distribution
of light quantity include the following.
- The foregoing distribution of light quantity is established along a
lengthwise direction of the strip area using an exposure mask having a plurality
of openings such that a rate of openings per area unit is stepwise or continuously
varied along a lengthwise direction of the strip area.
- The foregoing distribution of light quantity is established along a
diameter direction of the circular area using an exposure mask having a plurality
of openings such that a rate of openings per area unit is stepwise or continuously
increased along a diameter direction from the center of the circular area to the
periphery thereof.
When a rate of openings per area unit is varied along a lengthwise direction
of the strip area, the crystal grows from a portion involving a small light quantity
along a lengthwise direction toward a portion involving a large light quantity.
When the rate of hole area per area unit is increased from the center of the circular
area to the periphery thereof in a diameter direction, the crystal grows from the
center of the circular area to the periphery thereof. When the distribution of
light quantity makes an inclining change, the crystal grows to a larger size. In
the latter case, since the crystallization is initiated at a definite position,
i.e., a point, the position of a large size crystal being formed can be advantageously
controlled with a high accuracy.
In the method of producing a semiconductor thin film, a semiconductor thin film
may be formed after forming a porous insulating film on a substrate, whereby the
crystal of larger size can be obtained.
(Method of Producing a Semiconductor Device)
To achieve the foregoing objects, a method of producing a semiconductor device
according to the invention is characterized by comprising the steps of forming
a heat-dissipating layer and an alignment key on a part of an amorphous or polycrystalline
semiconductor thin film formed on a substrate, the heat-dissipating layer being
made of a material higher in heat conductivity than the semiconductor thin film,
irradiating the semiconductor thin film with high-intensity light rays or laser
beams for crystallization, and forming a gate electrode film on the semiconductor
thin film, wherein the alignment key is used at least in a photo procedure for
forming a pattern of the gate electrode at a specified position by etching a part
of the gate electrode film.
According to this method of producing a semiconductor device, the semiconductor
thin film is melted by emitting intensive light or laser beams and heat is dissipated
by the heat-dissipating layer in the vicinity of a part of the thin film having
the heat-dissipating layer, whereby the vicinity is quickly cooled. The cooling
rate is gradually lowered as the part of the film is more and more away from the
heat-dissipating layer. As a result, a temperature gradient occurs in the semiconductor
thin film being cooled so that the crystal grows along the temperature gradient,
i.e. along a direction of the part of the film becoming more distant from the vicinity
of the heat-dissipating layer, finally developing into a crystal having a larger size.
In producing a TFT using the foregoing semiconductor thin film, a defect chiefly
existing in a grain boundary is alleviated or removed, thereby leading to improvements
in mobility and in other characteristics of TFT because of larger size crystal
than conventional crystals, so that a semiconductor device with enhanced performance
and higher reliability can be obtained. Specific methods of producing a heat-dissipating
layer are referred to the aforesaid methods of producing a semiconductor thin film.
In addition, an alignment key is formed in the semiconductor thin film so that
using the alignment key, a gate electrode can be formed, whereby a TFT can be formed
at the desired position corresponding to the large size crystal.
Even if a large size crystal was conventionally formed in a semiconductor thin
film, means for producing a TFT according to the crystal was unavailable, so that
the presence or absence of grain boundary or the number of grain boundaries were
variable in LDD or offset areas and a channel area, resulting in irregularities
of TFT performance. However, according to the above-mentioned method of producing
a semiconductor device, a TFT or a part of TFT structure can be produced in the
position of large size crystal instead of the position of grain boundary. Consequently
the above-mentioned problem can be alleviated.
It is preferred to form an alignment key in the same step together with a heat-dissipating
layer simultaneously.
Another method of producing a semiconductor device according to the invention
is characterized by comprising the steps of forming an alignment key on a part
of a substrate, forming an amorphous or polycrystalline semiconductor thin film
on the substrate and on the alignment key, irradiating the semiconductor thin film
with high-intensity light rays or laser beams for crystallization, and forming
a gate electrode film on the semiconductor thin film, wherein the alignment key
is formed of a material higher in heat conductivity than the semiconductor thin
film and is used at least in a photo procedure for forming a pattern of the gate
electrode at a specified position by etching a part of the gate electrode film.
According to this method of producing a semiconductor device, the performance
of TFT can be enhanced and a semiconductor device can be obtained with improved
performance and high reliability as described above. Moreover, since the alignment
key functions as a heat-dissipating layer, the productivity can be increased.
A further method of producing a semiconductor device according to the invention
is characterized by comprising the steps of applying high-intensity light rays
or laser beams to an amorphous semiconductor thin film formed on a substrate via
an exposure mask to accomplish crystallization in a state wherein a distribution
of light quantity has been established, forming an alignment key, and forming a
gate electrode film on the semiconductor thin film, wherein the alignment key is
formed due to the difference of color between a polycrystalline silicon area and
an amorphous silicon area created in the semiconductor thin film by shutting off
a part of penetrated light rays with an exposure mask, and wherein the alignment
key is used at least in a photo procedure for forming a pattern of the gate electrode
at a specified position by etching a part of the gate electrode film.
According to the above-mentioned method of producing a semiconductor device,
a distribution of light quantity applied to the semiconductor thin film is set
up, thereby establishing a temperature distribution in the semiconductor thin film
according to the distribution of light quantity. As a consequence, the molten semiconductor
thin film initiates solidification and crystallization at a portion involving the
lowest temperature, i.e., a portion entailing the smallest irradiated light quantity.
Then the crystal grows toward a portion involving a large quantity of irradiated
light, eventually developing into a crystal having a large size. In producing a
TFT using this semiconductor thin film, the defect existing mainly in the grain
boundary is alleviated or removed due to a larger size of the crystal than conventional
crystals, thereby leading to improvement in mobility and other characteristics
of TFT, so that a semiconductor device with enhanced performance and higher reliability
can be obtained. For specific methods of establishing the distribution of light
quantity, the aforesaid methods of producing a semiconductor thin film is referred to.
Since an alignment key is formed in the semiconductor thin film, a gate electrode
can be produced using the alignment key, and a TFT can be formed at the desired
position with respect to the large size crystal. Consequently a TFT or a part of
TFT structure can be produced in the position of large size crystal. Thus, the
problem on the irregularities in performance of TFT can be alleviated.
The alignment key can be formed by applying light rays to the area of the semiconductor
thin film corresponding to the key pattern formed in the exposure mask to give
a polycrystalline area and by shutting off the irradiated light rays around the
area with the exposure mask to give an amorphous area. Or the exposure mask may
be formed such that the amorphous area is formed with only the part corresponding
to the key pattern as a non-irradiation part and its periphery is irradiated with
light rays to give a polycrystalline area. It is desirable to form the amorphous
area and the polycrystalline area in the same layer of the semiconductor thin film.
A still further method of producing a semiconductor device according to the invention
is characterized by comprising the steps of forming a gate electrode and an alignment
key on a part of a substrate, forming an amorphous or polycrystalline semiconductor
thin film on the gate electrode and on the alignment key, forming a heat-dissipating
layer from a material higher in heat conductivity than the semiconductor thin film
in a specified position of the semiconductor thin film using the alignment key
and irradiating the semiconductor thin film with high-intensity light rays or laser
beams for crystallization.
According to this method of producing a semiconductor device, a large size
crystal can be formed in accordance with the position of the gate electrode by
forming a heat-dissipating layer using the alignment key, so that the large size
crystal and TFT can be positioned accurately. Therefore the foregoing performance
of TFT can be increased and a semiconductor thin film having improved performance
and high reliability can be formed.
(Semiconductor Device)
To achieve the foregoing objects, the semiconductor device of the invention is
characterized in that the device is provided with a thin film transistor having
a polycrystalline semiconductor layer, the semiconductor layer including a channel
area, highly doped drain areas positioned on both sides of the channel area and
LDD or offset areas positioned between the channel area and the highly doped drain
areas, the LDD or offset areas being lower in dopant density than the highly doped
drain areas or being free of dopant, and that any diameter of a crystal at least
partly existing in the LDD or offset areas is larger than that of other crystals.
The term "size (of a crystal)" used herein is a value obtained by measuring the
longest size of the crystal in an optional direction in a plan view.
When a current flows in a TFT, which is on, constituting the semiconductor device,
carriers moving at a high rate in the channel area may be scattered on collision
with a defect of crystals. This is called "hot carrier phenomenon". The scattered
carriers strike against neighboring weak bonds such as those of Si—H and
cut the bonds into dangling bonds of Si. On formation of dangling bonds, other
carriers are captured so that the TFT becomes extremely lower in electrical conductivity
and mobility, and the performance of TFT is degraded.
The defects of crystals and bonds of Si—H concentratedly exist in the
vicinity of a grain boundary. When numerous grain boundaries exist in the LDD or
offset area on the drain side, the performance may be impaired and the reliability
may be degraded.
The grain boundaries existing in the LDD or offset areas can be reduced compared
with conventional grain boundaries or can be totally removed by giving any larger
diameter to a crystal at least partly existing in the LDD or offset areas than
other crystals. Thereby the performance and the reliability can be improved.
For example, the following cases fall under the above: a case wherein as shown
in FIG. 30(
a), a crystal C1 partly existing in an area A representing
the LDD or offset area is greater in size than another crystal C2 and a
grain boundary B slightly exists in the area A, or a case wherein as shown in FIG.
30(
b), a crystal C3 entirely inclusive of the area A is so
greater in the size than the other crystal C4 that no grain boundary exists
in the area A.
The other crystal referred to above for comparison of the size is preferably
one existing outside the LDD or offset area. That is, preferably any diameter of
the crystal at least partly existing in the LDD or offset area is greater than
other crystals existing in its entirety outside the LDD or offset area (more preferably
the other crystal existing in the channel area).
When numerous grain boundaries exist in the vicinity of the boundaries between
the channel area and the LDD or offset area on the drain side, the performance
is more degraded and the reliability are more impaired. Therefore it is preferred
that any diameter of a crystal at least partly existing in an area in the range
of 0.5 μm or less on the LDD or offset area side including the boundary,
away from at least one of the boundaries between the channel area and the LDD or
offset areas is greater than that of the other crystal. The area is preferably
0.4 μm or less, more preferably 0.3 μm on the LDD or offset area side
including the boundary.
In this case, it is desirable that any diameter of a crystal at least partly
existing
in said area is greater than any diameter of other crystal existing in its entirety
outside the LDD or offset area (more preferably the other crystal existing in the
channel area).
The present inventors conducted experiments and found that there is a interrelation
(as shown in FIG. 31) between the size of a polycrystalline silicon crystal and
the TFT reliability. The boundary between the channel area and the LDD or offset
area which constitutes a TFT is set to coincide with the center of the diameter
of the crystal. The reliability is determined by conducting a resistance test in
which an on/off operation of gate voltage is repeated at 500 kHz for 1500 hours
by applying 5V voltage across a source and drain in TFT's having an LDD area or
an offset area, respectively to perform a switching operation at a frequency of
several times and is expressed in terms of a ratio of mobility before and after
the test.
As apparent from the same drawing, when the crystalline size is 0.6 μm
or
more, the reliability in any case of LDD area or offset area is 75% or more and
is good. The more distant from the boundary between the channel area and the LDD
or offset area the grain boundary is, the more reliable the TFT is. The crystalline
size is preferably 0.8 μm or more, more preferably 1 μm or more.
Our review done thereafter on this matter shows that the reliability is adversely
affected by the grain boundary existing in the vicinity of the area boundary on
the side of LDD or offset area among the grain boundaries positioned on both sides
of the area boundary. That is, an electrical field is high in the vicinity of the
area boundary in the LDD or offset area on the drain side, so that when the grain
boundary exists in this position, hot carriers are likely to develop. Further the
semiconductor layer tends to become broken starting from the grain boundary. As
a result, the TFT performance is degraded and the reliability is lowered in the
case of switching operations continued for a long time or repeated many times.
Consequently, it is effective to keep the grain boundary at a specific
distance away from the foregoing area boundary on the side of LDD or offset area
among the grain boundaries located on both sides of the area boundary. This distance
corresponds to half the crystalline size in the aforesaid experiments and is preferably
0.3 μm or more, more preferably 0.4 μm or more, most preferably 0.5
μm or more. If a configuration is so formed that the grain boundary does
not exist in the range of 0.3 μm or less on the side of the LDD or offset
area including the boundary away from at least one of boundaries between the channel
area and the LDD or offset area. Thereby the defect of causing a hot carrier phenomenon
in the vicinity is alleviated. Even if hot carriers take place, dangling bonds
chiefly responsible for the degradation of performance would not occur in view
of a lesser number of weak bonds such as those of Si—H. Moreover, the semiconductor
layer is unlikely to become broken due to the defect, resulting in attenuated degradation
of TFT performance and in increased reliability.
The area boundary without a grain boundary is negligible if it is on a drain
side. However, depending on the semiconductor device, the drain and source may
be exchanged for each other. In this case, it is preferable to configure the device
such that the grain boundary is not present in the area boundaries on both sides
of drain and source.
In the semiconductor device, it is preferable to keep the grain boundary at a
distance of 0.3 μm on the channel area side, away from the boundary between
the channel area and the LDD or offset area. The distance is more preferably 0.4
μm or less, most preferably 0.5 μm or less. Consequently, the grain
boundary is not present in the specified distance on the side of the channel area
as well as in the specified distance on the side of the LDD or offset area of the
area boundary, so that the mobility is enhanced, the degradation of TFT performance
is attenuated, and an increase in reliability is assured.
Another semiconductor device of the invention is characterized in that the
device is provided with a thin film transistor having a polycrystalline semiconductor
layer, the semiconductor layer including a channel area, highly doped drain areas
positioned on both sides of the channel area and LDD or offset areas positioned
between the channel area and the highly doped drain areas, the LDD or offset areas
being lower in dopant density than the highly doped drain areas or being free of
dopant, wherein a grain boundary is not present at least in the LDD or offset area
on one side.
According to the foregoing semiconductor device, a grain boundary is not
present in the LDD or offset area on the drain side having a part which is high
in electrical field so that the generation of hot carriers can be suppressed, the
degradation of TFT performance can be attenuated and the reliability can be enhanced.
Further when the device is so configured that a grain boundary is not present
in the channel area, the mobility is improved, the degradation of TFT performance
can be lowered and the increase of reliability is assured.
Furthermore, when the device is so configured that a grain boundary
is not present in the highly doped drain area adjacent to the LDD area or offset
area, the configuration is effective in reducing the contact resistance of source
or drain and substantially increasing an on-state current of TFT.
A further semiconductor device of the invention is characterized in that the
device
is provided with a plurality of thin film transistors having a function in common,
and that 50% (the fractional portion of the number is dropped) or more of the thin
film transistors are the foregoing thin film transistors. The provision of 70%
or more thereof is more preferable and the provision of 90% or more is the most
preferable. For example, in a liquid crystal display device or an EL display device
as an example of the semiconductor device, the TFT's for controlling the operation
of each pixel, for example, are 100 in number, and the above-mentioned TFT's are
preferably 50 or more in number.
According to this semiconductor device, the plurality of thin film transistors
include the above-described thin film transistors at a specified ratio or more
which are sufficient to attenuate the degradation of TFT performance and to increase
the reliability. Thus, stable performance is assured.
Preferably each of the above-mentioned semiconductor devices has an insulating
undercoat film between the substrate and the semiconductor layer. Preferably the
foregoing undercoat film includes a porous layer containing pores of 0.1 to 2 μm
in average pore size. The pore size can be measured by observation under an electron
microscope typically having a cross section SEM·TEM.
The undercoat film including the porous layer formed between the substrate and
the semiconductor layer is effective in accelerating the crystal growth of the
semiconductor layer. However, the porous layer containing pores with an excessively
large pore size fails to effectively prevent diffusion of dopant from the substrate
to the semiconductor layer. In the case of allowing the TFT to execute switching
operation continuously for a prolonged time or repeatedly many times, the threshold
value (Vt) of gate voltage in change-over from an off operation to on operation
is shifted. When large hollow pores exist at an interface between the channel area
and the LDD area, TFT can not function, resulting in a lower yield.
From the viewpoint of the above, the porous layer has hollow pores of preferably
0.01 to 2 μm, more preferably 0.05 μm to 0.1 μm in average pore
size. Thereby not only an increase of grain size in the semiconductor layer is
achieved but also the percent defective of TFT is lowered. Further the threshold
value (Vt) of gate voltage in change-over from an off operation to on operation
can be prevented from shifting in the case of allowing the TFT to execute switching
operation continuously for a prolonged time or repeatedly many times.
The insulating undercoat film formed between the substrate and the semiconductor
layer may be preferably so configured as to include a porous layer containing pores
0.001 μm to 2 μm in average pore size and a denser layer formed on
the porous layer than the porous layer.
According to this semiconductor device, the diffusion of dopant can be
prevented by the dense layer constituting the undercoat film, the percent defective
of TFT is lowered and the threshold value (Vt) of gate voltage in change-over from
an off operation to on operation can be prevented from shifting in allowing the
TFT to execute switching operation continuously for a prolonged time or repeatedly
many times. In addition, the crystal growth in the semiconductor layer is accelerated
by the porous layer constituting the undercoat film.
A still further semiconductor device of the invention is characterized in that
the thin film transistor is formed in the vicinity of the pattern in the specified
shape which is made of a material higher in heat conductivity than the semiconductor layer.
According to this semiconductor device, a large size crystal can be easily
formed in the semiconductor layer by the pattern in the specified shape which is
made of a material higher in heat conductivity than the semiconductor layer.
The above-mentioned pattern is preferably formed between the substrate and the
semiconductor layer, and is more preferably covered with the insulating undercoat
film formed between the substrate and the semiconductor layer. Thereby the pattern
can be used as an alignment key in the photo procedure in production of a semiconductor device.
The undercoat film may be composed of a first undercoat film (upper undercoat
film) and a second undercoat film (lower undercoat film). The above-described pattern
may be formed between the first undercoat film and the second undercoat film. In
this case, the first undercoat film may be preferably made thinner than the second
undercoat film so that the heat conductivity is increased and a larger size crystal
can be formed. The above-mentioned pattern is formed of preferably a metal film,
and can be formed in the vicinity of the drain area, channel area or source area
of the semiconductor layer.
It is possible to produce a semiconductor device wherein the semiconductor thin
film on the periphery of the pattern contains a crystal of longer size than in
other parts. The pattern may be provided in contact with the semiconductor thin
film. It is also possible to produce a semiconductor device wherein the crystals
in the semiconductor thin film positioned immediately on or under the pattern have
a shorter size than the crystal in the semiconductor thin film on the periphery
of the pattern.
The foregoing semiconductor devices can be produced, for example, by the above-mentioned
method of producing a semiconductor device. For example, the following semiconductor
devices can be produced by the above-mentioned method of producing a semiconductor device.
- A semiconductor device which is characterized in that the device is
provided with a thin film transistor having a semiconductor layer formed on a substrate,
the semiconductor layer including a channel area, highly doped drain areas positioned
on both sides of the channel area and LDD or offset areas positioned between the
channel area and the highly doped drain areas, the LDD or offset areas being lower
in dopant density than the highly doped drain areas or being free of dopant, and
that any diameter of the crystal existing in the vicinity of the boundary between
the channel area and the LDD or offset areas is larger than that in other areas.
- A semiconductor device which is characterized in that the device is
provided with a thin film transistor having a semiconductor layer formed on a substrate,
the semiconductor layer including a channel area, and highly doped drain areas
positioned on both sides of the channel area, and that the size of crystal existing
in the vicinity of the boundary between the channel area and the highly doped drain
area is larger than in other areas.
- A semiconductor device which is characterized in that the device is
provided with a thin film transistor having a semiconductor layer formed on a substrate,
the semiconductor layer including a channel area, highly doped drain areas positioned
on both sides of the channel area and LDD or offset areas positioned between the
channel area and the highly doped drain areas, the LDD or offset areas being lower
in dopant density than the highly doped drain areas or being free of dopant, and
that the size of the crystal in the source area is different from that of the crystal
In the LDD or offset area, or the size of the crystal in the source area is different
from that of the crystal in the drain area (e.g., the size of the crystal in the
drain area is smaller than in the source area).
- A semiconductor device which is provided with a thin film transistor
having a semiconductor layer formed on a substrate, and that one grain boundary
exists in one channel area of the semiconductor layer.
Another semiconductor device of the invention is characterized in that the
thin film transistor has a semiconductor layer formed of a polycrystalline semiconductor
thin film and a pattern in the specified shape formed of an amorphous semiconductor
thin film.
According to this semiconductor device, the pattern in the specified shape
can be used as an alignment key in a photo procedure in production of the semiconductor
device. Preferably the polycrystalline semiconductor thin film and the amorphous
semiconductor thin film constitutes the same layer.
The foregoing semiconductor devices include, for example, a liquid crystal display
device and an EL display device which allow each pixel to operate by feeding a
voltage via the semiconductor device including a plurality of thin film transistors.
In this case, the lifetime can be prolonged to an extent to which point defects
or line defects appear in images. Further, the accuracy of fine images and uniformity
of image luminance can be improved, and the yield and reliability can be increased.
In an EL display device, pixels and a driving circuit can be produced using the
above-mentioned TFT, and can be driven and can perform image display with such
TFT. The EL display device includes both of an inorganic EL display and an organic
EL display.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a perspective view showing a substrate having an amorph
