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Silicon wafers with stabilized oxygen precipitate nucleation centers and process for making the same Number:6,808,781 from the United States Patent and Trademark Office (PTO) owispatent

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Title: Silicon wafers with stabilized oxygen precipitate nucleation centers and process for making the same

Abstract: A silicon wafer having a controlled oxygen precipitation behavior such that a denuded zone extending inward from the front surface and oxygen precipitates in the wafer bulk sufficient for intrinsic gettering purposes are ultimately formed. Specifically, prior to formation of the oxygen precipitates, the wafer bulk comprises dopant stabilized oxygen precipitate nucleation centers. The dopant is selected from a group consisting of nitrogen and carbon and the concentration of the dopant is sufficient to allow the oxygen precipitate nucleation centers to withstand thermal processing such as an epitaxial deposition process while maintaining the ability to dissolve any grown-in nucleation centers.

Patent Number: 6,808,781 Issued on 10/26/2004 to Mule'Stagno,   et al.


Inventors: Mule'Stagno; Luciano (St. Louis, MO); Libbert; Jeffrey L. (O'Fallon, MO); Phillips; Richard J. (St. Peters, MO); Kulkarni; Milind (St. Louis, MO); Banan; Mohsen (Grover, MO); Brunkhorst; Stephen J. (Chesterfield, MO)
Assignee: MEMC Electronic Materials, Inc. (St. Peters, MO)
Appl. No.: 10/328,481
Filed: December 23, 2002


Current U.S. Class: 428/64.1 ; 117/2; 117/3; 117/932; 257/E21.32; 257/E21.321; 423/348; 428/446
Field of Search: 428/64.1,446 117/2,3,13,932


References Cited [Referenced By]

U.S. Patent Documents
5455193 October 1995 Egloff
6162708 December 2000 Tamatsuka et al.
6228164 May 2001 Ammon et al.
6236104 May 2001 Falster
6284384 September 2001 Wilson et al.
6306733 October 2001 Falster et al.
6454852 September 2002 Dietze et al.
6641888 November 2003 Asayama et al.
2001/0030348 October 2001 Falster
2002/0179006 December 2002 Borgini et al.
Foreign Patent Documents
0 732 431 Sep., 1996 EP
0 942 078 Sep., 1999 EP
11189493 Jul., 1999 JP
2000044389 Feb., 2000 JP
WO 98/45507 Oct., 1998 WO

Other References

Shimura, F. et al., "Nitrogen Effect on Oxygen Precipitation in Czochralski Silicon" Appl. Phys. Lett 48(3), Jan. 20, 1986, pp. 224-226. .
Shimura, F. "Semiconductor Silicon Crystal Technology" Academic Press, Inc., 1989, pp. 116-121; 174-191; 360-380. .
Zimmermann, H. et al., "The Modeling of Platinum Diffusion in Silicon under Non-equilibrium Conditions" J. Electrochem. Soc., vol. 139, No. 1, Jan. 1992, pp. 256-262. .
Zimmermann, H. et al., "Investigation of the nucleation of oxygen precipitates in Czochralski silicon at an early stage", Appl. Phys. Lett. 60 (26), Jun. 29, 1992, pp. 3250-3252 .
Zimmermann, H. et al., "Vacancy concentration wafer mapping in silicon" Journal of Crystal Growth 129 (1993), pp. 582-592. .
International Search Report date Aug. 11, 2003, International application No. PCT/US02/41269..

Primary Examiner: Stein; Stephen
Attorney, Agent or Firm: Senniger Powers

Parent Case Text



CROSS-REFERENCE TO RELATED APPLICATION

This application claims the benefit of U.S. Provisional Application No. 60/345,178, filed Dec. 21, 2001.
Claims



We claim:

1. A single crystal silicon wafer having two major, generally parallel surfaces, one of which is the front surface of the wafer and the other of which is the back surface of the wafer, a central plane between the front and back surfaces, and a circumferential edge joining the front and back surfaces, the wafer comprising: a dopant selected from a group consisting of nitrogen and carbon, the concentration of the dopant being sufficient to promote the formation of stabilized oxygen precipitate nucleation centers as the wafer is cooled from a first temperature, T.sub.1, to a second temperature, T.sub.2, at a rate, R, the stabilized oxygen precipitation nucleation centers being incapable of being dissolved at a temperature less than about 1150.degree. C. but capable of being dissolved at a temperature between about 1150.degree. C. and about 1300.degree. C., wherein T.sub.1 is between about 1150.degree. C. and about 1300.degree. C., T.sub.2 is a temperature at which crystal lattice vacancies are relatively immobile in silicon, and R is at least about 5.degree. C. per second; a surface layer which comprises the region of the wafer between the front surface and a distance, D, measured from the front surface and toward the central plane, wherein the surface layer is free of stabilized oxygen precipitate nucleation centers; and a bulk layer which comprises a second region of the wafer between the central plane and the surface layer, wherein the bulk layer comprises stabilized oxygen precipitate nucleation centers.

2. The wafer of claim 1 wherein the dopant is nitrogen and the concentration of the nitrogen is between about 1.times.10.sup.12 and about 5.times.10.sup.14 atoms/cm.sup.3.

3. The wafer of claim 1 wherein the dopant is nitrogen and the concentration of nitrogen in the wafer is between about 1.times.10.sup.12 and about 1.times.10.sup.13 atoms/cm.sup.3.

4. The wafer of claim 1 wherein the dopant is carbon and the concentration of carbon is between about 1.times.10.sup.16 and about 4.times.10.sup.17 atoms/cm.sup.3.

5. The wafer of claim 1 wherein the dopant is carbon and the concentration of carbon in the wafer is between about 1.5.times.10.sup.16 and about 3.times.10.sup.17 atoms/cm.sup.3.

6. The wafer of claim 1 wherein the stabilized oxygen precipitate nucleation centers in the bulk layer have a concentration profile in which the peak density is at or near the central plane and generally decreases in the direction of the front surface of the wafer.

7. The wafer of claim 1 wherein the stabilized oxygen precipitate nucleation centers in the bulk layer have a concentration profile in which the peak density at some point between about the central plane and the surface layer.

8. The wafer of claim 1 wherein D is at least about 10 micrometers.

9. The wafer of claim 1 wherein D is at least about 20 micrometers.

10. The wafer of claim 1 wherein D is at least about 50 micrometers.

11. The wafer of claim 1 wherein D is between about 30 and about 100 micrometers.

12. The wafer as set forth in claim 1 wherein the wafer comprises an epitaxial layer on at least one surface of the wafer.

13. The wafer as set forth in claim 1 wherein T.sub.1 is at least about 1150.degree. C.

14. The wafer as set forth in claim 1 wherein T.sub.1 is between about 1200.degree. C. and about 1300.degree. C.

15. The wafer as set forth in claim 1 wherein R is at least about 10.degree. C. per second.

16. The wafer as set forth in claim 1 wherein R is at least about 20.degree. C. per second.

17. The wafer as set forth in claim 1 wherein R is at least about 50.degree. C. per second.

18. A single crystal silicon wafer having two major, generally parallel surfaces, one of which is the front surface of the wafer and the other of which is the back surface of the wafer, a central plane between the front and back surfaces, and a circumferential edge joining the front and back surfaces, the wafer comprising: a dopant selected from a group consisting of nitrogen and carbon, when nitrogen is the dopant, the concentration of the nitrogen being between about 1.times.10.sup.12 and about 5.times.10.sup.14 atoms/cm.sup.3, and when carbon is the dopant, the concentration of carbon is between about 1.times.10.sup.16 and about 4.times.10.sup.17 atoms/cm.sup.3 ; a surface layer which comprises the region of the wafer between the front surface and a distance, D, measured from the front surface and toward the central plane, wherein the surface layer is free of stabilized oxygen precipitate nucleation centers; and a bulk layer which comprises a second region of the wafer between the central plane and the surface layer, wherein the bulk layer comprises stabilized oxygen precipitate nucleation centers.

19. A silicon on insulator structure comprising: a single crystal silicon handle wafer comprising two major, generally parallel surfaces, one of which is the front surface of the wafer and the other of which is the back surface of the wafer, a central plane between the front and back surfaces, and a circumferential edge joining the front and back surfaces, a dopant selected from a group consisting of nitrogen and carbon, the concentration of the dopant being sufficient to promote the formation of stabilized oxygen precipitate nucleation centers as the wafer is cooled from a first temperature, T.sub.1, to a second temperature, T.sub.2, at a rate, R, the stabilized oxygen precipitation nucleation centers being incapable of being dissolved at a temperature less than about 1150.degree. C. but capable of being dissolved at a temperature between about 1150.degree. C. and about 1300.degree. C., wherein T.sub.1 is between about 1150.degree. C. and about 1300.degree. C., T.sub.2 is a temperature at which crystal lattice vacancies are relatively immobile in silicon, and R is at least about 5.degree. C. per second, a surface layer which comprises the region of the wafer between the front surface and a distance, D, measured from the front surface and toward the central plane, wherein the surface layer is free of stabilized oxygen precipitate nucleation centers, and a bulk layer which comprises a second region of the wafer between the central plane and the surface layer, wherein the bulk layer comprises stabilized oxygen precipitate nucleation centers; a single crystal silicon device layer; and an insulating layer between the handle wafer and the device layer.

20. A process for the preparation of a single crystal silicon wafer having a controlled oxygen precipitation behavior, the process comprising the steps of: selecting a wafer sliced from a single crystal silicon ingot grown by the Czochralski method comprising a front surface, a back surface, a central plane between the front and back surfaces, a front surface layer which comprises the region of the wafer between the front surface and a distance, D, measured from the front surface and toward the central plane, a bulk layer which comprises the region of the wafer between the central plane and the front surface layer, and a dopant selected from a group consisting of nitrogen and carbon, the concentration of the dopant being sufficient to promote the formation of stabilized oxygen precipitate nucleation centers as the wafer is cooled from a first temperature, T.sub.1, to a second temperature, T.sub.2, at a rate, R, the stabilized oxygen precipitation nucleation centers being incapable of being dissolved at a temperature less than about 1150.degree. C. but capable of being dissolved at a temperature between about 1150.degree. C. and about 1300.degree. C., wherein T.sub.1 is between about 1150.degree. C. and about 1300.degree. C., T.sub.2 is a temperature at which crystal lattice vacancies are relatively immobile in silicon, and R is at least about 5.degree. C. per second; heating the wafer to a temperature of at least about 1150.degree. C. to form crystal lattice vacancies in the front surface and bulk layers; cooling the heated wafer at a rate to form a vacancy concentration profile in the wafer wherein the peak density of vacancies is in the bulk layer with the concentration generally decreasing from the location of the peak density in the direction of the front surface of the wafer and the difference in the concentration of vacancies in the front surface and bulk layers is such that stabilized oxygen precipitate nucleation centers do not form in the front surface layer and stabilized oxygen precipitate nucleation centers form in the bulk layer; forming stabilized oxygen precipitate nucleation centers in the bulk layer as the wafer is being cooled with the concentration of the stabilized oxygen precipitate nucleation centers in the bulk layer being primarily dependant upon the concentration of vacancies.

21. The process of claim 20 wherein the dopant is nitrogen and the concentration of nitrogen in the wafer is between about 1.times.10.sup.12 and about 5.times.10.sup.14 atoms/cm.sup.3.

22. The process of claim 20 wherein the dopant is nitrogen and the concentration of nitrogen in the wafer is between about 1.times.10and about 1.times.10.sup.13 atoms/cm.sup.3.

23. The process of claim 20 wherein the dopant is carbon and the concentration of carbon in the wafer is between about 1.times.10.sup.16 and about 4.times.10.sup.17 atoms/cm.sup.3.

24. The process of claim 20 wherein the dopant is carbon and the concentration of carbon in the wafer is between about 1.5.times.10.sup.16 and about 3.times.10.sup.17 atoms/cm.sup.3.

25. The process of claim 20 wherein the wafer is heated to a temperature of at least about 1175.degree. C.

26. The process of claim 20 wherein the wafer is heated to a temperature of at least about 1200.degree. C.

27. The process of claim 20 wherein the wafer is heated to a temperature between about 1200.degree. C. and about 1275.degree. C.

28. The process of claim 20 wherein the wafer is exposed to an atmosphere while being heated, said atmosphere comprising one or more gases selected from a group consisting of argon, helium, neon, carbon dioxide, and nitrogen or a nitrogen-containing gas.

29. The process of claim 28 wherein the atmosphere argon.

30. The process of claim 28 wherein the atmosphere comprises nitrogen or a nitrogen-containing gas.

31. The process of claim 28 wherein the atmosphere comprises argon and nitrogen or a nitrogen-containing gas.

32. The process of claim 28 wherein the atmosphere comprises a partial pressure of oxygen that is no more than about 0.01 atmospheres.

33. The process of claim 28 wherein the atmosphere comprises a partial pressure of oxygen that is no more than about 0.005 atmospheres.

34. The process of claim 28 wherein the atmosphere comprises a partial pressure of oxygen that is no more than about 0.002 atmospheres.

35. The process of claim 28 wherein the atmosphere comprises a partial pressure of oxygen that is no more than about 0.001 atmospheres.

36. The process of claim 28 wherein the atmosphere comprises a partial pressure of oxygen that is between about 0.0001 and about 0.01 atmospheres.

37. The process of claim 28 wherein the atmosphere comprises a partial pressure of oxygen that is between about 0.0002 and about 0.001 atmospheres.

38. The process of claim 20 wherein the front surface of the wafer is exposed to a first atmosphere while being heated, said first atmosphere comprising one or more gases selected from a group consisting of argon, helium, neon, carbon dioxide, and nitrogen or a nitrogen-containing gas, and the back surface of the wafer is exposed to a second atmosphere while being heated, said second atmosphere comprising one or more gases selected from the group consisting of argon, helium, neon, carbon dioxide, and nitrogen or a nitrogen-containing gas, with the first and second atmospheres having at least one gas not in common.

39. The process of claim 20 wherein, prior to the heat-treatment to form crystal lattice vacancies, the wafer is heated to a temperature of at least about 700.degree. C. in an oxygen-containing atmosphere to form a superficial silicon dioxide layer which is capable of serving as a sink for crystal lattice vacancies.

40. The process of claim 20 wherein the cooling rate is at least about 5.degree. C. per second through the temperature range at which crystal lattice vacancies are relatively mobile in silicon.

41. The process of claim 20 wherein the cooling rate is at least about 20.degree. C. per second through the temperature range at which crystal lattice vacancies are relatively mobile in silicon.

42. The process of claim 20 wherein the cooling rate is at least about 50.degree. C. per second through the temperature range at which crystal lattice vacancies are relatively mobile in silicon.

43. The process of claim 20 wherein the cooling rate is at least about 100.degree. C. per second through the temperature range at which crystal lattice vacancies are relatively mobile in silicon.

44. The process of claim 20 comprising depositing an epitaxial layer on at least one surface of the wafer after formation of the stabilized oxygen precipitate nucleation centers form in the bulk layer.

45. A process for the preparation of a single crystal silicon wafer having a controlled oxygen precipitation behavior, the process comprising: selecting a wafer sliced from a single crystal silicon ingot grown by the Czochralski method comprising a front surface, a back surface, a central plane between the front and back surfaces, a front surface layer which comprises the region of the wafer between the front surface and a distance, D, measured from the front surface and toward the central plane, a bulk layer which comprises the region of the wafer between the central plane and the front surface layer, and a dopant selected from the group consisting of nitrogen and carbon, when the nitrogen is the dopant, the concentration of the nitrogen is between about 1.times.10.sup.12 and about 5.times.10.sup.14 atoms/cm.sup.3, and when the carbon is the dopant, the concentration of carbon is between about 1.times.10.sup.16 and about 4.times.10.sup.17 atoms/cm.sup.3 ; subjecting the wafer to a heat-treatment to form crystal lattice vacancies in the front surface and bulk layers; cooling the heat-treated wafer at a rate that produces a vacancy concentration profile in the wafer wherein the peak density of vacancies is in the bulk layer with the concentration generally decreasing from the location of the peak density in the direction of the front surface of the wafer and the difference in the concentration of vacancies in the front surface and bulk layers is such that stabilized oxygen precipitate nucleation centers do not form in the front surface layer and stabilized oxygen precipitate nucleation centers form in the bulk layer; and forming stabilized oxygen precipitate nucleation centers in the bulk layer as the heat-treated wafer is being cooled with the concentration of the stabilized oxygen precipitate nucleation centers in the bulk layer being primarily dependant upon the concentration of vacancies.

46. The wafer of claim 1 wherein the wafer is selected from the group consisting of a polished silicon wafer, and a silicon wafer which has been lapped and etched but not polished.

47. The wafer of claim 1 wherein the surface layer which comprises the region of the wafer between the front surface and the distance D measured from the front surface and toward the central plane is a layer distinct from any epitaxial layer.

48. The wafer of claim 1 wherein the region of the wafer which the surface layer comprises is a region of a wafer sliced from an ingot grown in accordance with a conventional Czochralski crystal growing method.
Description



BACKGROUND OF THE INVENTION

The present invention generally relates to the preparation of semiconductor material substrates, especially silicon wafers, which are used in the manufacture of electronic components. More particularly, the present invention relates to a process for the treatment of silicon wafers which enables the wafers, during the heat treatment cycles of essentially any arbitrary electronic device manufacturing process to form an ideal, non-uniform depth distribution of oxygen precipitates.

Single crystal silicon, which is the starting material for most processes for the fabrication of semiconductor electronic components, is commonly prepared with the so-called Czochralski process wherein a single seed crystal is immersed into molten silicon and then grown by slow extraction. As molten silicon is contained in a quartz crucible, it is contaminated with various impurities, among which is mainly oxygen. At the temperature of the silicon molten mass, oxygen comes into the crystal lattice until it reaches a concentration determined by the solubility of oxygen in silicon at the temperature of the molten mass and by the actual segregation coefficient of oxygen in solidified silicon. Such concentrations are greater than the solubility of oxygen in solid silicon at the temperatures typical for the processes for the fabrication of electronic devices. As the crystal grows from the molten mass and cools, therefore, the solubility of oxygen in it decreases rapidly, whereby in the resulting slices or wafers, oxygen is present in supersaturated concentrations.

Thermal treatment cycles which are typically employed in the fabrication of electronic devices can cause the precipitation of oxygen in silicon wafers which are supersaturated in oxygen. Depending upon their location in the wafer, the precipitates can be harmful or beneficial. Oxygen precipitates located in the active device region of the wafer can impair the operation of the device. Oxygen precipitates located in the bulk of the wafer, however, are capable of trapping undesired metal impurities that may come into contact with the wafer. The use of oxygen precipitates located in the bulk of the wafer to trap metals is commonly referred to as internal or intrinsic gettering ("IG").

Historically, electronic device fabrication processes included a series of steps which were designed to produce silicon having a zone or region near the surface of the wafer which is free of oxygen precipitates (commonly referred to as a "denuded zone" or a "precipitate free zone") with the balance of the wafer, i.e., the wafer bulk, containing a sufficient number of oxygen precipitates for IG purposes. Denuded zones can be formed, for example, in a high-low-high thermal sequence such as (a) oxygen out-diffusion heat treatment at a high temperature (>1100.degree. C.) in an inert ambient for a period of at least about 4 hours, (b) oxygen precipitate nuclei formation at a low temperature (600-750.degree. C.), and (c) growth of oxygen (SiO.sub.2) precipitates at a high temperature (1000-1150.degree. C.). See, e.g., F. Shimura, Semiconductor Silicon Crystal Technology, Academic Press, Inc., San Diego Calif. (1989) at pages 361-367 and the references cited therein.

More recently, however, advanced electronic device manufacturing processes such as DRAM manufacturing processes have begun to minimize the use of high temperature process steps. Although some of these processes retain enough of the high temperature process steps to produce a denuded zone and sufficient density of bulk precipitates, the tolerances on the material are too tight to render it a commercially viable product. Other current highly advanced electronic device manufacturing processes contain no out-diffusion steps at all. Because of the problems associated with oxygen precipitates in the active device region, therefore, these electronic device fabricators must use silicon wafers which are incapable of forming oxygen precipitates anywhere in the wafer under their process conditions. As a result, all IG potential is lost.

BRIEF SUMMARY OF THE INVENTION

Among the objects of the invention, therefore, is the provision of a single crystal silicon wafer which, during the heat treatment cycles of essentially any electronic device manufacturing process, will form an ideal, non-uniform depth distribution of oxygen precipitates; the provision of such a wafer which will optimally and reproducibly form a denuded zone of sufficient depth and a sufficient density of oxygen precipitates in the wafer bulk; the provision of such wafer in which the formation of the denuded zone and the formation of the oxygen precipitates in the wafer bulk is not dependent upon difference in oxygen concentration in these regions of the wafer; the provision of such a wafer in which the thickness of the resulting denuded zone is essentially independent of the details of the integrated circuit manufacturing process sequence; the provision of such a wafer in which the formation of the denuded zoned and the formation of the oxygen precipitates in the wafer bulk is not influenced by the thermal history and the oxygen concentration of the Czochralski-grown single crystal silicon ingot from which the silicon wafer is sliced; the provision of a process in which the formation of the denuded zone does not depend upon the out-diffusion of oxygen; and the provision of a process in which the silicon is doped with nitrogen and/or carbon at a sufficient concentration to stabilize oxygen precipitate nucleation centers such that they can withstand subsequent rapid thermal processing without preventing the formation of the denuded zone.

Briefly, therefore, the present invention is directed to a single crystal silicon wafer having two major, generally parallel surfaces, one of which is the front surface of the wafer and the other of which is the back surface of the wafer, a central plane between the front and back surfaces, and a circumferential edge joining the front and back surfaces. The wafer also comprises a dopant selected from a group consisting of nitrogen and carbon, the concentration of the dopant being sufficient to promote the formation of stabilized oxygen precipitate nucleation centers as the wafer is cooled from a first temperature, T.sub.1, to a second temperature, T.sub.2, at a rate, R. The stabilized oxygen precipitation nucleation centers being incapable of are dissolved at a temperature less than about 1150.degree. C. but capable of being dissolved at a temperature between about 1150.degree. C. and about 1300.degree. C., T.sub.1 is between about 1150.degree. C. and about 1300.degree. C., T.sub.2 is a temperature at which crystal lattice vacancies are relatively immobile in silicon, and R is at least about 5.degree. C. per second. Still further, the wafer comprises a surface layer which comprises the region of the wafer between the front surface and a distance, D, measured from the front surface and toward the central plane, wherein the surface layer is free of stabilized oxygen precipitate nucleation centers. Also, the wafer comprises a bulk layer which comprises a second region of the wafer between the central plane and the surface layer, wherein the bulk layer comprises stabilized oxygen precipitate nucleation centers.

The present invention is also directed to a single crystal silicon wafer having two major, generally parallel surfaces, one of which is the front surface of the wafer and the other of which is the back surface of the wafer, a central plane between the front and back surfaces, and a circumferential edge joining the front and back surfaces. The wafer comprises a dopant selected from a group consisting of nitrogen and carbon, when nitrogen is the dopant, the the concentration of the nitrogen is between about 1.times.10.sup.12 and about 5.times.10.sup.14 atoms/cm.sup.3, and when carbon is the dopant, the concentration of carbon is between about 1.times.10.sup.16 and about 4.times.10.sup.17 atoms/cm.sup.3. The wafer also comprises a surface layer that comprises the region of the wafer between the front surface and a distance, D, measured from the front surface and toward the central plane, wherein the surface layer is free of stabilized oxygen precipitate nucleation centers. Additionally, the wafer comprises a bulk layer that comprises a second region of the wafer between the central plane and the surface layer, wherein the bulk layer comprises stabilized oxygen precipitate nucleation centers.

In yet another embodiment, the present invention is directed to a silicon on insulator structure comprising single crystal handle wafer, a single crystal silicon device layer, and an insulating layer between the handle wafer and the device layer. The single crystal silicon handle wafer comprises two major, generally parallel surfaces, one of which is the front surface of the wafer and the other of which is the back surface of the wafer, a central plane between the front and back surfaces, and a circumferential edge joining the front and back surfaces. The handle wafer also comprises a dopant selected from a group consisting of nitrogen and carbon, the concentration of the dopant being sufficient to promote the formation of stabilized oxygen precipitate nucleation centers as the wafer is cooled from a first temperature, T.sub.1, to a second temperature, T.sub.2, at a rate, R. The stabilized oxygen precipitation nucleation centers are incapable of being dissolved at a temperature less than about 1150.degree. C. but capable of being dissolved at a temperature between about 1150.degree. C. and about 1300.degree. C., T.sub.1 is between about 1150.degree. C. and about 1300.degree. C., T.sub.2 is a temperature at which crystal lattice vacancies are relatively immobile in silicon, and R is at least about 5.degree. C. per second. The handle wafer further comprises a surface layer which comprises the region of the wafer between the front surface and a distance, D, measured from the front surface and toward the central plane, wherein the surface layer is free of stabilized oxygen precipitate nucleation centers. Also, the handle wafer comprises a bulk layer which comprises a second region of the wafer between the central plane and the surface layer, wherein the bulk layer comprises stabilized oxygen precipitate nucleation centers.

The present invention is further directed to a process for the preparation of a single crystal silicon wafer having a controlled oxygen precipitation behavior. The process comprises selecting a wafer sliced from a single crystal silicon ingot grown by the Czochralski method and comprises a front surface, a back surface, a central plane between the front and back surfaces, a front surface layer which comprises the region of the wafer between the front surface and a distance, D, measured from the front surface and toward the central plane, a bulk layer which comprises the region of the wafer between the central plane and the front surface layer. The wafer also comprises a dopant selected from a group consisting of nitrogen and carbon, the concentration of the dopant being sufficient to promote the formation of stabilized oxygen precipitate nucleation centers as the wafer is cooled from a first temperature, T.sub.1, to a second temperature, T.sub.2, at a rate, R. The stabilized oxygen precipitation nucleation centers are incapable of being dissolved at a temperature less than about 1150.degree. C. but capable of being dissolved at a temperature between about 1150.degree. C. and about 1300.degree. C., T.sub.1 is between about 1150.degree. C. and about 1300.degree. C., T.sub.2 is a temperature at which crystal lattice vacancies are relatively immobile in silicon, and R is at least about 5.degree. C. per second. The process comprises heating the wafer to a temperature of at least about 1150.degree. C. to form crystal lattice vacancies in the front surface and bulk layers and cooling the heated wafer at a rate to form a vacancy concentration profile in the wafer wherein the peak density of vacancies is in the bulk layer with the concentration generally decreasing from the location of the peak density in the direction of the front surface of the wafer and the difference in the concentration of vacancies in the front surface and bulk layers is such that stabilized oxygen precipitate nucleation centers do not form in the front surface layer and stabilized oxygen precipitate nucleation centers form in the bulk layer. Also, the process comprises forming stabilized oxygen precipitate nucleation centers in the bulk layer as the wafer is being cooled with the concentration of the stabilized oxygen precipitate nucleation centers in the bulk layer being primarily dependant upon the concentration of vacancies.

In yet another embodiment, the present invention is directed to a process for the preparation of a single crystal silicon wafer having a controlled oxygen precipitation behavior. The process comprises selecting a wafer is sliced from a single crystal silicon ingot grown by the Czochralski method comprising a front surface, a back surface, a central plane between the front and back surfaces, a front surface layer which comprises the region of the wafer between the front surface and a distance, D, measured from the front surface and toward the central plane, a bulk layer which comprises the region of the wafer between the central plane and the front surface layer. The wafer also comprises a dopant selected from the group consisting of nitrogen and carbon, when nitrogen is the dopant, the concentration of the nitrogen is between about 1.times.10.sup.12 and about 5.times.10.sup.14 atoms/cm.sup.3, and when carbon is the dopant, the concentration of carbon is between about 1.times.10.sup.16 and about 4.times.10.sup.17 atoms/cm.sup.3. The process also comprises subjecting the wafer to a heat-treatment to form crystal lattice vacancies in the front surface and bulk layers. The heated-treated wafer is cooled at a rate that produces a vacancy concentration profile in the wafer wherein the peak density of vacancies is in the bulk layer with the concentration generally decreasing from the location of the peak density in the direction of the front surface of the wafer and the difference in the concentration of vacancies in the front surface and bulk layers is such that stabilized oxygen precipitate nucleation centers do not form in the front surface layer and stabilized oxygen precipitate nucleation centers form in the bulk layer. Additionally, as the heat-treated wafer is cooled, stabilized oxygen precipitate nucleation centers are formed in the bulk layer with the concentration of the stabilized oxygen precipitate nucleation centers in the bulk layer being primarily dependant upon the concentration of vacancies.

Other objects and features of this invention will be in part apparent and in part pointed out hereinafter.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic depiction of the process of the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

In accordance with the present invention, an ideal precipitating wafer has been discovered which, during essentially any electronic device manufacturing process, will form a denuded zone of sufficient depth and a wafer bulk containing a sufficient density of oxygen precipitates for IG purposes. Advantageously, this ideal precipitating wafer may be prepared in a matter of minutes using tools which are in common use in the semiconductor silicon manufacturing industry. This process creates a "template" in the silicon which determines or "prints" the manner in which oxygen will ultimately precipitate. In accordance with the present invention, this template is stabilized such that it may survive a subsequent rapid thermal heat treatment (e.g., epitaxial deposition and/or oxygen implantation) without an intervening thermal stabilization anneal.

A. Starting Material

The starting material for the ideal precipitating wafer of the present invention is a single crystal silicon wafer comprising nitrogen and/or carbon as a dopant. The concentration of the dopant is selected to accommodate two opposing desirable characteristics: (i) the ability to dissolve any oxygen precipitation nucleation centers in the starting wafer so that oxygen ultimately precipitates according to the ideal template (i.e., a denuded zone free of oxygen precipitates and an intrinsic gettering region in the wafer bulk comprising oxygen precipitates); and (ii) the ability to grow oxygen precipitate nucleation centers that are sufficiently large, or stable, during the process of the present invention such that the nucleation centers will not dissolve during a subsequent rapid thermal treatment such as epitaxial deposition and erase the installed precipitate template. To realize the stabilizing benefit while maintaining the ability to form a denuded zone, the concentration of dopant in the silicon is typically between about 1.times.10.sup.12 atoms/cm.sup.3 (about 0.00002 ppma) and 1.times.10.sup.15 atoms/cm.sup.3 (about 0.02 ppma). In another embodiment of the present invention, the concentration of nitrogen is between about 1.times.10.sup.12 atoms/cm.sup.3 and about 1.times.10.sup.13 atoms/cm.sup.3 (0.0002 ppma). If the concentration of the nitrogen is too low, e.g., less than about 1.times.10.sup.12 atoms/cm.sup.3 (about 0.00002 ppma), the stabilizing effect may not be realized (i.e., they may be dissolved at a temperature less than about 1150.degree. C.). On the other hand, if the concentration of nitrogen is too high, e.g., greater than about 1.times.10.sup.15 atoms/cm.sup.3 (about 0.02 ppma), the oxygen precipitation nucleation centers formed during the growth of the crystal may not be dissolved during the rapid thermal annealing step of the process of the present invention.

Additionally, if the silicon crystal contains too much nitrogen, oxidation induced stacking faults (OISF) will tend to form throughout the wafer which negatively impacts the quality of the wafer and any epitaxial layer deposited thereon (see Japanese Patent Office Publication Number 1999-189493). Specifically, OISF on the surface of a silicon wafer, unlike other vacancy-type defects, are not covered by the deposition of an epitaxial silicon layer. OISF continue to grow through the epitaxial layer and result in grown-in defects commonly referred to as epitaxial stacking faults. Epitaxial stacking faults have a maximum cross-sectional width ranging from the current detection limit of a laser-based auto-inspection device of about 0.1 .mu.m to greater than about 10 .mu.m.

In accordance with the present invention, wafer may comprise carbon instead of, or in conjunction with, nitrogen in order to stabilize the oxygen precipitate nucleation centers. In one embodiment, the concentration of carbon in the ingot is between about 1.times.10.sup.16 atoms/cm.sup.3 (0.2 ppma) and about 4.times.10.sup.17 atoms/cm.sup.3 (8 ppma). In another embodiment the concentration of carbon is between about 1.5.times.10.sup.16 atoms/cm.sup.3 (0.3 ppma) and about 3.times.10.sup.17 atoms/cm.sup.3 (6 ppma).

Czochralski-grown silicon typically has an interstitial oxygen concentration within the range of about 5.times.10.sup.17 to about 9.times.10.sup.17 atoms/cm.sup.3 (ASTM standard F-121-83). Because the oxygen precipitation behavior of the wafer becomes essentially decoupled from the oxygen concentration in the ideal precipitating wafer, the starting wafer may have an oxygen concentration falling anywhere within or even outside the range attainable by the Czochralski process.

During the growth of a silicon single crystal ingot having no more than a typical impurity level of nitrogen and/or carbon, the silicon is cooled from its melting temperature (about 1410.degree. C.) and as the silicon cools through the temperature range of about 700.degree. C. to about 350.degree. C., vacancies and oxygen can interact to form oxygen precipitate nucleation centers in the ingot. Without being held to a particular theory, it is presently believed that the nitrogen/carbon dopant atoms promote the formation of oxygen precipitate nucleation centers by retarding the diffusion of the vacancies in single crystal silicon. Specifically, as the concentration of nitrogen and/or carbon is increased above the impurity level, the decreasing diffusion rate of the vacancies increases the temperature at which the critical supersaturation of vacancies and oxygen occurs. For example, the critical supersaturation temperature for silicon having a concentration of nitrogen and/or carbon within the range as set forth above is shifted to between about 800.degree. C. and about 1050.degree. C. At the higher critical supersaturation temperature the concentration of vacancies is greater and the oxygen atoms are more mobile which allows for increased interaction between the two. Additionally, raising the critical supersaturation temperature for a comparable ingot growth process, allows the silicon to reside within the temperature range that oxygen precipitate nucleation centers form and grow for longer period of time. These factors result in the formation of larger, more stable, oxygen precipitate nucleation centers.

In accordance with the present invention, the presence or absence of nucleation centers in the starting material is not critical because they are capable of being dissolved by heat-treating the silicon at a temperature between about 1150.degree. C. and about 1300.degree. C. Although the presence (or density) of oxygen precipitation nucleation centers cannot be directly measured using presently available techniques, their presence may be detected by subjecting the silicon wafer to an oxygen precipitation heat treatment such as annealing the wafer at a temperature of 800.degree. C. for four hours and then at a temperature of 1000.degree. C. for sixteen hours. The detection limit for oxygen precipitates is currently about 5.times.10.sup.16 precipitates/cm.sup.3.

The wafer is sliced from an ingot grown in accordance with conventional Czochralski crystal growing method. During the growth of the ingot, nitrogen and/or carbon may be introduced into the ingot by several methods including, for example, gaseous nitrogen/carbon into the growth chamber and/or adding solid nitrogen/carbon to the polysilicon melt. The amount of dopant being added to the growing crystal is more precisely controlled by adding the solid dopant to the polysilicon melt, as such, it is typically used. For example, the amount of nitrogen/carbon added to the crystal is readily determined, for example, by depositing a layer of silicon nitride (Si.sub.3 N.sub.4) or silicon carbide (SiC) of a known thickness on silicon wafers of a known diameter which are introduced into the crucible with the polysilicon prior to forming the silicon melt (the densities of Si.sub.3 N.sub.4 and SiC are about 3.18 g/cm.sup.3 and about 3.21 g/cm.sup.3, respectively).

Standard Czochralski growth methods, as well as standard silicon slicing, lapping, etching, and polishing techniques are disclosed, for example, in F. Shimura, Semiconductor Silicon Crystal Technology, Academic Press, 1989, and Silicon Chemical Etching, (J. Grabmaier ed.) Springer-Verlag, New York, 1982 (incorporated herein by reference). The starting material for the process of the present invention may be a polished silicon wafer, or alternatively, a silicon wafer which has been lapped and etched but not polished. In addition, the wafer may have vacancy or self-interstitial point defects as the predominant intrinsic point defect. For example, the wafer may be vacancy dominated from center to edge, self-interstitial dominated from center to edge, or it may contain a central core of vacancy of dominated material surrounded by an axially symmetric ring of self-interstitial dominated material. processing methods.

Referring now to FIG. 1, the starting material for the ideal precipitating wafer of the present invention, single crystal silicon wafer 1, has a front surface 3, a back surface 5, and an imaginary central plane 7 between the front and back surfaces. The terms "front" and "back" in this context are used to distinguish the two major, generally planar surfaces of the wafer; the front surface of the wafer as that term is used herein is not necessarily the surface onto which an electronic device will subsequently be fabricated nor is the back surface of the wafer as that term is used herein necessarily the major surface of the wafer which is opposite the surface onto which the electronic device is fabricated. In addition, because silicon wafers typically have some total thickness variation (TTV), warp and bow, the midpoint between every point on the front surface and every point on the back surface may not precisely fall within a plane; as a practical matter, however, the TTV, warp and bow are typically so slight that to a close approximation the midpoints can be said to fall within an imaginary central plane which is approximately equidistant between the front and back surfaces.

B. Vacancy Formation in the Doped Silicon Wafer

In accordance with the present invention, the wafer is subjected to a heat-treatment step, step S.sub.2 (optional step S.sub.1 is described in greater detail below), in which the wafer is heated to an elevated temperature to form and thereby increase the number density of crystal lattice vacancies 13 in wafer 1. Preferably, this heat-treatment step is carried out in a rapid thermal annealer in which the wafers are rapidly heated to a target temperature, T.sub.1, and annealed at that temperature for a relatively short period of time (e.g., they are capable of heating a wafer from room temperature to 1200.degree. C. in a few seconds). One such commercially available RTA furnace is the model 2800 furnace available from STEAG AST Electronic GmbH (Dornstadt, Germany). In general, the wafer is subjected to a temperature in excess of 1150.degree. C. Typically, the wafer is heated to a temperature between about 1200 and about 1275.degree. C., and more typically between about 1225 and 1250.degree. C.

Intrinsic point defects (vacancies and silicon self-interstitials) are capable of diffusing through single crystal silicon with the rate of diffusion being temperature dependant. The concentration profile of intrinsic point defects, therefore, is a function of the diffusivity of the intrinsic point defects and the recombination rate as a function of temperature. For example, the intrinsic point defects are relatively mobile at temperatures in the vicinity of the temperature at which the wafer is annealed in the rapid thermal annealing step whereas they are essentially immobile for any commercially practical time period at temperatures of as much as 700.degree. C. Experimental evidence obtained to-date suggests that the effective diffusion rate of vacancies slows considerably at temperatures less than about 700.degree. C. and perhaps as great as 800.degree. C., 900.degree. C., or even 1,000.degree. C., the vacancies can be considered to be immobile for any commercially practical time period.

In addition to causing the formation of crystal lattice vacancies, the rapid thermal annealing step causes the dissolution of pre-existing oxygen precipitate nucleation centers which are present in the silicon starting material. These nucleation centers may be formed, for example, during the growth of the single crystal silicon ingot from which the wafer was sliced, or as a consequence of some other event in the previous thermal history of the wafer or of the ingot from which the wafer is sliced. Thus, the presence or absence of these nucleation centers in the starting material is not critical, provided these centers are capable of being dissolved during the rapid thermal annealing step.

During the heat-treatment, the wafer is exposed to an atmosphere comprising a gas or gasses selected to produce a vacancy concentration profile which, in one embodiment is relatively uniform and which, in another embodiment, is non-uniform.

1. Non-nitriding and Non-oxidizing Atmosphere Embodiment

In a one embodiment, the wafer 1 is heat-treated in a non-nitriding atmosphere and non-oxidizing atmosphere (i.e., an inert atmosphere). When a non-nitrogen, non-oxygen-containing gas is used as the atmosphere or ambient in the rapid thermal annealing step and cooling step, the increase in vacancy concentration throughout the wafer is achieved nearly, if not immediately, upon achieving the annealing temperature. The profile of the resulting vacancy concentration (number density) in the wafer during the heat-treatment is relatively constant from the front of the wafer to the back of the wafer. The wafer will generally be maintained at this temperature for at least one second, typically for at least several seconds (e.g., at least 3 seconds), preferably for several tens of seconds (e.g., 20, 30, 40, or 50 seconds) and, depending upon the desired characteristics of the wafer, for a period which may range up to about 60 seconds (which is near the limit for commercially available rapid thermal annealers). Maintaining the wafer at an established temperature during the anneal for additional time does not appear, based upon experimental evidence obtained to-date, to lead to an increase in vacancy concentration. Suitable gases include argon, helium, neon, carbon dioxide, and other such inert elemental and compound gasses, or mixtures of such gasses.

Experimental evidence obtained to-date suggests that the non-nitriding/non-oxidizing atmosphere preferably has no more than a relatively small partial pressure of oxygen, water vapor and other oxidizing gases; that is, the atmosphere has a total absence of oxidizing gases or a partial pressure of such gases which is insufficient to inject sufficient quantities of silicon self-interstitial atoms which suppress the build-up of vacancy concentrations. While the lower limit of oxidizing gas concentration has not been precisely determined, it has been demonstrated that for partial pressures of oxygen of 0.01 atmospheres (atm.), or 10,000 parts per million atomic (ppma), no increase in vacancy concentration and no effect is observed. Thus, it is preferred that the atmosphere have a partial pressure of oxygen and other oxidizing gases of less than 0.01 atm. (10,000 ppma); more preferably the partial pressure of these gases in the atmosphere is no more than about 0.005 atm. (5,000 ppma), more preferably no more than about 0.002 atm. (2,000 ppma), and most preferably no more than about 0.001 atm. (1,000 ppma).

2. Superficial Oxide Layer/Nitriding Atmosphere Embodiment

In another embodiment of the process of the present invention, the wafer 1 is heat-treated in an oxygen-containing atmosphere in step S.sub.1 to grow a superficial oxide layer 9 which envelopes wafer 1 prior to step S.sub.2. In general, the oxide layer will have a thickness which is greater than the native oxide layer which forms upon silicon (about 15 .ANG.). In this second embodiment, the thickness of the oxide layer is typically at least about 20 .ANG.. In some instances, the wafer will have an oxide layer that is at least about 25 or 30 .ANG. thick. Experimental evidence obtained to-date, however, suggests that oxide layers having a thickness greater than about 30 .ANG., while not interfering with the desired effect, provide little or no additional benefit.

After forming the oxide layer, the rapid thermal annealing step is typically carried out in the presence of a nitriding atmosphere, that is, an atmosphere containing nitrogen gas (N.sub.2) or a nitrogen-containing compound gas such as ammonia which is capable of nitriding an exposed silicon surface. Alternatively, or in addition, the atmosphere may comprise a non-oxidizing and non-nitriding gas such as argon. An increase in vacancy concentration throughout the wafer is achieved nearly, if not immediately, upon achieving the annealing temperature and vacancy concentration profile in the wafer is relatively uniform.

3. Native Oxide Layer/Nitriding Atmosphere Embodiment

In a third embodiment, the starting wafer has no more than a native oxide layer. When such a wafer is annealed in a nitriding atmosphere, the effect differs from that which is observed for the second embodiment. Specifically, when the wafer having an enhanced oxide layer is annealed in a nitrogen atmosphere a substantially uniform increase in the vacancy concentration is achieved throughout the wafer nearly, if not immediately, upon reaching the annealing temperature; furthermore, the vacancy concentration does not appear to significantly increase as a function of annealing time at a given annealing temperature. If the wafer lacks anything more than a native oxide layer and if the front and back surfaces of the wafer are annealed in nitrogen, the resulting wafer will have a vacancy concentration (number density) profile which is generally "U-shaped" for a cross-section of the wafer. That is, a maximum concentration of vacancies will occur at or within several micrometers of the front and back surfaces and a relatively constant and lesser concentration will occur throughout the wafer bulk with the minimum concentration in the wafer bulk initially being approximately equal to the concentration which is obtained in wafers having an enhanced oxide layer. Furthermore, an increase in annealing time will result in an increase in vacancy concentration in wafers lacking anything more than a native oxide layer.

Accordingly, referring again to FIG. 1, when a segment having only a native oxide layer is annealed in accordance with the present process under a nitriding atmosphere, the resulting peak concentration, or maximum concentration, of vacancies will initially be located generally within regions 15 and 15', while the bulk 17 of the silicon segment will contain a comparatively lower concentration of vacancies and nucleation centers. Typically, these regions of peak concentration will be located within several microns (i.e., about 5 or 10 microns), or tens of microns (i.e., about 20 or 30 microns), up to about 40 to about 60 microns, from the silicon segment surface.

4. Oxygen-containing Ambient

When the atmosphere or ambient in the rapid thermal annealing and cooling steps contains oxygen, or more specifically when it comprises oxygen gas (O.sub.2) or an oxygen-containing gas (e.g., pyrogenic steam) in combination with a nitrogen-containing gas, an inert gas or both, the vacancy concentration profile in the near surface region is affected. Experimental evidence to-date indicates that the vacancy concentration profile of a near-surface region bears an inverse relationship with atmospheric oxygen concentration. Without being bound to any particular theory, it is generally believed that, in sufficient concentration, annealing in oxygen results in the oxidation of the silicon surface and, as a result, acts to create an inward flux of silicon self-interstitials. The flux of silicon interstitials is controlled by the rate of oxidation which, in turn, can be controlled by the partial pressure of oxygen in the ambient. This inward flux of self-interstitials has the effect of gradually altering the vacancy concentration profile by causing recombinations to occur, beginning at the surface and then moving inward, with the rate of inward movement increasing as a function of increasing oxygen partial pressure. When oxygen is used in combination with a nitrogen-containing gas in the ambient during heat-treatment (S.sub.1 and/or S.sub.2), a "M-shaped" vacancy profile may be obtained, wherein the maximum or peak vacancy concentration is present in the wafer bulk between the central plane and a surface layer (the concentration generally decreasing in either direction). As a result of the presence of oxygen in the ambient, a region of low vacancy concentration of any arbitrary depth may be created.

Further, experimental evidence further suggests that the difference in behavior for wafers having no more than a native oxide layer and wafers having an enhanced oxide layer can be avoided by including molecular oxygen or another oxidizing gas in the atmosphere. Stated another way, when wafers having no more than a native oxide are annealed in a nitrogen atmosphere containing a small partial pressure of oxygen, the wafer behaves the same as wafers having an enhanced oxide layer (i.e., a relatively uniform concentration profile is formed in the heat-treated wafer). Without being bound to any theory, it appears that superficial oxide layers which are greater in thickness than a native oxide layer serve as a shield which inhibits nitridization of the silicon. This oxide layer may thus be present on the starting wafer or formed, in situ, by growing an enhanced oxide layer during the annealing step. If this is desired, the atmosphere during the rapid thermal annealing step preferably contains a partial pressure of at least about 0.0001 atm. (100 ppma), more preferably a partial pressure of at least about 0.0002 atm. (200 ppma). For the reasons previously discussed, however, the partial pressure of oxygen preferably does not exceed 0.01 atm. (10,000 ppma), and is more preferably less than 0.005 atm. (5,000 ppma), still more preferably less than 0.002 atm. (2,000 ppma), and most preferably less than 0.001 atm. (1,000 ppma).

In a fourth embodiment, therefore, the atmosphere during the rapid thermal annealing typically contains an oxygen partial pressure sufficient to obtain a denuded zone depth of less than about 30 microns. Typically the denuded zone depth ranges from greater than about 5 microns to less than about 30 microns, and can range from about 10 microns to about 25 microns, or from about 15 microns to about 20 microns. More specifically, the thermal treatment may be carried out in an atmosphere comprising a nitrogen-containing gas (e.g., N.sub.2), a non-oxygen, non-nitrogen containing gas (e.g., argon, helium, etc.), or a mixture thereof, and an oxygen-containing gas (e.g., O.sub.2 or pyrogenic steam), the atmosphere having an oxygen partial pressure sufficient to create an inward flux of interstitials (e.g., at least about 1 ppma, 5 ppma, 10 ppma or more) but less than about 500 ppma, preferably less than about 400 ppma, 300 ppma, 200 ppma, 150 ppma or even 100 ppma, and in some embodiments preferably less than about 50, 40, 30, 20 or even 10 ppma. When a mixture of a nitrogen-containing and a non-nitrogen, non-oxygen containing gas is used with the oxidizing gas, the respective ratio of the two (i.e., nitrogen-containing to inert gas) may range from about 1:10 to about 10:1, from about 1:5 to about 5:1, from about 1:4 to about 4:1, from about 1:3 to about 3:1, or from about 1:2 to about 2:1, with a ratio of nitrogen-containing gas to inert gas of about 1:5, 1:4, 1:3, 1:2 or 1:1 being preferred in some embodiments. Stated another way, if such a gaseous mixture is used as the atmosphere for the annealing and cooling steps, the concentration of nitrogen-containing gas therein may range from about 1% to less than about 100%, from about 10% to about 90%, from about 20% to about 80% or from about 40% to about 60%.

5. Simultaneous Exposure to Different Atmospheres

In other embodiments of the present invention, the front and back surfaces of the wafer may be exposed to different atmospheres, each of which may contain one or more nitriding or non-nitriding gases. For example, the back surface of the wafer may be exposed to a nitriding atmosphere as the front surface is exposed to a non-nitriding atmosphere. Wafers subjected to a thermal treatment having different atmospheres may have an asymmetric vacancy concentration profile depending on the condition of each surface and the atmosphere to which it is exposed. For example, if the front surface lacks anything more than a native oxide layer and the back surface has an enhanced oxide layer and the wafer is thermally treated in a nitriding atmosphere, the vacancy concentration in the front portion of the wafer will be more similar to the "U-shaped" profile while the back portion of the wafer will be more uniform in nature. Alternatively, multiple wafers (e.g., 2, 3 or more wafers) may be simultaneously annealed while being stacked in face-to


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