System and method for ESD protection Number:7,417,303 from the United States Patent and Trademark Office (PTO) owispatent An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programable attenuation and a programable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator. The VCOs in the PLLs are centered using a control circuit to center the tuning capacitance range. A differential crystal oscillator is advantageously used as a frequency reference. Differential signal transmission is advantageously used throughout the receiver. ESD protection is provided by a pad ring and ESD clamping structure that maintains signal integrity. Also provided are shunts at each pin to discharge ESD build up. The shunts utilize a gate boosting structure to provide sufficient small signal RF performance, and minimal parasitic loading.<H protection, method, System, and, meth, 7417303.html, Patent, pto, 7417303

Title: System and method for ESD protection

Abstract: An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programable attenuation and a programable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator. The VCOs in the PLLs are centered using a control circuit to center the tuning capacitance range. A differential crystal oscillator is advantageously used as a frequency reference. Differential signal transmission is advantageously used throughout the receiver. ESD protection is provided by a pad ring and ESD clamping structure that maintains signal integrity. Also provided are shunts at each pin to discharge ESD build up. The shunts utilize a gate boosting structure to provide sufficient small signal RF performance, and minimal parasitic loading.

Patent Number: 7,417,303 Issued on 08/26/2008 to Woo, et al.

Inventors: Woo; Agnes N. (Encino, CA), Kindsfater; Kenneth R. (Irvine, CA), Lu; Fang (Irvine, CA)
Assignee: Broadcom Corporation (Irvine, CA)

Appl. No.: 11/521,361

Filed: September 15, 2006

Related U.S. Patent Documents


Application Number	Filing Date	Patent Number	Issue Date
11171325	Jul., 2005	7115952
10198408	Jul., 2002	6963110
09483551	Jan., 2000	6445039
60122754	Feb., 1999
60117322	Jan., 1999
60116003	Jan., 1999

Current U.S. Class: 257/546 ; 257/355; 257/356; 257/357; 257/360

Current International Class: H01L 29/72 (20060101)

Field of Search: 257/546,355,356,357,360

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Primary Examiner: Wojciechowicz; Edward
Attorney, Agent or Firm: Sterne, Kessler, Goldstein & Fox P.L.L.C.

Parent Case Text

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is a continuation of U.S. application Ser. No. 11/171,325, filed Jul. 1, 2005, now U.S. Pat. No. 7,115,952, which is a continuation of U.S. application Ser. No. 10/198,408, filed Jul. 19, 2002, now U.S. Pat. No. 6,963,110, which is a continuation of U.S. application Ser. No. 09/483,551, filed Jan. 14, 2000, now U.S. Pat. No. 6,445,039, which claims the benefit of U.S. Provisional Application No. 60/116,003 filed Jan. 15, 1999; and claims the benefit of U.S. Provisional Application No. 60/117,322, filed Jan. 26, 1999; and claims the benefit of U.S. Provisional Application No. 60/122,754, filed Feb. 25, 1999.

Claims

The invention claimed is:

1. An integrated circuit bond pad, comprising: a first metal layer having a first surface area; a second metal layer having a second surface area less than said first surface area; wherein said first metal layer overlaps said second metal layer; wherein said first metal layer is connected to said second metal layer via a feed-through; and a substrate; wherein said first and second metal layers are disposed on said substrate and said second metal layer is located between said first metal layer and said substrate.

2. The bond pad of claim 1, wherein said substrate comprises a diffusion area and said second metal layer is located between said diffusion area and said first layer.

3. The bond pad of claim 2, wherein said diffusion area comprises a salicided diffusion implant.

4. The bond pad of claim 3, wherein said salicided diffusion implant reduces a parasitic capacitance of the bond pad.

5. The bond pad of claim 2, wherein said diffusion area is coupled to a voltage source to reduce: a first voltage between said diffusion area and said first metal layer; and a second voltage between said diffusion area and said second metal layer.

6. The bond pad of claim 1, wherein said first metal layer is coupled to a circuit block.

7. The bond pad of claim 1, wherein said first metal layer is coupled to an electrostatic discharge device.

8. The bond pad of claim 1, wherein said first metal layer is located between, and adjacent to, a first and a second electrostatic discharge device.

9. The bond pad of claim 1, wherein a perimeter of said second metal layer is not located outside of a polyhedron formed by extending a perimeter of said first metal layer to said substrate.

10. The bond pad of claim 1, wherein said first metal layer has a first cross-sectional shape and said second metal layer has a second cross-sectional shape that is substantially similar to said first cross-sectional shape, wherein an area of said second cross-sectional shape is smaller than an area of said first cross-sectional shape.

11. The bond pad of claim 1, further comprising an integrated circuit core, wherein the bond pad is coupled to said integrated circuit core.

12. The bond pad of claim 1, wherein said feed-through is a unitary structure.

13. The bond pad of claim 1, wherein said feed-through is configured to anchor said first layer to said second layer.

14. The bond pad of claim 1, wherein said feed-through is configured to prevent peeling of said first metal layer.

15. The bond pad of claim 1, wherein said feed-through is configured to prevent lifting-off of said first metal layer.

16. The bond pad of claim 1, further comprising an integrated circuit package connector, wherein the bond pad is wirebonded to the integrated circuit package connector.

17. The bond pad of claim 1, wherein the bond pad is disposed at a periphery of said substrate.

18. The bond pad of claim 1, wherein the first metal layer has a first surface, wherein said entire first surface is exposed to accept a wirebond.

19. The bond pad of claim 1, wherein the first metal layer is configured to accept a wirebond.

20. An integrated circuit bond pad, comprising: a first metal layer having a first surface area; a second metal layer having a second surface area less than said first surface area; wherein said first metal layer has a first cross-sectional shape and said second metal layer has a second cross-sectional shape that is substantially similar to said first cross-sectional shape, wherein an area of said second cross-sectional shape is smaller than an area of said first cross-sectional shape, and wherein said first metal layer completely overlaps said second metal layer; a unitary metal feed-through anchoring said first metal layer to said second metal layer; and a substrate comprising a salicided diffusion implant, wherein said first and second metal layers are disposed on said substrate, and wherein said second metal layer is located between said salicided diffusion implant and said first layer.

21. The bond pad of claim 20, wherein the first metal layer has a first surface and a second surface, wherein said entire first surface is exposed to accept a wirebond and said second surface is coupled to said feed-through.

22. The bond pad of claim 20, wherein said salicided diffusion implant reduces a parasitic capacitance of the bond pad.

23. The bond pad of claim 20, wherein said first metal layer is configured to accept a wirebond.

24. The bond pad of claim 20, further comprising an integrated circuit core, wherein the bond pad is coupled to said integrated circuit core.

25. The bond pad of claim 20, further comprising an integrated circuit package connector, wherein the bond pad is wirebonded to the integrated circuit package connector.

Description

BACKGROUND OF THE INVENTION

Radio receivers, or tuners, are widely used in applications requiring the reception of electromagnetic energy. Applications can include broadcast receivers such as radio and television, set top boxes for cable television, receivers in local area networks, test and measurement equipment, radar receivers, air traffic control receivers, and microwave communication links among others. Transmission of the electromagnetic energy may be over a transmission line or by electromagnetic radio waves.

The design of a receiver is one of the most complex design tasks in electrical engineering. In the current state of the art, there are many design criteria that must be considered to produce a working radio receiver. Tradeoffs in the design's performance are often utilized to achieve a given objective. There are a multitude of performance characteristics that must be considered in designing the receiver. However, certain performance characteristics are common to all receivers. Distortion and noise are two such parameters. The process of capturing the signal creates distortion that must be accounted for in the design of the radio receiver. Once a radio signal is captured, the noise surrounding the received signal in the receiver must be considered. Radio signals are often extremely weak and if noise is present in the circuit, the signal, even though satisfactorily received, can be easily lost in this noise floor. The current state of the art in receiver design is often directed to overcoming these receiver limitations in a cost effective manner.

In an integrated radio receiver ESD discharge circuitry is typically utilized to protect the integrated circuit from static discharge. Radio signals in a receiver tend to be of small amplitude and high frequency and are therefore susceptible to distortion caused by capacitive loading by standard ESD control methods. It is therefore desirable to provide a system of ESD protection that does not interfere with the reception of the high frequency, small amplitude signals.

SUMMARY OF THE INVENTION

There is therefore provided in a present embodiment of the invention, an integrated circuit ESD protection system.

An embodiment of the integrated circuit protection system comprises a voltage reference pad ring and an inner ground pad ring disposed around the perimeter of the IC, with the IC bonding pads disposed within the perimeter of the pad rings. One or more local power supply and ground bus systems are linked to the pad rings. The bus systems each comprise a first local ESD clamp coupled between the local power supply line and local ground line, a second local ESD clamp coupled between a local voltage bus and the voltage reference pad ring, and a third ESD clamp coupled between a local ground bus and the ground pad ring.

The IC bonding pads are coupled to a ggNMOS transistor that discharges built up static charge from the IC bonding pad. A drain and a source connection of the ggNMOS transistor is coupled between the bonding pad and ground. The ggNMOS transistor is activated by a static charge build up that activates a gate boosting structure.

The IC bonding pads are constructed with a reduced area, and number of layers over a salicided diffusion implant to reduce capacitance.

DESCRIPTION OF THE DRAWINGS

These and other features and advantages of the present invention will be better understood from the following detailed description read in light of the accompanying drawings, wherein

FIG. 1 is an illustration of a portion of the over-the-air broadcast spectrum allocations in the United States;

FIG. 2 is an illustration of the frequency spectrum of harmonic distortion products;

FIG. 3 is an illustration of a spectrum of even and odd order intermodulation distortion products;

FIG. 4 is an illustration of interference caused at the IF frequency by a signal present at the image frequency;

FIG. 5 is an illustration of a typical dual conversion receiver utilizing an up conversion and a subsequent down conversion;

Oscillator Figures

FIG. 6 is a semi-schematic simplified timing diagram of differential signals, including a common mode component, as might be developed by a differential crystal oscillator in accordance with the invention;

FIG. 7 is a semi-schematic block diagram of a differential crystal oscillator, including a quartz crystal resonator and oscillator circuit differentially coupled to a linear buffer amplifier in accordance with the invention;

FIG. 8 is a simplified schematic illustration of differential signals present at the output of a crystal resonator;

FIG. 9 is a simplified schematic diagram of a quartz crystal resonator equivalent circuit;

FIG. 10 is a simplified graphical representation of a plot of impedance vs. frequency for a crystal resonator operating near resonance;

FIG. 11 is a simplified graphical representation of a plot of phase vs. frequency for a crystal resonator operating near resonance;

FIG. 12 is a simplified schematic diagram of the differential oscillator circuit of FIG. 7;

FIG. 13 is a simplified, semi-schematic block diagram of a periodic signal generation circuit including a crystal oscillator having balanced differential outputs driving cascaded linear and non-linear buffer stages;

FIG. 14 is a simplified schematic diagram of a differential folded cascade linear amplifier suitable for use in connection with the present invention;

FIG. 15 is a simplified, semi-schematic diagram of a differential nonlinear buffer amplifier suitable for use as a clock buffer in accordance with the invention;

FIG. 16 is a semi-schematic illustration of an alternative embodiment of the differential oscillator driver circuit;

FIG. 17 is an block diagram of a differential crystal oscillator as a reference signal generator in a phase-lock-loop; and

FIG. 18 is a simplified block diagram of an illustrative frequency synthesizer that might incorporate the differential periodic signal generation circuit of the invention.

Coarse/Fine PLL Tuning Figures

FIG. 19 is a block diagram illustrating the exemplary frequency conversions for receiver tuning utilized in the embodiments of the invention;

FIG. 20 is a block diagram of an exemplary tuner designed to receive a 50 to 860 MHz bandwidth containing a multiplicity of channels;

FIG. 21 is an exemplary table of frequencies utilizing coarse and fine PLL tuning to derive a 44 MHz IF;

FIG. 22 is an illustration of an alternative embodiment of the coarse and fine PLL tuning method to produce an exemplary final IF of 36 MHz;

FIG. 23 is a block diagram of a dummy component used to model an operative component on an integrated circuit chip;

Filter Tuning Figures

FIG. 24a is a block diagram of a tuning process, FIG. 24b is a flow diagram of the tuning process, and FIG. 24c is an exemplary illustration of the tuning process;

FIG. 25 is a block diagram of an exemplary tuning circuit;

FIG. 26 illustrates the amplitude and phase relationship in an LC filter at resonance;

FIG. 27 is a schematic diagram showing the configuration of switchable capacitors in a differential signal transmission embodiment;

Inductor Q Temperature Compensation Figures

FIG. 28 is an illustration of a typical spiral inductor suitable for integrated circuit applications;

FIG. 29 is an illustration of the effect of decreasing "Q", on the selectivity of a tuned circuit;

FIG. 30 is an illustration of a typical filter bank utilized in embodiments of the invention for filtering I and Q IF signals;

FIG. 31 is a diagram of a transconductance stage with an LC load;

FIG. 32 shows a transconductance stage with an LC load and Q enhancement;

FIG. 33 shows a method of tuning inductor Q over temperature;

Communications Receiver Figures

FIG. 34 is a block diagram of a communications network utilizing a receiver according to any one of the exemplary embodiments of the invention;

Receiver Front End-Programable Attenuator and LNA Figures

FIG. 35 is an is an illustration of the input and output signals of the integrated switchless programmable attenuator and low noise amplifier;

FIG. 36 is a functional block diagram of the integrated switchless programmable attenuator and low noise amplifier circuit;

FIG. 37 is a simplified diagram showing the connection of multiple attenuator sections to the output of the integrated switchless programmable attenuator and low noise amplifier;

FIG. 38 is an illustration of an exemplary embodiment showing how the attenuator can be removed from the circuit so that only the LNAs are connected;

FIG. 39 is an attenuator circuit used to achieve one dB per step attenuation;

FIG. 40 is an exemplary embodiment of an attenuator for achieving a finer resolution in attenuation then shown in FIG. 5;

FIG. 41 is an illustration of the construction of series and parallel resistors used in the attenuator circuit of the integrated switchless programmable attenuator and low noise amplifier;

FIG. 42 is an illustration of a preferred embodiment utilized to turn on current tails of the differential amplifiers;

FIG. 43 is an illustration of an embodiment showing how the individual control signals used to turn on individual differential pair amplifiers are generated from a single control signal;

FIGS. 44a and 44b are illustrations of an embodiment of comparator circuitry used to activate individual LNA amplifier stages;

Local Oscillator Generation Figures

FIG. 45 is a block diagram illustrating the exemplary generation of the local oscillator signals utilized in the embodiments of the invention;

Narrow Band VCO Tuning Figures

FIG. 46 is a schematic of a PLL having its VCO controlled by an embodiment of a VCO tuning control circuit;

FIG. 47 is a process flow diagram illustrating the process of tuning the VCO with an embodiment of a VCO control circuit;

Receiver Figures

FIG. 48 is a block diagram of the first exemplary embodiment of the invention;

FIG. 49 is an illustration of the frequency planning utilized in the exemplary embodiments of the invention;

FIG. 50 is a block diagram showing how image frequency cancellation is achieved in an I/Q mixer;

FIG. 51 is a block diagram of the second exemplary embodiment of the present invention;

FIG. 52 is a block diagram of the third exemplary embodiment of the present invention;

FIG. 53 is a block diagram of a CATV tuner that incorporates the fully integrated tuner architecture; and

Telephony Over Cable Embodiment Figure

FIG. 54 is a block diagram of a low power embodiment of the receiver that has been configured to receive cable telephony signals.

Electronic Circuits Incorporating Embodiments of the Receiver Figures

FIG. 55 is a block diagram of a set top box that incorporates the receiver embodiments;

FIG. 56 is a block diagram of a television that incorporates the receiver embodiments;

FIG. 57 is a block diagram of a VCR that incorporates the receiver embodiments;

FIG. 58 is a block diagram of a cable modem that incorporates the integrated switchless programmable attenuator and low noise amplifier.

ESD Protection

FIG. 59 is an illustration of a typical integrated circuit die layout;

FIG. 60 illustrates an embodiment of the invention that utilizes pad ring power and ground busses;

FIG. 61 is an illustration of the connection of a series of power domains to a pad ring bus structure;

FIG. 62 is an illustration of an embodiment utilizing an ESD ground ring;

FIG. 63 is an illustration of the effect of parasitic circuit elements on an RF input signal;

FIG. 64 illustrates a cross-talk coupling mechanism;

FIG. 65 is an illustration of an ESD device disposed between a connection to a bonding pad and power supply traces;

FIG. 66 is an illustration of parasitic capacitance in a typical bonding pad arrangement on an integrated circuit;

FIG. 67 is an illustration of a embodiment of a bonding pad arrangement tending to reduce parasitic capacitances;

FIG. 68 illustrates a cross section of the bonding pad structure of FIG. 67;

FIG. 69 illustrates various ESD protection schemes utilized in the state of the art to protect an integrated circuit from ESD discharge due to charge build up on a die pad;

FIG. 70 illustrates an approach to pad protection during ESD event;

FIG. 71 is a schematic of a circuit immune to noise that uses an ggNMOS' C.sub.gd and a gate boosting structure to trigger ESD protection;

FIG. 72 is a schematic of an alternative embodiment utilizing the gate boosting structure and a cascode configuration; and

FIG. 73 is a schematic of an embodiment that does not require a quiet power supply.

DETAILED DESCRIPTION OF THE INVENTION

FIG. 1 is an illustration of a portion of the radio frequency spectrum allocations by the FCC. Transmission over a given media occurs at any one of a given range of frequencies that are suitable for transmission through a medium. A set of frequencies available for transmission over a medium are divided into frequency bands 102. Frequency bands are typically allocations of frequencies for certain types of transmission. For example FM radio broadcasts, FM being a type of modulation, is broadcast on the band of frequencies from 88 MHz to 108 MHz 104. Amplitude modulation (AM), another type of modulation, is allocated the frequency band of 540 kHz to 1,600 kHz 106. The frequency band for a type of transmission is typically subdivided into a number of channels. A channel 112 is a convenient way to refer to a range of frequencies allocated to a single broadcast station. A station broadcasting on a given channel may transmit one or more radio frequency (RF) signals within this band to convey the information of a broadcast. Thus, several frequencies transmitting within a given band may be used to convey information from a transmitter to a broadcast receiver. For example, a television broadcast channel broadcasts its audio signal(s) 108 on a frequency modulated (FM) carrier signal within the given channel. A TV picture (P) 110 is a separate signal broadcast using a type of amplitude modulation (AM) called vestigial side band modulation (VSB), and is transmitted within this channel.

In FIG. 1 channel allocations for a television broadcast band showing the locations of a picture and a sound carrier frequencies within a channel are shown. Each channel 112 for television has an allocated fixed bandwidth of 6 MHz. The picture 110 and sound 108 carriers are assigned a fixed position relative to each other within the 6 MHz band. This positioning is not a random selection. The picture and sound carriers each require a predetermined range of frequencies, or a bandwidth (BW) to sufficiently transmit the desired information. Thus, a channel width is a fixed 6 MHz, with the picture and sound carrier position fixed within that 6 MHz band, and each carrier is allocated a certain bandwidth to transmit its signal.

In FIG. 1 it is seen that there are gaps between channels 114, and also between carrier signals 116. It is necessary to leave gaps of unused frequencies between the carriers and between the channels to prevent interference between channels and between carriers within a given channel. This interference primarily arises in the receiver circuit that is used to receive these radio frequency signals, convert them to a usable frequency, and subsequently demodulate them.

Providing a signal spacing allows the practical design and implementation of a receiver without placing unrealistic requirements on the components in the receiver. The spaces help prevent fluctuations in the transmission frequency or spurious responses that are unwanted byproducts of the transmission not to cause interference and signal degradation within the receiver. Also, signal spacing allows the design requirements of frequency selective circuits in the receiver to be relaxed, so that the receiver may be built economically while still providing satisfactory performance. These spectrum allocations and spacings were primarily formulated when the state of the art in receiver design consisted of discrete components spaced relatively far apart on a printed circuit board. The increasing trend towards miniaturization has challenged these earlier assumptions. The state of the art in integrated circuit receiver design has advanced such that satisfactory performance must be achieved in light of the existing spectrum allocations and circuit component crowding on the integrated circuit. New ways of applying existing technology, as well as new technology are continually being applied to realize a miniaturized integrated receiver that provides satisfactory performance. Selectivity is a principal measure of receiver performance. Designing for sufficient selectivity not only involves rejecting other channels, but the rejection of distortion products that are created in the receiver or are part of the received signal. Design for minimization or elimination of spurious responses is a major objective in state of the art receiver design.

FIG. 2 is an illustration of harmonic distortion products. Transmitted spurious signals, and spurious signals generated in a receiver, most commonly consist of harmonics created by one frequency and intermodulation distortion, created by the interaction of multiple frequencies. Spurious signals at other than the desired frequency arise from the inherent nonlinear properties in the circuit components used. These nonlinearities can not be eliminated, but by careful engineering the circuitry can be designed to operate in a substantially linear fashion.

When a single frequency called a fundamental 202 is generated, unwanted spurious signals 204 are always generated with this fundamental. The spurious signals produced as a result of generating a single frequency (f) 202 are called harmonics 204 and occur at integer multiples of the fundamental frequency (2f, 3f, . . . ) The signal strength or amplitude of these harmonics decrease with increasing harmonic frequency. Fortunately these distortion products fall one or more octaves away from the desired signal, and can usually be satisfactorily filtered out with a low pass filter that blocks all frequencies above a pre-selected cut-off frequency. However, if the receiver is a wide band or multi octave bandwidth receiver, these harmonics will fall within the bandwidth of the receiver and cannot be low pass filtered, without also filtering out some of the desired signals. In this case, other methods known to those skilled in the art, such as reducing the distortion products produced, must be used to eliminate this distortion.

Radio signals do not exist in isolation. The radio frequency spectrum is populated by many channels within a given band transmitting at various frequencies. When a radio circuit is presented with two or more frequencies, these frequencies interact, or intermodulate, to create distortion products that occur at known frequency locations.

FIG. 3 is an illustration of intermodulation distortion products. Whenever two or more frequencies are present they interact to produce additional spurious signals that are undesired. FIG. 3 illustrates a spurious response produced from the interaction of two signals, f.sub.1 302 and f.sub.2 304. This particular type of distortion is called intermodulation distortion (IMD). These intermodulation distortion products 306 are assigned orders, as illustrated. In classifying the distortion the IM products are grouped into two families, even and odd order IM products. Odd order products are shown in FIG. 3.

In a narrow band systems the even order IM products can be easily filtered out, like harmonics, because they occur far from the two original frequencies. The odd order IM products 306 fall close to the two original frequencies 302, 304. In a receiver these frequencies would be two received signals or a received channel and a local oscillator. These products are difficult to remove. The third order products 306 are the most problematic in receiver design because they are typically the strongest, and fall close within a receiver's tuning band close to the desired signal. IM distortion performance specifications are important because they are a measure of the receiver's immunity to strong out of band signal interference.

Third order products 308 occur at (f.sub.1-.DELTA.f) and at (f.sub.2+.DELTA.f), where .DELTA.f=f.sub.2-f.sub.1. These unwanted signals may be generated in a transmitter and transmitted along with desired signal or are created in a receiver. Circuitry in the receiver is required to block these signals. These unwanted spurious responses arise from nonlinearities in the circuitry that makes up the receiver.

The circuits that make up the receiver though nonlinear are capable of operating linearly if the signals presented to the receiver circuits are confined to signal levels within a range that does not call for operation of the circuitry in the nonlinear region. This can be achieved by careful design of the receiver.

For example, if an amplifier is over driven by signals presented to it greater than it was designed to amplify, the output signal will be distorted. In an audio amplifier this distortion is heard on a speaker. In a radio receiver the distortion produced in nonlinear circuits, including amplifiers and mixers similarly causes degradation of the signal output of the receiver. On a spectrum analyzer this distortion can be seen; levels of the distortion increase to levels comparable to the desired signal.

While unwanted distortion such as harmonic distortion, can be filtered out because the harmonics most often fall outside of the frequency band received, other distortion such as inter-modulation distortion is more problematic. This distortion falls within a received signal band and cannot be easily filtered out without blocking other desired signals. Thus, frequency planning is often used to control the location of distortion signals that degrade selectivity.

Frequency planning is the selection of local oscillator signals that create the intermediate frequency (IF) signals of the down conversion process. It is an analytical assessment of the frequencies being used and the distortion products associated with these frequencies that have been selected. By evaluating the distortion and its strength, an engineer can select local oscillator and IF frequencies that will yield the best overall receiver performance, such as selectivity and image response. In designing a radio receiver, the primary problems encountered are designing for sufficient sensitivity, selectivity and image response.

Selectivity is a measure of a radio receiver's ability to reject signals outside of the band being tuned by a radio receiver. A way to increase selectivity is to provide a resonant circuit after an antenna and before the receiver's frequency conversion circuitry in a "front end." For example, a parallel resonant circuit after an antenna and before a first mixer that can be tuned to the band desired will produce a high impedance to ground at the center of the band. The high impedance will allow the antenna signal to develop a voltage across this impedance. Signals out of band will not develop the high voltage and are thus attenuated.

The out of band signal rejection is determined by a quality factor or "Q" of components used in the resonant circuit. The higher the Q of a circuit in the preselector, the steeper the slope of the impedance curve that is characteristic of the preselector will be. A steep curve will develop a higher voltage at resonance for signals in band compared to signals out of band.

For a resonant circuit with low Q a voltage developed across the resonant circuit at a tuned frequency band will be closer in value to the voltage developed across the resonant circuit out of band. Thus, an out of band signals would be closer in amplitude to an in band signals than if a high Q circuit were constructed.

This type of resonant circuit used as a preselector will increase frequency selectivity of a receiver that has been designed with this stage at its input. If an active preselector circuit is used between an antenna and frequency conversion stages, the sensitivity of the receiver will be increased as well as improving selectivity. If a signal is weak its level will be close to a background noise level that is present on an antenna in addition to a signal. If this signal cannot be separated from the noise, the radio signal will not be able to be converted to a signal usable by the receiver. Within the receiver's signal processing chain, the signal's amplitude is decreased by losses at every stage of the processing. To make up for this loss the signal can be amplified initially before it is processed. Thus, it can be seen why it is desirable to provide a circuit in the receiver that provides frequency selectivity and gain early in the signal processing chain.

Radio frequency tuners are increasingly being designed with major portions of their circuitry implemented as an integrated circuit. In the state of the art to minimize distortion products created in the receiver, exotic materials such as gallium arsenide (GaAs) are used. A receiver implemented on this type of material will typically have lower distortion and noise present than in a similarly constructed receiver constructed on silicon. Silicon, is an attractive material due to its low cost. In addition, a CMOS circuit implemented on silicon has the additional benefit of having known processing characteristics that allow a high degree of repeatability from lot to lot of wafers. The state of the art has not achieved a completely integrated receiver in CMOS circuitry. A reason for this is the difficulty of eliminating receiver distortion and noise.

The distortion products discussed above that are created in the receiver can, in the majority of cases, also be reduced by setting an appropriate drive level in the receiver, and by allowing a sufficient spacing between carriers and channels. These receiver design parameters are dependent upon many other factors as well, such as noise present in the system, frequency, type of modulation, and signal strength among others. Noise is one of the most important of these other parameters that determines the sensitivity of the receiver, or how well a weak signal may be satisfactorily received.

Noise is present with the transmitted signal, and also generated within a receiver. If excessive noise is created in a receiver a weak signal may be lost in a "noise floor". This means that the strength of the received signal is comparable to the strength of the noise present, and the receiver is incapable of satisfactorily separating a signal out of this background noise, or floor. To obtain satisfactory performance a "noise floor" is best reduced early in a receiver's chain of circuit components.

Once a signal is acquired and presented to a receiver, in particularly an integrated receiver with external pins, additional noise may be radiated onto those pins. Thus, additional added noise at the receiver pins can degrade the received signal.

In addition to the noise that is present on an antenna or a cable input to a receiver, noise is generated inside the radio receiver. At a UHF frequency range this internal noise predominates over the noise received with the signal of interest. Thus, for the higher frequencies the weakest signal that can be detected is determined by the noise level in the receiver. To increase the sensitivity of the receiver a "pre-amplifier" is often used after an antenna as a receiver front end to boost the signal level that goes into the receiver. This kind of pre-amplification at the front end of the amplifier will add noise to the receiver due to the noise that is generated inside of this amplifier circuit. However, the noise contribution of this amplifier can be minimized by using an amplifier that is designed to produce minimal noise when it amplifies a signal, such as an LNA. Noise does not simply add from stage to stage; the internal noise of the first amplifier substantially sets the noise floor for the entire receiver.

In calculating a gain in a series of cascaded amplifiers the overall gain is simply the sum of the gains of the individual amplifiers in decibels. For example, the total gain in a series of two amplifiers each having a gain of 10 dB is 20 dB for a overall amplifier. Noise floor is commonly indicated by the noise figure (NF). The larger the NF the higher the noise floor of the circuit.

A Cascaded noise figure is not as easily calculated as amplifier gain; its calculation is non-intuitive. In a series of cascaded amplifiers, gain does not depend upon the positioning of the amplifiers in the chain. However, in achieving a given noise figure for a receiver, the placement of the amplifiers is critical with respect to establishing a receiver's noise floor. In calculating the noise figure for an electronic system Friis' equation is used to calculate the noise figure of the entire system. Friis' equation is

.times..times..times..times..times..times. ##EQU00001## NF.sub.total=system noise figure NF.sub.1=noise figure of stage-1 NF.sub.2=noise figure of stage-2 NF.sub.n=noise figure of stage-nth G.sub.1=gain of stage-1 G.sub.2=gain of stage-2 G.sub.N=gain of nth stage What can be seen from this equation is that the noise figure of a first stage is the predominant contributor to a total noise figure. For example, the noise figure of a system is only increased a small amount when a second amplifier is used. Thus, it can be seen that the noise figure of the first amplifier in a chain of amplifiers or system components is critical in maintaining a low noise floor for an entire system or receiver. A low NF amplifier typically requires a low noise material for transistors, such as gallium arsenide. Later amplifiers that do not contribute significantly to the noise, are constructed of a cheaper and noisier material such as silicon.

The initial low noise amplifiers are typically constructed from expensive materials such as gallium arsenide to achieve sufficient performance. Gallium arsenide requires special processing, further adding to its expense. Additionally, GaAs circuits are not easily integrated with silicon circuits that make up the bulk of the receivers in use. It would be desirable to achieve identical performance with a less costly material, such as silicon. Silicon requires less costly processing. Further it is advantageous if a standard process, such as CMOS, could be used to achieve the required low noise design. Given the trend towards miniaturization and high volume production, it is highly desirable to be able to produce an integrated receiver with a low noise floor on silicon.

Within a receiver the layout and spacing of circuitry is critical to avoid the injection of noise generated in other portions of the circuit onto a received signal. If a tuner is placed on a semiconductor substrate noise generated in the substrate itself will interfere with, and degrade the received signal, this has been a problem preventing complete integration of a receiver on silicon.

Historically low noise substrates, fabricated from exotic and costly materials such as gallium arsenide have been used to reduce noise generated by the semiconductor substrate. However, it would be advantageous to be able to fabricate a receiver on a single CMOS substrate. CMOS advantageously is a known process that may be implemented economically for volume production. Currently a receiver fabricated completely in CMOS has not been available without utilizing external components in the received signal path. Each time the signal is routed on or off of the integrated circuit additional opportunities for the introduction of noise into a signal path are provided. Minimizing this introduction of noise is an ongoing problem in receiver design.

After preselection and low noise amplification that is performed in a front end of a receiver, the signal next enters the receiver's frequency conversion circuitry. This circuitry takes channels that have been passed through the front end and converts one of the selected channel's frequencies down to one or more known frequencies (f.sub.IF, or IFs). This frequency conversion is accomplished through the use of a circuit called a mixer that utilizes a local oscillator signal (f.sub.LO), usually generated in the receiver, to tune a received channel to an IF frequency while blocking the other channels. Spurious signals, previously described, are produced in this receiver circuitry, and an additional problem known as "image response" is encountered that must be considered in the receiver's design.

It is well known to those skilled in the art that when two sinusoidal signals of differing frequencies are multiplied together by their application to a nonlinear device, such as a mixer, that signals of a differing frequency are produced. A mixer has three ports: f.sub.RF receives a low level radio frequency signal that contains the desired modulation, f.sub.LO is a high level signal from a local oscillator, and f.sub.IF is the resultant mixer product or intermediate frequency produced. These frequencies are related: f.sub.If=mf.sub.RF.+-.nf.sub.Lo (2) where m=0, 1, 2, 3, . . . and n=0, 1, 2, 3, . . .

In a typical first order circuit (m=n=1) four frequencies are produced: F.sub.RF, f.sub.LO, f.sub.IFLO=f.sub.RF-f.sub.LO and f.sub.IFHI=f.sub.RF+f.sub.LO. A f.sub.IFLO and f.sub.IFHI being termed intermediate frequencies. In receivers the common practice is to select either the sum or difference IF frequency by filtering out the undesired one. Since both signals contain the same information, only one is needed in the subsequent circuitry.

One or more mixers are advantageously used in radio receivers to convert a high frequency radio signal which is received into a lower frequency signal that can be easily processed by subsequent circuitry. Mixers are also used to tune multiple channels, so that different tuned circuits are not required for each channel. By changing a local oscillator frequency, differing radio frequencies received can be tuned to produce a constant intermediate frequency value regardless of the frequency of the received channel. This means that circuit components used to process the intermediate frequency may be fixed in value, with no tuning of capacitors or coils required. Thus, circuits in an IF strip are all fixed-tuned at an IF frequency. A receiver constructed in this manner, using one or more frequency conversions, is called a superheterodyne radio receiver.

A disadvantage of a superheterodyne radio receiver is that any of the one or more local oscillators within the receiver also acts as a miniature transmitter. A receiver "front end" alleviates this problem by isolating an antenna from the remaining receiver circuitry.

By positioning a radio frequency amplifier between the antenna and the frequency converting stages of a receiver, additional isolation between the receiver circuitry and the antenna is achieved. The presence of an amplifier stage provides attenuation for any of the one or more local oscillator signals from the frequency conversion stages that are radiated back towards the antenna or a cable distribution network. This increased isolation has the benefit of preventing radiation of a local oscillator signal out the antenna which could cause radio frequency interference from a local oscillator. If radiated these and other signals present could create interference in another receiver present at another location.

FIG. 4 is an illustration that shows an image frequency's 402 relation to other signals present 404, 406, 408 at a mixer. Image frequency suppression is an important parameter in a receivers design. In a radio receiver two frequencies input to a radio receiver 404, 406 will yield a signal at the IF frequency 408. A receiver will simultaneously detect signals at the desired frequency 404 and also any signals present at an undesired frequency known as the image frequency 402. If there is a signal present at the image frequency, it will translate down to the IF frequency 408 and cause interference with the reception of the desired channel. Both of these signals will be converted to the IF frequency unless the receiver is designed to prevent this. The image frequency 402 is given by: f.sub.I=f.sub.RF+2f.sub.IF (3) where f.sub.I is the image frequency. This is illustrated in FIG. 4. A frequency that is spaced the IF frequency 410 below the local oscillator frequency (f.sub.RF) 404, and a frequency that is spaced the intermediate frequency 412 above the local oscillator signal (f.sub.I) 402, will both be converted down to the intermediate frequency (f.sub.IF)408. The usual case is that a frequency that occurs lower than the local oscillator signal is the desired signal. The signal occurring at the local oscillator frequency plus the intermediate frequency 402 is an unwanted signal or noise at that frequency that is converted to the IF frequency causing interference with the desired signal.

In FIG. 4 the exemplary 560 KHz signal 404 is a radio station that the tuner is tuned to receive. The exemplary 1470 KHz signal 402 is another radio station transmitting at that particular frequency. If a designer of the receiver had picked an exemplary local oscillator signal of 1015 KHz 406 then both of these radio stations would be simultaneously converted to an exemplary IF frequency of 455 KHz 408. The person listening to the radio would simultaneously hear both radio programs coming out of his speaker. This illustrates the need for the careful selection of local oscillator frequencies when designing a radio receiver. The selection of local oscillator frequencies is a part of frequency planning and used by those skilled in the art to design a receiver that will provide frequency conversions needed with minimal distortion.

FIG. 5 illustrates a dual (or double) conversion receiver 502. Such a multiple conversion receiver allows selectivity, distortion and stability to be controlled through a judicious frequency planning. In the double conversion receiver 502 a received signal 504 is first mixed 506 to a first intermediate frequency, and then mixed 508 down to a second intermediate frequency. In this type of receiver the first IF frequency is made to be high so that a good image rejection is achieved. The second IF is made low so that good adjacent channel selectivity is achieved.

If the first IF frequency is low an image frequency falls higher in frequency, or closer to the center of a pass band of an RF selectivity curve of a receiver "front end," 510 and undergoes little attenuation. If the IF frequency is high the image frequency falls far down on the skirt of the RF selectivity curve for the re