Voltage-current conversion circuit, amplifier, mixer circuit, and mobile appliance using the circuit Number:7,417,486 from the United States Patent and Trademark Office (PTO) owispatent

Title: Voltage-current conversion circuit, amplifier, mixer circuit, and mobile appliance using the circuit

Abstract: A cross-coupled low-distortion voltage-current conversion circuit has transistors T1 to T6. At least one of the transistors has parallel connections of two or more transistors. By arbitrarily setting the number of parallel connections of the transistors T1 to T6, the current distributions of the circuits are optimized while maintaining the conventional low-distortion operation. The invention finds applications in amplifiers and mixers that need to be operated with low distortion and low power consumption. The invention provides a cross-coupled low-distortion voltage-current conversion circuit that has freedom of design and improved performance without increasing power consumption over the entire circuit.

Patent Number: 7,417,486 Issued on 08/26/2008 to Koutani,   et al.

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Inventors:	Koutani; Masato (Kitakatsuragi-gun, JP), Iizuka; Kunihiko (Sakai, JP)
Assignee:	Sharp Kabushiki Kaisha (Osaka-shi, JP)
Appl. No.:	11/238,823
Filed:	September 28, 2005

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Foreign Application Priority Data

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Sep 28, 2004 [JP]			2004-281099
Jan 24, 2005 [JP]			2005-015406

Current U.S. Class:	327/359 ; 327/103; 327/355; 455/326; 455/333
Current International Class:	G06F 7/44 (20060101)
Field of Search:	327/355-359,100,103 330/560-563 455/326,333

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References Cited [Referenced By]

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U.S. Patent Documents

5448772	September 1995	Grandfield
5630228	May 1997	Mittel
5699024	December 1997	Manlove et al.
5809410	September 1998	Stuebing et al.
5875392	February 1999	Tanaka
5933771	August 1999	Tiller et al.
5999804	December 1999	Forgues
6026286	February 2000	Long
6029059	February 2000	Bojer
6078207	June 2000	Oguri
6407620	June 2002	Hirayama
6512408	January 2003	Lee et al.
6559706	May 2003	Johnson
6831497	December 2004	Koh et al.
6871057	March 2005	Ugajin et al.

Foreign Patent Documents

	4-129407		Apr., 1992		JP

Other References

Aoki, H. (1992). "Introduction to Functional Circuit Design of ICs," CQ Publishing, pp. 118-121. (In Japanese with brief description of relevance). cited by other . Harvey, J. et al. (2001). "Analysis and Design of an Integrated Quadrature Mixer with Improved Noise, Gain, and Image Rejection," IEEE International Symposium on Circuits and Systems 4:786-789. cited by other . Lee, T.H. (1998). "Mixers," Chapter 12 in The Design of CMOS Radio-Frequency Integrated Circuits, Cambridge University Press, United Kingdom, pp. 325-329. cited by other . Yue, S. (Apr. 9, 2001). "Linearization Techniques for Mixers," pp. 1-13. cited by other.

Primary Examiner: Richards; N. Drew
Assistant Examiner: Nguyen; Hai L.
Attorney, Agent or Firm: Morrison & Foerster LLP

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Claims

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What is claimed is:

1. A voltage-current conversion circuit comprising a transconductance stage for carrying out voltage-current conversion, the transconductance stage comprising: a first transistor and a second transistor each comprising a collector connected to a respective power source terminal, and each receiving an input signal from a respective base; a third transistor comprising a collector connected to an emitter terminal of the first transistor and a fourth transistor comprising a collector connected to an emitter terminal of the second transistor, the collector of the third transistor being cross-coupled to a base of the fourth transistor, and the collector of the fourth transistor being cross-connected to a base of the third transistor; a fifth transistor for acquiring a current signal from a collector of the fifth transistor, the fifth transistor and the third transistor sharing the base and an emitter: and a sixth transistor for acquiring a current signal from a collector of the sixth transistor, the sixth transistor and the fourth transistor sharing the base and an emitter, wherein: the first to fourth transistors each have an m-row of parallel connections of transistor elements; the fifth and sixth transistors each have an n-row of parallel connections of transistor elements; a resistor element is provided between the emitters of the fifth transistor and the sixth transistor; and a transconductance (gm) is determined by m, n, and resistances of the resistor element.

2. The voltage-current conversion circuit according to claim 1, wherein the fifth transistor and the sixth transistor each comprise a current source added between an emitter terminal of each transistor and the ground.

3. The voltage-current conversion circuit according to claim 1, wherein a negative feedback resistor is added each between an emitter terminal of the fifth transistor and the ground, and between an emitter terminal of the sixth transistor and the ground.

4. The voltage-current conversion circuit according to claim 1, wherein the parallely connected transistors each of the first to sixth transistors comprise equal voltages between respective bases and emitters.

5. The voltage-current conversion circuit according to claim 1, wherein the number of parallel connections of the first transistor and the number of parallel connections of the third transistor are equal, and the number of parallel connections of the second transistor and the number of parallel connections of the fourth transistor are equal.

6. The voltage-current conversion circuit according to claim 1, wherein: a bias is inputted into a base terminal of the first transistor and into a base terminal of the second transistor via two resistors; and the first transistor and the second transistor each receive an input signal via a capacitor.

7. The voltage-current conversion circuit according to claim 1, wherein: a bias is inputted into a base terminal of the first transistor and into a base terminal of the second transistor via two resistors; and one of the first transistor and the second transistor is grounded via a capacitor, and the other transistor receives an input signal via a capacitor.

8. The voltage-current conversion circuit according to claim 1, wherein a bias is inputted into a base terminal of the first transistor and into a base terminal of the second transistor via two resistors, one of the first transistor and the second transistor being supplied with the bias alone, while the other transistor receiving an input signal via a capacitor.

9. The voltage-current conversion circuit according to claim 1, wherein a current path is connected to a collector terminal of the fifth transistor or the sixth transistor.

10. An amplifier comprising: a first transistor and a second transistor each comprising a collector connected to a respective power source terminal, and each receiving an input signal from a respective base; a third transistor comprising a collector connected to an emitter terminal of the first transistor and a fourth transistor comprising a collector connected to an emitter terminal of the second transistor, the collector of the third transistor being cross-coupled to a base of the fourth transistor, and the collector of the fourth transistor being cross-coupled to a base of the third transistor; a fifth transistor for acquiring a current signal from a collector of the fifth transistor, the fifth transistor and the third transistor sharing the base and an emitter; and a sixth transistor for acquiring a current signal from a collector of the sixth transistor, the sixth transistor and the fourth transistor sharing the base and an emitter, wherein: the first to fourth transistors each have an m-row of parallel connections of transistor elements; the fifth and sixth transistors each have an n-row of parallel connections of transistor elements; a resistor element is provided between the emitters of the fifth transistor and the sixth transistor, and a current source is added to an emitter terminal of each of the fifth transistor and the sixth transistor; an output load resistor is connected to each collector terminal of the fifth transistor and the sixth transistor; and a transconductance (gm) is determined by m, n, and resistances of the resistor element.

11. An amplifier comprising: a first transistor and a second transistor each comprising a collector connected to a respective power source terminal, and each receiving an input signal from a respective base; a third transistor comprising a collector connected to an emitter terminal of the first transistor and a fourth transistor comprising a collector connected to an emitter terminal of the second transistor, the collector of the third transistor being cross-coupled to a base of the fourth transistor, and the collector of the fourth transistor being cross-coupled to a base of the third transistor; a fifth transistor for acquiring a current signal from a collector of the fifth transistor, the fifth transistor and the third transistor sharing the base and an emitter: and a sixth transistor for acquiring a current signal from a collector of the sixth transistor, the sixth transistor and the fourth transistor sharing the base and an emitter, wherein: the first to fourth transistors each have an m-row of parallel connections of transistor elements; the fifth and sixth transistors each have an n-row of parallel connections of transistor elements; a resistor element is provided between the emitters of the fifth transistor and the sixth transistor; a negative feedback resistor is added each between an emitter terminal of the fifth transistor and the ground, and between an emitter terminal of the sixth transistor and the ground, and an output load resistor is connected to each collector terminal of the fifth transistor and the sixth transistor; and a transconductance (gm) is determined by m, n, and resistances of the resistor element.

12. The amplifier according to claim 10 or 11, wherein a current path is connected to a collector terminal of the fifth transistor and the sixth transistor.

13. A mixer circuit comprising: a transconductance stage for converting an input signal voltage to a current signal; and a frequency conversion circuit connected to the transconductance stage and for converting the frequency of the current signal acquired from the transconductance stage, the transconductance stage comprising: a first transistor and a second transistor each comprising a collector connected to a respective power source terminal, and each receiving said input signal voltage from a respective base; a third transistor comprising a collector connected to an emitter terminal of the first transistor and a fourth transistor comprising a collector connected to an emitter terminal of the second transistor, the collector of the third transistor being cross-coupled to a base of the fourth transistor, and the collector of the fourth transistor being cross-coupled to a base of the third transistor; a fifth transistor for acquiring a current signal from a collector of the fifth transistor, the fifth transistor and the third transistor sharing the base and an emitter: and a sixth transistor for acquiring a current signal from a collector of the sixth transistor, the sixth transistor and the fourth transistor sharing the base and an emitter, wherein: the first to fourth transistors each have an m-row of parallel connections of transistor elements; the fifth and sixth transistors each have an n-row of parallel connections of transistor elements; a resistor element is provided between the emitters of the fifth transistor and the sixth transistor, and a current source is added between an emitter terminal of each of the fifth transistor and the sixth transistor and the ground; and a transconductance (gm) is determined by m, n, and resistances of the resistor element.

14. A mixer circuit comprising: a frequency conversion circuit for generating, from a first signal and a second signal, a third signal as a product; and a transconductance stage for receiving the first signal and carrying out voltage-current conversion of the first signal; the transconductance stage comprising: a first transistor and a second transistor each comprising a collector connected to a respective power source terminal, and each receiving an input signal from a respective base; a third transistor comprising a collector connected to an emitter terminal of the first transistor and a fourth transistor comprising a collector connected to an emitter terminal of the second transistor, the collector of the third transistor being cross-coupled to a base of the fourth transistor, and the collector of the fourth transistor being cross-coupled to a base of the third transistor; a fifth transistor for acquiring a current signal from a collector of the fifth transistor, the fifth transistor and the third transistor sharing the base and an emitter: and a sixth transistor for acquiring a current signal from a collector of the sixth transistor, the sixth transistor and the fourth transistor sharing the base and an emitter, wherein: the first to fourth transistors each have an m-row of parallel connections of transistor elements; the fifth and sixth transistors each have an n-row of parallel connections of transistor elements; a resistor element is provided between the emitters of the fifth transistor and the sixth transistor, and a negative feedback resistor is added each between an emitter terminal of the fifth transistor and the ground, and between an emitter terminal of the sixth transistor and the ground; and a transconductance (gm) is determined by m, n, and resistances of the resistor element.

15. A quadrature mixer circuit comprising: a first frequency conversion circuit for generating, from a first signal and a second signal, a third signal as a product; a second frequency conversion circuit for generating, from the first signal and a fourth signal, a fifth signal as a product, wherein a transconductance stage for inputting the first signal is shared, the transconductance stage for receiving the first signal and carrying out voltage-current conversion of the first signal comprising: a first transistor and a second transistor each comprising a collector connected to a respective power source terminal, and each receiving the input signal from a respective base; a third transistor comprising a collector connected to an emitter terminal of the first transistor and a fourth transistor comprising a collector connected to an emitter terminal of the second transistor, the collector of the third transistor being cross-coupled to a base of the fourth transistor, and the collector of the fourth transistor being cross-coupled to a base of the third transistor; a fifth transistor for acquiring a current signal from a collector of the fifth transistor, the fifth transistor and the third transistor sharing the base and an emitter: and a sixth transistor for acquiring a current signal from a collector of the sixth transistor, the sixth transistor and the fourth transistor sharing the base and an emitter, wherein: the first to fourth transistors each have an m-row of parallel connections of transistor elements; the fifth and sixth transistors each have an n-row of parallel connections of transistor elements; a resistor element is provided between the emitters of the fifth transistor and the sixth transistor, and a current source is added to an emitter terminal of each of the fifth transistor and the sixth transistor; and a transconductance (gm) is determined by m, n, and resistances of the resistor element.

16. A quadrature mixer circuit comprising: a transconductance stage for converting an input signal voltage to a current signal; a first frequency conversion circuit connected to the transconductance stage and for converting the frequency of the current signal extracted from the transconductance stage; a second frequency conversion circuit connected to the transconductance stage and for converting the frequency of the current signal extracted from the transconductance stage to a different frequency from the frequency converted by the first frequency conversion circuit; the transconductance stage comprising: a first transistor and a second transistor each comprising a collector connected to a respective power source terminal, and each receiving the input signal voltage from a respective base; a third transistor comprising a collector connected to an emitter terminal of the first transistor and a fourth transistor comprising a collector connected to an emitter terminal of the second transistor, the collector of the third transistor being cross-coupled to a base of the fourth transistor, and the collector of the fourth transistor being cross-coupled to a base of the third transistor; a fifth transistor for acquiring a current signal from a collector of the fifth transistor, the fifth transistor and the third transistor sharing the base and an emitter: and a sixth transistor for acquiring a current signal from a collector of the sixth transistor, the sixth transistor and the fourth transistor sharing the base and an emitter, wherein: the first to fourth transistors each have an m-row of parallel connections of transistor elements; the fifth and sixth transistors each have an n-row of parallel connections of transistor elements; a resistor element is provided between the emitters of the fifth transistor and the sixth transistor, and a negative feedback resistor is added each between an emitter terminal of the fifth transistor and the ground, and between an emitter terminal of the sixth transistor and the ground; and a transconductance (gm) is determined by m, n, and resistances of the resistor element.

17. The mixer circuit according to claim 13, wherein the parallely connected transistors of each of the first to sixth transistors comprise equal voltages between respective bases and emitters.

18. The mixer circuit according to claim 13, wherein the number of parallel connections of the first transistor and the number of parallel connections of the third transistor are equal, and the number of parallel connections of the second transistor and the number of parallel connections of the fourth transistor are equal.

19. The mixer circuit according to any one of claims 13 to 16, wherein: a bias is inputted into a base terminal of the first transistor and into a base terminal of the second transistor via two resistors; and the first transistor and the second transistor each receive an input signal via a capacitor.

20. The mixer circuit according to any one of claims 13 to 16, wherein a bias is inputted into a base terminal of the first transistor and into a base terminal of the second transistor via two resistors, one of the first transistor and the second transistor being grounded via a capacitor, while the other transistor receiving an input signal via a capacitor.

21. The mixer circuit according to any one of claims 13 to 16, wherein a bias is inputted into a base terminal of the first transistor and into a base terminal of the second transistor via two resistors, one of the first transistor and the second transistor being supplied with the bias alone, while the other transistor receiving an input signal via a capacitor.

22. The mixer circuit according to any one of claims 13 to 16, wherein a current path is connected to a collector terminal of the fifth transistor and the sixth transistor.

23. A transconductance stage for carrying out voltage-current conversion, the transconductance stage comprising: a first transistor and a second transistor each comprising a collector connected to a respective power source terminal, and each receiving an input signal from a respective base; a third transistor comprising a collector connected to an emitter terminal of the first transistor and a fourth transistor comprising a collector connected to an emitter terminal of the second transistor, the collector of the third transistor being cross-coupled to a base of the fourth transistor, and the collector of the fourth transistor being cross-connected to a base of the third transistor; a fifth transistor for acquiring a current signal from a collector of the fifth transistor, the fifth transistor and the third transistor sharing the base and an emitter; and a sixth transistor for acquiring a current signal from a collector of the sixth transistor the sixth transistor and the fourth transistor sharing the base and an emitter, wherein: the first to fourth transistors each have an m-row of parallel connections of transistor elements; the fifth and sixth transistors each have an n-row of parallel connections of transistor elements; a resistor element is provided between the emitters of the fifth transistor and the sixth transistor, a first switching transistor is connected to the respective collector of the plurality of transistor elements constituting the fifth transistor; a second switching transistor is connected to the respective collector of the plurality of transistor elements constituting the sixth transistor; and a transconductance (gm) is determined by m, n, and resistances of the resistor element.

24. The voltage-current conversion circuit according to claim 23, wherein a negative feedback resistor is added each between an emitter terminal of the fifth transistor and the ground, and between an emitter terminal of the sixth transistor and the ground.

25. The voltage-current conversion circuit according to claim 23, wherein a current source is added each between an emitter terminal of the fifth transistor and the ground, and between an emitter terminal of the sixth transistor and the ground.

26. A voltage-current conversion circuit comprising a transconductance stage for carrying out voltage-current conversion, the transconductance stage comprising: a first transistor and a second transistor each comprising a collector connected to a respective power source terminal, and each receiving an input signal from a respective base; a third transistor comprising a collector connected to an emitter terminal of the first transistor and a fourth transistor comprising a collector connected to an emitter terminal of the second transistor, the collector of the third transistor being cross-coupled to a base of the fourth transistor, and the collector of the fourth transistor being cross-connected to a base of the third transistor; a fifth transistor for acquiring a current signal from a collector of the fifth transistor, the fifth transistor and the third transistor sharing the base and an emitter: and a sixth transistor for acquiring a current signal from a collector of the sixth transistor, the sixth transistor and the fourth transistor sharing the base and an emitter, wherein: the first to fourth transistors each have an m-row of parallel connections of transistor elements; the fifth and sixth transistors each have an n-row of parallel connections of transistor elements; at least one of the following (a) to (f) is provided between the emitter of the fifth transistor and the emitter of the sixth transistor: (a) an inductor element; (b) a capacitor element; (c) a resistor element, and an inductor element connected in-series to the resistor element; (d) a resistor element, and a capacitor element connected in-series to the resistor element; (e) a first resistor element, an inductor element connected in-series to the first resistor element, and a second resistor element connected in-series to the inductor element; or (f) a first resistor element, a capacitor element connected in-series to the first resistor element, and a second resistor element connected in-series to the capacitor element; and a transconductance (gm) is determined by m, n, and resistances of the resistor element.

27. An amplifier using a voltage-current conversion circuit, the voltage-current conversion circuit comprising: a first transistor and a second transistor each comprising a collector connected to a respective power source terminal, and each receiving an input signal from a respective base; a third transistor comprising a collector connected to an emitter terminal of the first transistor and a fourth transistor comprising a collector connected to an emitter terminal of the second transistor, the collector of the third transistor being cross-coupled to a base of the fourth transistor, and the collector of the fourth transistor being cross-connected to a base of the third transistor; a fifth transistor for acquiring a current signal from a collector of the fifth transistor, the fifth transistor and the third transistor sharing the base and an emitter; and a sixth transistor for acquiring a current signal form a collector of the sixth transistor, the sixth transistor and the fourth transistor sharing the base and an emitter, wherein: the first to fourth transistors each have an m-row of parallel connections of transistor elements; the fifth and sixth transistors each have an n-row of parallel connections of transistor elements; a resistor element is provided between the emitters of the fifth transistor and the sixth transistor; a current path is connected to a collector terminal of the fifth transistor or the sixth transistor; and a transconductance (gm) is determined by m, n, and resistances of the resistor element.

28. An amplifier using a voltage-current conversion circuit, the voltage-current conversion circuit comprising: a first transistor and a second transistor each comprising a collector connected to a respective power source terminal, and each receiving an input signal from a respective base; a third transistor comprising a collector connected to an emitter terminal of the first transistor and a fourth transistor comprising a collector connected to an emitter terminal of the second transistor, the collector of the third transistor being cross-coupled to a base of the fourth transistor, and the collector of the fourth transistor being cross-connected to a base of the third transistor; a fifth transistor for acquiring a current signal from a collector of the fifth transistor, the fifth transistor and the third transistor sharing the base and an emitter; and a sixth transistor for acquiring a current signal from a collector of the sixth transistor, the sixth transistor and the fourth transistor sharing the base and an emitter, wherein: the first to fourth transistors each have an m-row of parallel connections of transistor elements; the fifth and sixth transistors each have an n-row of parallel connections of transistor elements; a resistor element is provided between the emitters of the fifth transistor and the sixth transistor; a first switching transistor is connected to the respective collector of the plurality of transistor elements constituting the fifth transistor; a second switching transistor is connected to the respective collector of the plurality of transistor elements constituting the sixth transistor; and a transconductance (gm) is determined by m, n, and resistances of the resistor element.

29. A mixer circuit using a voltage-current conversion circuit, the voltage-current conversion circuit comprising: a first transistor and a second transistor each comprising a collector connected to a respective power source terminal, and each receiving an input signal from a respective base; a third transistor comprising a collector connected to an emitter terminal of the first transistor and a fourth transistor comprising a collector connected to an emitter terminal of the second transistor, the collector of the third transistor being cross-coupled to a base of the fourth transistor, and the collector of the fourth transistor being cross-connected to a base of the third transistor; a fifth transistor for acquiring a current signal from a collector of the fifth transistor, the fifth transistor and the third transistor sharing the base and an emitter; and a sixth transistor for acquiring a current signal from a collector of the sixth transistor, the sixth transistor and the fourth transistor sharing the base and an emitter, wherein: the first to fourth transistors each have an m-row of parallel connections of transistor elements; the fifth and sixth transistors each have an n-row of parallel connections of transistor elements; a resistor element is provided between the emitters of the fifth transistor and the sixth transistor; a current path is connected to a collector terminal of the fifth transistor or the sixth transistor; and a transconductance (gm) is determined by m, n, and resistances of the resistor element.

30. A mixer circuit using a voltage-current conversion circuit, the voltage-current conversion circuit comprising: a first transistor and a second transistor each comprising a collector connected to a respective power source terminal, and each receiving an input signal from a respective base; a third transistor comprising a collector connected to an emitter terminal of the first transistor and a fourth transistor comprising a collector connected to an emitter terminal of the second transistor, the collector of the third transistor being cross-coupled to a base of the fourth transistor, and the collector of the fourth transistor being cross-connected to a base of the third transistor; and a fifth transistor for acquiring a current signal from a collector of the fifth transistor, the fifth transistor and the third transistor sharing the base and an emitter, and a sixth transistor for acquiring a current signal from a collector of the sixth transistor, the sixth transistor and the fourth transistor sharing the base and an emitter, wherein: the first to fourth transistors each have an m-row of parallel connections of transistor elements; the fifth and sixth transistors each have an n-row of parallel connections of transistor elements; a resistor element is provided between the emitters of the fifth transistor and the sixth transistor; a first switching transistor is connected to the respective collector of the plurality of transistor elements constituting the fifth transistor; a second switching transistor is connected to the respective collector of the plurality of transistor elements constituting the sixth transistor; and a transconductance (gm) is determined by m, n, and resistances of the resistor element.

31. A mobile appliance using an LSI comprising a voltage-current conversion circuit, the voltage-current conversion circuit comprising: a first transistor and a second transistor each comprising a collector connected to a respective power source terminal, and each receiving an input signal from a respective base; a third transistor comprising a collector connected to an emitter terminal of the first transistor and a fourth transistor comprising a collector connected to an emitter terminal of the second transistor, the collector of the third transistor being cross-coupled to a base of the fourth transistor, and the collector of the fourth transistor being cross-connected to a base of the third transistor; a fifth transistor for acquiring a current signal from a collector of the fifth transistor, the fifth transistor and the third transistor sharing the base and an emitter; and a sixth transistor for acquiring a current signal from a collector of the sixth transistor, the sixth transistor and the fourth transistor sharing the base and an emitter, wherein: the first to fourth transistors each have an m-row of parallel connections of transistor elements; the fifth and sixth transistors each have an n-row of parallel connections of transistor elements; a resistor element is located between the emitters of the fifth transistor and the sixth transistor; and a transconductance (gm) is determined by m, n, and resistances of the resistor element.

32. A mobile appliance using an LSI comprising a transconductance stage for carrying out voltage-current conversion, the transconductance stage comprising: a first transistor and a second transistor each comprising a collector connected to a respective power source terminal, and each receiving an input signal from a respective base; a third transistor comprising a collector connected to an emitter terminal of the first transistor and a fourth transistor comprising a collector connected to an emitter terminal of the second transistor, the collector of the third transistor being cross-coupled to a base of the fourth transistor, and the collector of the fourth transistor being cross-connected to a base of the third transistor; a fifth transistor for acquiring a current signal from a collector of the fifth transistor, the fifth transistor and the third transistor sharing the base and an emitter, and a sixth transistor for acquiring a current signal from a collector of the sixth transistor and the fourth transistor sharing the base and an emitter, wherein: the first to fourth transistors each have an m-row of parallel connections of transistor elements; the fifth and sixth transistors each have an n-row of parallel connections of transistor elements; a resistor element is provided between the emitters of the fifth transistor and the sixth transistor; a first switching transistor is connected to the respective collector of the plurality of transistor elements constituting the fifth transistor; a second switching transistor is connected to the respective collector of the plurality of transistor elements constituting the sixth transistor; and a transconductance (gm) is determined by m, n, and resistances of the resistor element.

33. A mobile appliance using an LSI comprising an amplifier, the amplifier comprising: a first transistor and a second transistor each comprising a collector connected to a respective power source terminal, and each receiving an input signal from a respective base; a third transistor comprising a collector connected to an emitter terminal of the first transistor and a fourth transistor comprising a collector connected to an emitter terminal of the second transistor, the collector of the third transistor being cross-coupled to a base of the fourth transistor, and the collector of the fourth transistor being cross-coupled to a base of the third transistor; a fifth transistor for acquiring a current signal from a collector of the fifth transistor, the fifth transistor and the third transistor sharing the base and an emitter; and a sixth transistor for acquiring a current signal from a collector of the sixth transistor, the sixth transistor and the fourth transistor sharing the base and an emitter, wherein: the first to fourth transistors each have an m-row of parallel connections of transistor elements; the fifth and sixth transistors each have an n-row of parallel connections of transistor elements; a resistor element is provided between the emitters of the fifth transistor and the sixth transistor, and a current source is added between an emitter terminal of each transistor; an output load resistor is connected to each collector terminal of the fifth transistor and the sixth transistor; and a transconductance (gm) is determined by m, n, and resistances of the resistor element.

34. A mobile appliance using an LSI comprising an amplifier, the amplifier comprising: a first transistor and a second transistor each comprising a collector connected to a respective power source terminal, and each receiving an input signal from a respective base; a third transistor comprising a collector connected to an emitter terminal of the first transistor and a fourth transistor comprising a collector connected to an emitter terminal of the second transistor, the collector of the third transistor being cross-coupled to a base of the fourth transistor, and the collector of the fourth transistor being cross-connected to a base of the third transistor; a fifth transistor for acquiring a current signal from a collector of the fifth transistor, the fifth transistor and the third transistor sharing the base and an emitter; and a sixth transistor for acquiring a current signal from a collector of the sixth transistor, the sixth transistor and the fourth transistor sharing the base and an emitter, wherein: the first to fourth transistors each have an m-row of parallel connections of transistor elements; the fifth and sixth transistors each have an n-row of parallel connections of transistor elements; a resistor element is located between the emitters of the fifth transistor and the sixth transistor; a negative feedback resistor is added each between an emitter terminal of the fifth transistor and the ground, and between an emitter terminal of the sixth transistor and the ground, and an output load resistor is connected to each collector terminal of the fifth transistor and the sixth transistor; and a transconductance (gm) is determined by m, n, and resistances of the resistor element.

35. A mobile appliance using an LSI comprising a mixer circuit, the mixer circuit comprising: a transconductance stage for converting an input signal voltage to a current signal; and a frequency conversion circuit connected to the transconductance stage and for converting the frequency of the current signal acquired from the transconductance stage, the transconductance stage comprising: a first transistor and a second transistor each comprising a collector connected to a respective power source terminal, and each receiving said input signal voltage from a respective base; a third transistor comprising a collector connected to an emitter terminal of the first transistor and a fourth transistor comprising a collector connected to an emitter terminal of the second transistor, the collector of the third transistor being cross-coupled to a base of the fourth transistor, and the collector of the fourth transistor being cross-coupled to a base of the third transistor; a fifth transistor for acquiring a current signal from a collector of the fifth transistor, the fifth transistor and the third transistor sharing the base and an emitter; and a sixth transistor for acquiring a current signal form a collector of the sixth transistor, the sixth transistor and the fourth transistor sharing the base and an emitter, wherein: the first to fourth transistors each have an m-row of parallel connections of transistor elements; the fifth and sixth transistors each have an n-row of parallel connections of transistor elements; a resistor element is provided between the emitters of the fifth transistor and the sixth transistor, and a transconductance (gm) is determined by m, n, and resistances of the resistor element.

36. A mobile appliance using an LSI comprising a mixer circuit, the mixer circuit comprising: a transconductance stage for converting an input signal voltage to a current signal; a frequency conversion circuit connected to the transconductance stage and for converting the frequency of the current signal extracted from the transconductance stage, the transconductance stage comprising: a first transistor and a second transistor each comprising a collector connected to a respective power source terminal, and each receiving an input signal from a respective base; a third transistor comprising a collector connected to an emitter terminal of the first transistor and a fourth transistor comprising a collector connected to an emitter terminal of the second transistor, the collector of the third transistor being cross-coupled to a base of the fourth transistor, and the collector of the fourth transistor being cross-coupled to a base of the third transistor; a fifth transistor for acquiring a current signal from a collector of the fifth transistor, the fifth transistor and the third transistor sharing the base and an emitter; and a sixth transistor for acquiring a current signal from a collector of the sixth transistor, the sixth transistor and the fourth transistor sharing the base and an emitter, wherein: the first to fourth transistors each have an m-row of parallel connections of transistor elements; the fifth and sixth transistors each have an n-row of parallel connections of transistor elements; a resistor element is provided between the emitters of the fifth transistor and the sixth transistor, and a negative feedback resistor is added each between an emitter terminal of the fifth transistor and the ground, and between an emitter terminal of the sixth transistor and the ground; and a transconductance (gm) is determined by m, n, and resistances of the registor element.

37. A mobile appliance using an LSI comprising a quadrature mixer circuit, the quadrature mixer circuit comprising: a transconductance stage for converting an input signal voltage to a current signal; a first frequency conversion circuit connected to the transconductance stage and for converting the frequency of the current signal acquired from the transconductance stage; a second frequency conversion circuit connected to the transconductance stage and for converting the frequency of the current signal acquired from the transconductance stage to a different frequency from the frequency converted by the first frequency conversion circuit; the transconductance stage comprising: a first transistor and a second transistor each comprising a collector connected to a respective power source terminal, and each receiving an input signal form a respective base; a third transistor comprising a collector connected to an emitter terminal of the first transistor and a fourth transistor comprising a collector connected to an emitter terminal of the second transistor, the collector of the third transistor being cross-coupled to a base of the fourth transistor, and the collector of the fourth transistor being cross-coupled to a base of the third transistor; a fifth transistor for acquiring a current signal from a collector of the fifth transistor, the fifth transistor and the third transistor sharing the base and an emitter; and a sixth transistor for acquiring a current signal from a collector of the sixth transistor, the sixth transistor and the fourth transistor sharing the base and an emitter, wherein: the first to fourth transistors each have an m-row of parallel connections of transistor elements; the fifth and sixth transistors each have an n-row of parallel connections of transistor elements; a resistor element is provided between the emitters of the fifth transistor and the sixth transistor, and a current source is added to an emitter terminal of each of the fifth transistor and the sixth transistor; and a transconductance (gm) is determined by m, n, and resistances of the resistor element.

38. A mobile appliance using an LSI comprising a quadrature mixer circuit, the quadrature mixer circuit comprising: a transconductance stage for converting an input signal voltage to a current signal; a first frequency conversion circuit connected to the transconductance stage and for converting the frequency of the current signal acquired from the transconductance stage; a second frequency conversion circuit connected to the transconductance stage and for converting the frequency of the current signal acquired from the transconductance stage to a different frequency from the frequency converted by the first frequency conversion circuit; the transconductance stage comprising: a first transistor and a second transistor each comprising a collector connected to a respective power source terminal, and each receiving an input signal from a respective base; a third transistor comprising a collector connected to an emitter terminal of the first transistor and a fourth transistor comprising a collector connected to an emitter terminal of the second transistor, the collector of the third transistor being cross-coupled to a base of the fourth transistor, and the collector of the fourth transistor being cross-coupled to a base of the third transistor; a fifth transistor for acquiring a current signal from a collector of the fifth transistor, the fifth transistor and the third transistor sharing the base and an emitter; and a sixth transistor for acquiring a current signal from a collector of the sixth transistor, the sixth transistor and the fourth transistor sharing the base and an emitter, wherein: the first to fourth transistors each have an m-row of parallel connections of transistor elements; the fifth and sixth transistors each have an n-row of parallel connections of transistor elements; a resistor element is provided between the emitters of the fifth transistor and the sixth transistor, and a negative feedback resistor is added each between an emitter terminal of the fifth transistor and the ground, and between an emitter terminal of the sixth transistor and the ground; and a transconductance (gm) is determined by m, n, and resistances of the resistor element.

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Description

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This non-provisional application claims priority under 35 U.S.C. .sctn.119(a) on Japanese Patent Applications Nos. 2004-281099 filed in Japan on Sep. 28, 2004, and 2005-15406 filed in Japan on Jan. 24, 2005, the entire contents of which are hereby incorporated by reference.

BACKGROUND OF THE INVENTION

The present invention generally relates to voltage-current conversion circuits, and more particularly to a voltage-current conversion circuit that realizes low distortion and low power consumption in the transconductance stage (or gm stage). The present invention also relates to an amplifier, mixer circuit, and mobile appliance, all of which utilize this voltage-current conversion circuit.

The digital terrestrial television broadcasting (ISDB-T) in Japan uses one segment (430 kHz) for mobile appliances. To make the function of receiving the digital terrestrial television broadcasting carried out by ICs (integrated circuits) and to incorporate the ICs into battery-driven mobile terminals, low power consumption, size reduction, immunity to interferences, and low distortion of the receiving tuner are important considerations.

In a low-IF (Intermediate Frequency) receiver system with a function of image rejection, the mixer circuit is one of the most important blocks. Conventionally, mixer circuits have a transconductance stage, that is, a voltage-current conversion circuit that amplifies input signal voltage V and converts it into current signal I, as shown in FIG. 10. When RF (Radio Frequency) input signals (RF,RFB) are inputted into transistors T1 and T2 (the voltage of a small signal between V.sub.BE1 and V.sub.BE2: V.sub.in=V.sub.in+-V.sub.in-), currents I.sub.out3 and I.sub.out4 respectively represented by the following formulas (1) and (2) flow. It is noted that I.sub.out3+I.sub.out4=I.sub.SS.

.times..times..times..times..times..times..times..times..times..times..tim- es..times..times..times..times..times..times..times..times..times..times..- times..times..times..times. ##EQU00001##

According to this prior art, formulas (1) and (2) contain non-linear terms (exp), which means occurrence of distortion.

Also conventionally used is a voltage-current conversion circuit with cross-coupling as shown in FIG. 11. This voltage-current conversion circuit has first transistor T1 and second transistor T2 into which input signals (RF, RFB) are inputted from a base, third transistor T3 whose collector is connected to the emitter terminal of first transistor T1, and fourth transistor T4 whose collector is connected to the emitter terminal of second transistor T2. The bases of third and fourth transistors T3 and T4 are cross-coupled to each other's collectors. Resistor R7 is provided between the emitters of third and fourth transistors T3 and T4. In this voltage-current conversion circuit, when RF is inputted into transistors T1 and T2, currents I.sub.out3 and I.sub.out4 respectively represented by the following formulas (3) and (4) flow.

.times..times..times..times..times..times..times..times..times..times..tim- es..times. ##EQU00002##

These formulas do not contain non-linear terms (exp), and therefore linearity improves. However, this circuit presents the problem of unstable operation upon input of high-frequency signals into first transistor T1 and second transistor T2 (the problem including unexpected oscillations with the base and collector in a common-mode with each other).

In the mixer circuit, there is a trade-off relationship between low distortion and low power consumption of the transconductance stage (or gm stage) (amplifier). To solve the above problem, non-patent document 1 discloses a technique of low distortion of a transconductor with cross-coupling, as shown in FIG. 12.

Referring to FIG. 12, transconductance stage (or gm stage) s100 has first transistor T1 and second transistor T2. Respective collectors are connected to respective power source terminals, and input signals (RF, RFB) are inputted into first and second transistors T1 and T2 from respective bases. Transconductance stage (or gm stage) s100 also has third transistor T3 whose collector is connected to the emitter terminal of first transistor T1, and fourth transistor T4 whose collector is connected to the emitter terminal of second transistor T2. The bases of third and fourth transistors T3 and T4 are cross-coupled to each other's collectors. Transconductance stage (or gm stage) s100 further has fifth transistor T5 that shares the base and emitter with third transistor T3 and acquires a current signal from the collector, and sixth transistor T6 that shares the base and emitter with fourth transistor T4 and acquires a current signal from the collector. Third transistor T3 and fifth transistor T5 (fourth transistor T4 and sixth transistor T6) constitute a current mirror. The current mirror ratio here is 1:1. Resistor R7 is provided between the emitters of fifth and sixth transistors T5 and T6 (T3 and T4), emitter terminals 1 and 2 of these transistors are respectively provided with constant current sources I.sub.in1 and I.sub.in2.

Transconductance stage (or gm stage) s100 amplifies input signal voltage V.sub.in and converts it into a current signal.

In transconductance stage (or gm stage) s100 shown, since the currents that flow through transistors T1 and T3 (T2 and T4) are equal, the following formulas (5) and (6) are obtained.

[Mathematical Formula III] V.sub.BE1+V.sub.BE4=V.sub.BE2+VBE3 (5) V.sub.BE1=V.sub.BE3, V.sub.BE2=V.sub.BE4 (6)

When RF is inputted into transistors T1 and T2 (the voltage of a small signal between V.sub.BE1 and V.sub.BE2:V.sub.in=V.sub.in+-V.sub.in-), RF signal V.sub.in is directly fed into resistor R7, so that a signal current represented by formula (7) flows across resistor R7.

.times..times..times..times..upsilon..times..times. ##EQU00003##

Currents I.sub.out3 and I.sub.out4 are respectively represented by formulas (8) and (9).

.times..times..times..times..times..times..times..upsilon..times..times..t- imes..times..times..upsilon..times..times. ##EQU00004##

These do not contain non-linear terms (e.g., ln and exp) similar to the conventional principles as (3),(4), and current mirror structures based on conventional cross-coupled principle, provide for low distortion operation. Transconductances gm 3 and gm 4 are as represented by formula (10) obtained by differentiating formulas (8) and (9).

.times..times..times..times..times..times..times. ##EQU00005##

As an example of a conventional IQ mixer, patent document 1 and non-patent document 2 propose a quadrature mixer as shown in FIG. 13.

In this figure, the transconductance stage (or gm stage) will be referred to as Gm, and the SW (switch) stage of I or Q as SW_I or SW_Q. High-frequency signal RF and its inversed signal will be respectively referred to as RF and RFB, local signal and its inverse signal respectively as LO_I (LO_Q) and LO_IB (LO_QB), and intermediate-frequency signal IF (intermediate frequency) and its inversed signal respectively as IF_I (IF_Q) and IF_IB (IF_QB).

Referring to FIG. 13, quadrature mixer q100 has: I switching portion SW_I that generates, from the first signal (RF, RFB) and the second signal (LO_I, LO_IB), a third signal (IF_I, IF_IB) as the product; and Q switching portion SW_Q that generates, from the first signal (RF, RFB) and the fourth signal (LO_Q, LO_QB), a fifth signal (IF_Q, IF_QB) as the product. Transconductance stage (or gm stage) Gm, which amplifies the first signal (RF, RFB) and inputs the amplified signal into switching portions SW_I and SW_Q as a current signal, is common.

The operation of mixer circuit q100 will be described referring to FIG. 13. I mixer (Gm-SW_I) and Q mixer (Gm-SW_Q) multiply high-frequency signal RF, which is a received signal, respectively by local signal LO_I and local signal LO_Q and carry out frequency conversion. As the multiplication results, the mixers respectively generate intermediate-frequency signal IF_I and intermediate-frequency signal IF_Q.

By making input transconductance stage (or gm stage) Gm common, not only the number of elements are decreased, but there is a possibility of a decrease in power by half, low distortion, and low noise, compared with two independent Gilbert cell mixers.

Further, with the quadrature mixer, when the local signal has a sine wave or triangular wave, a point of intersection of quadrature signals I, IB, Q, and QB appears at .pi./2 intervals, even though IQ balance of the local signals are not good, as shown in FIG. 14(b). Owing to this IQ mutual interference, output phase errors caused by local signals can be relaxed However, when input is in a square wave as shown in FIG. 14(a), the points of intersection become vague, making it impossible to amend output phase errors. Since the image rejection ratio (the ratio of the desired wave to the interfering wave) is determined by the output phase error and amplitude error of the mixer, in recent years the quadrature mixer has been referred to in literature of various types as an image rejection mixer with the function of amending phase errors.

Patent document 2 discloses a mixer circuit as shown in FIG. 15. Mixer circuit m100 has transconductance stage (or gm stage) Gm, switching portion SW that carries out frequency conversion, and current paths I.sub.p1 and I.sub.p2. Bypass currents I.sub.p1 and I.sub.p2 enable independent optimization of the operation currents of switching portion SW and transconductance stage (or gm stage) Gm.

Patent document 1: U.S. Pat. No. 6,029,059

Patent document 2: Japanese Patent Publication No. 4-129407

Non-patent document 1: Hidehiko Aoki "Introduction to Functional Circuit Design of ICs" CQ Publishing, 1992.

Non-patent document 2: Jackson Harvey and Ramesh Harjani "Analysis and Design of an Integrated Quadrature Mixer with Improved Noise Gain and Image Rejection" IEEE International Symposium Circuits and Systems vol. IV pp. 786-789 May 2001.

However, the structure of the transconductance stage (or gm stage) shown in FIG. 12 has such a current relationship that I.sub.out3:I.sub.out5=I.sub.out4:I.sub.out6=1:1, and a current of approximately half I.sub.in1 (I.sub.in2) flows through I.sub.out3 (I.sub.out4). This restricts freedom of design; when reducing distortion and improving gain by increasing the currents for transistors T5 and T6, which are central to differential amplification operation, the circuit configuration requires an approximately twice as much current as the currents that flow through optimized transistors T5 and T6. Thus, power consumption cannot be prevented from increasing.

SUMMARY OF THE INVENTION

In view of the foregoing and other problems, it is an object of the present invention to provide a voltage-current conversion circuit that, in relation to the transconductance stage (or gm stage) which realizes low distortion, reduces power consumption by a circuit design that enables adjustment for a more suitable operation current.

It is another object of the present invention to provide an amplifier that utilizes the voltage-current conversion circuit.

It is another object of the present invention to provide a mixer circuit that utilizes the voltage-current conversion circuit.

It is another object of the present invention to provide a mobile appliance that utilizes the voltage-current conversion circuit.

According to a first aspect of the present invention, there is provided a voltage-current conversion circuit comprising a transconductance stage (or gm stage) for carrying out voltage-current conversion, the transconductance stage (or gm stage) comprising: a first transistor and a second transistor each comprising a collector connected to a respective power source terminal, and each receiving an input signal from a respective base; a third transistor comprising a collector connected to an emitter terminal of the first transistor and a fourth transistor comprising a collector connected to an emitter terminal of the second transistor, the collector of the third transistor being cross-coupled to a base of the fourth transistor, and the collector of the fourth transistor being cross-coupled to a base of the third transistor; a fifth transistor for acquiring a current signal from a collector of the fifth transistor, the fifth transistor and the third transistor sharing the base and an emitter: and a sixth transistor for acquiring a current signal from a collector of the sixth transistor, the sixth transistor and the fourth transistor sharing the base and an emitter. A resistor is located between the emitters of the fifth transistor and the sixth transistor. The number of parallel connections of or the sizes in the first to sixth transistors has an arbitrary ratio. Setting such an arbitrary ratio adjusts the amount of signal currents flowing through the fifth transistor and the sixth transistor relative to the entire amount of current.

According to this invention, a new parameter, which is either the ratio of the number of parallel connections or the size ratio, is introduced while maintaining the conventionally proposed low-distortion amplification operation. This relaxes a design of gm stages. Further, the current distributions for the fifth and sixth transistors are optimized (improvement of gm). By controlling the operation current by the ratio of the number of parallel connections of the transistors (herein referred to as the current mirror ratio) or the size ratio thereof, the operation current is utilized effectively, providing for low power consumption.

The resistor located between the emitters of the fifth and sixth transistors may be replaced with an inductor. Employment of an inductor as the negative feedback reduces the adverse effects of thermal noise caused by a negative feedback resistor. The resistance component of the inductor is represented by Z.sub.L=2.pi.fL, where f indicates the frequency. That is to say, as the frequency becomes high, the negative feedback effect improves, thus alleviating distortion.